From: Alistair Francis <alistair.francis@wdc.com>
To: qemu-devel@nongnu.org
Cc: alistair.francis@wdc.com, alistair23@gmail.com,
palmer@sifive.com, mjc@sifive.com
Subject: [Qemu-devel] [PATCH v1 0/5] Connect a PCIe host and graphics support to RISC-V
Date: Fri, 22 Jun 2018 12:28:14 -0700 [thread overview]
Message-ID: <cover.1529695276.git.alistair.francis@wdc.com> (raw)
Alistair Francis (5):
hw/riscv/virtio: Set the soc device tree node as a simple-bus
hw/riscv/virt: Increase the number of interrupts
hw/riscv/virt: Connect the Xilinx PCIe
hw/riscv/virt: Connect a VGA PCIe device
riscv64-softmmu.mak: Build Virtio Block support
default-configs/riscv32-softmmu.mak | 6 +++
default-configs/riscv64-softmmu.mak | 8 ++++
hw/riscv/virt.c | 73 ++++++++++++++++++++++++++++-
include/hw/riscv/virt.h | 6 ++-
4 files changed, 90 insertions(+), 3 deletions(-)
--
2.17.1
next reply other threads:[~2018-06-22 19:29 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-22 19:28 Alistair Francis [this message]
2018-06-22 19:29 ` [Qemu-devel] [PATCH v1 1/5] hw/riscv/virtio: Set the soc device tree node as a simple-bus Alistair Francis
2018-06-22 19:29 ` [Qemu-devel] [PATCH v1 2/5] hw/riscv/virt: Increase the number of interrupts Alistair Francis
2018-06-22 19:30 ` [Qemu-devel] [PATCH v1 3/5] hw/riscv/virt: Connect the Xilinx PCIe Alistair Francis
2018-06-23 20:07 ` Peter Maydell
2018-06-23 20:17 ` Michael Clark
2018-06-22 19:30 ` [Qemu-devel] [PATCH v1 4/5] hw/riscv/virt: Connect a VGA PCIe device Alistair Francis
2018-06-22 19:31 ` [Qemu-devel] [PATCH v1 5/5] riscv64-softmmu.mak: Build Virtio Block support Alistair Francis
2018-08-02 17:44 ` [Qemu-devel] [PATCH v1 0/5] Connect a PCIe host and graphics support to RISC-V Palmer Dabbelt
2018-08-02 19:18 ` [Qemu-devel] [PATCH v1 0/5] Connect a PCIe host and graphics support toRISC-V Alistair
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