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From: Alistair Francis <Alistair.Francis@wdc.com>
To: "qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
	"qemu-riscv@nongnu.org" <qemu-riscv@nongnu.org>
Cc: Alistair Francis <Alistair.Francis@wdc.com>,
	"alistair23@gmail.com" <alistair23@gmail.com>,
	"linux@roeck-us.net" <linux@roeck-us.net>,
	"abologna@redhat.com" <abologna@redhat.com>,
	"logang@deltatee.com" <logang@deltatee.com>
Subject: [Qemu-devel] [PATCH for-3.2 v7 0/6] Connect a PCIe host and graphics support to RISC-V
Date: Wed, 21 Nov 2018 17:02:08 +0000	[thread overview]
Message-ID: <cover.1542819633.git.alistair.francis@wdc.com> (raw)

V7:
 - Fix the GPEX memory mapping thanks to Bin Meng
 - Fix the interrupt mapping thanks to Logan Gunthorpe
V6:
 - Fix the interrupt issue for the GPEX device
V5:
 - Rebase
 - Include pci.mak in the default configs
V4:
 - Fix the spike device tree
 - Don't use stdvga device
V3:
 - Remove Makefile config changes
 - Connect a network adapter to the virt device
V2:
 - Use the gpex PCIe host for virt
 - Add support for SiFive U PCIe


Alistair Francis (6):
  hw/riscv/virt: Increase the number of interrupts
  hw/riscv/virt: Adjust memory layout spacing
  hw/riscv/virt: Connect the gpex PCIe
  riscv: Enable VGA and PCIE_VGA
  hw/riscv/sifive_u: Connect the Xilinx PCIe
  hw/riscv/virt: Connect a VirtIO net PCIe device

 default-configs/riscv32-softmmu.mak |  10 +-
 default-configs/riscv64-softmmu.mak |  10 +-
 hw/riscv/sifive_u.c                 |  64 +++++++++++
 hw/riscv/virt.c                     | 161 ++++++++++++++++++++++++++--
 include/hw/riscv/sifive_u.h         |   4 +-
 include/hw/riscv/virt.h             |  15 ++-
 6 files changed, 250 insertions(+), 14 deletions(-)

-- 
2.19.1

             reply	other threads:[~2018-11-21 17:02 UTC|newest]

Thread overview: 65+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-21 17:02 Alistair Francis [this message]
2018-11-21 17:02 ` [Qemu-devel] [PATCH for-3.2 v7 1/6] hw/riscv/virt: Increase the number of interrupts Alistair Francis
2018-11-21 17:58   ` Logan Gunthorpe
2018-11-21 18:17     ` Alistair Francis
2018-11-21 18:45       ` Logan Gunthorpe
2018-11-21 18:49         ` Alistair Francis
2018-11-21 18:56           ` Logan Gunthorpe
2018-11-21 18:59             ` Alistair Francis
2018-11-21 19:02               ` Logan Gunthorpe
2018-11-21 17:02 ` [Qemu-devel] [PATCH for-3.2 v7 2/6] hw/riscv/virt: Adjust memory layout spacing Alistair Francis
2018-11-21 17:59   ` Logan Gunthorpe
2018-11-21 17:02 ` [Qemu-devel] [PATCH for-3.2 v7 3/6] hw/riscv/virt: Connect the gpex PCIe Alistair Francis
2018-11-21 18:01   ` Logan Gunthorpe
2018-11-21 18:21     ` Alistair Francis
2018-11-21 17:02 ` [Qemu-devel] [PATCH for-3.2 v7 4/6] riscv: Enable VGA and PCIE_VGA Alistair Francis
2018-11-21 18:01   ` Logan Gunthorpe
2018-11-21 17:02 ` [Qemu-devel] [PATCH for-3.2 v7 5/6] hw/riscv/sifive_u: Connect the Xilinx PCIe Alistair Francis
2018-11-21 18:05   ` Logan Gunthorpe
2018-11-21 18:32     ` Alistair Francis
2018-11-21 18:50       ` Logan Gunthorpe
2018-11-21 19:02         ` Alistair Francis
2018-11-21 19:08           ` Logan Gunthorpe
2018-11-21 19:16             ` Alistair Francis
2018-11-21 19:19               ` Logan Gunthorpe
2018-11-21 19:21                 ` Alistair Francis
2018-11-21 19:24                   ` Logan Gunthorpe
2018-11-21 19:51                     ` Alistair Francis
2018-11-21 21:54                       ` Alistair Francis
2018-11-21 22:01                         ` Logan Gunthorpe
2018-11-21 22:09                           ` Alistair Francis
2018-11-21 22:11                             ` Logan Gunthorpe
2018-11-21 22:15                           ` Palmer Dabbelt
2018-11-21 21:37                   ` Palmer Dabbelt
2018-11-21 22:01                     ` Alistair Francis
2018-11-21 22:15                       ` Palmer Dabbelt
2018-11-21 19:15           ` Logan Gunthorpe
2018-11-21 19:18             ` Alistair Francis
2018-11-21 19:20               ` Logan Gunthorpe
2018-11-21 21:26       ` Palmer Dabbelt
2018-11-21 21:49         ` Alistair Francis
2018-11-21 22:15           ` Palmer Dabbelt
2018-11-21 22:23             ` Alistair Francis
2018-11-21 22:36               ` Palmer Dabbelt
2018-11-21 23:10                 ` Guenter Roeck
2018-11-21 23:26                   ` Logan Gunthorpe
2018-11-22  2:13                     ` Palmer Dabbelt
2018-11-22  2:23                       ` Alistair Francis
2018-11-26 19:15                         ` Palmer Dabbelt
2018-11-21 18:36     ` Guenter Roeck
2018-11-21 18:55       ` Logan Gunthorpe
2018-11-21 17:03 ` [Qemu-devel] [PATCH for-3.2 v7 6/6] hw/riscv/virt: Connect a VirtIO net PCIe device Alistair Francis
2018-11-21 18:07   ` Logan Gunthorpe
2018-11-21 18:34     ` Alistair Francis
2018-11-21 19:11       ` Logan Gunthorpe
2018-11-21 21:55         ` Alistair Francis
2018-11-21 22:07           ` Logan Gunthorpe
2018-11-21 22:11             ` Alistair Francis
2018-11-21 22:14               ` Alistair Francis
2018-11-21 22:16                 ` Logan Gunthorpe
2018-11-21 22:18                   ` Logan Gunthorpe
2018-11-22 10:59 ` [Qemu-devel] [PATCH for-3.2 v7 0/6] Connect a PCIe host and graphics support to RISC-V Andrea Bolognani
2018-11-26 16:03   ` Alistair Francis
2018-11-26 19:34   ` Palmer Dabbelt
2018-11-26 21:33     ` Guenter Roeck
2018-11-27 12:40     ` Andrea Bolognani

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