From: Alistair Francis <Alistair.Francis@wdc.com>
To: "qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
"qemu-riscv@nongnu.org" <qemu-riscv@nongnu.org>
Cc: Alistair Francis <Alistair.Francis@wdc.com>,
"alistair23@gmail.com" <alistair23@gmail.com>
Subject: [Qemu-devel] [PATCH v1 0/3] Upstream more RISC-V fork patches
Date: Fri, 4 Jan 2019 23:23:46 +0000 [thread overview]
Message-ID: <cover.1546644177.git.alistair.francis@wdc.com> (raw)
This is one of the big patches that the RISC-V fork has that we don't.
After this it should be straight forward to upstream the remaining
patches.
Michael Clark (3):
RISC-V: Implement modular CSR helper interface
RISC-V: Implement atomic mip/sip CSR updates
RISC-V: Implement existential predicates for CSRs
target/riscv/Makefile.objs | 2 +-
target/riscv/cpu.c | 6 +
target/riscv/cpu.h | 41 +-
target/riscv/cpu_helper.c | 7 +-
target/riscv/csr.c | 863 +++++++++++++++++++++++++++++++++++++
target/riscv/gdbstub.c | 10 +-
target/riscv/op_helper.c | 613 +-------------------------
7 files changed, 933 insertions(+), 609 deletions(-)
create mode 100644 target/riscv/csr.c
--
2.19.1
next reply other threads:[~2019-01-04 23:23 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-04 23:23 Alistair Francis [this message]
2019-01-04 23:23 ` [Qemu-devel] [PATCH v1 1/3] RISC-V: Implement modular CSR helper interface Alistair Francis
2019-01-04 23:24 ` [Qemu-devel] [PATCH v1 2/3] RISC-V: Implement atomic mip/sip CSR updates Alistair Francis
2019-01-04 23:24 ` [Qemu-devel] [PATCH v1 3/3] RISC-V: Implement existential predicates for CSRs Alistair Francis
2019-01-06 9:11 ` [Qemu-devel] [PATCH v1 0/3] Upstream more RISC-V fork patches Richard Henderson
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