From: Alistair Francis <alistair.francis@wdc.com>
To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org
Cc: alistair.francis@wdc.com, palmer@dabbelt.com, alistair23@gmail.com
Subject: [PATCH for 5.0 v1 0/2] RISC-V: Fix Hypervisor guest user space
Date: Thu, 26 Mar 2020 15:44:04 -0700 [thread overview]
Message-ID: <cover.1585262586.git.alistair.francis@wdc.com> (raw)
This series fixes two bugs in the RISC-V two stage lookup
implementation. This fixes the Hypervisor userspace failing to start.
Alistair Francis (2):
riscv: Don't use stage-2 PTE lookup protection flags
riscv: AND stage-1 and stage-2 protection flags
target/riscv/cpu_helper.c | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
--
2.26.0
next reply other threads:[~2020-03-26 22:54 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-26 22:44 Alistair Francis [this message]
2020-03-26 22:44 ` [PATCH for 5.0 v1 1/2] riscv: Don't use stage-2 PTE lookup protection flags Alistair Francis
2020-03-26 23:50 ` Richard Henderson
2020-06-25 19:02 ` Alistair Francis
2020-06-27 22:48 ` Richard Henderson
2020-03-26 22:44 ` [PATCH for 5.0 v1 2/2] riscv: AND stage-1 and stage-2 " Alistair Francis
2020-03-26 23:32 ` Richard Henderson
2020-03-26 23:45 ` Alistair Francis
2020-03-27 0:00 ` [PATCH for 5.0 v1 0/2] RISC-V: Fix Hypervisor guest user space Palmer Dabbelt
2020-03-30 4:23 ` Anup Patel
2020-04-20 19:16 ` Alistair Francis
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