[PATCH v4 0/4] RISC-V: Remove deprecated ISA, CPUs and machines

[Alistair Francis <alistair.francis@wdc.com>]

v4:
 - Remove all of the < PRIV_VERSION_1_10_0 checks
 - Move the documentation to the "Recently removed features" section
 - Document the OpenSBI deprecation
v3:
 - Don't use SiFive CPUs for Spike machine
v2:
 - Remove the CPUs and ISA seperatley


Alistair Francis (4):
  hw/riscv: spike: Remove deprecated ISA specific machines
  target/riscv: Remove the deprecated CPUs
  target/riscv: Drop support for ISA spec version 1.09.1
  docs: deprecated: Update the -bios documentation

 docs/system/deprecated.rst                    |  98 ++++----
 include/hw/riscv/spike.h                      |   6 +-
 target/riscv/cpu.h                            |   8 -
 hw/riscv/spike.c                              | 217 ------------------
 target/riscv/cpu.c                            |  30 ---
 target/riscv/cpu_helper.c                     |  82 +++----
 target/riscv/csr.c                            | 138 ++---------
 .../riscv/insn_trans/trans_privileged.inc.c   |  18 +-
 target/riscv/monitor.c                        |   5 -
 target/riscv/op_helper.c                      |  17 +-
 tests/qtest/machine-none-test.c               |   4 +-
 11 files changed, 118 insertions(+), 505 deletions(-)

-- 
2.26.2