* [PATCH 1/6] hw/sh4: Fix a typo in a comment
2021-10-27 1:32 [PATCH 0/6] More SH4 clean ups BALATON Zoltan
@ 2021-10-27 1:32 ` BALATON Zoltan
2021-10-27 2:10 ` Richard Henderson
2021-10-27 1:32 ` [PATCH 2/6] hw//sh4: Use qemu_log instead of fprintf to stderr BALATON Zoltan
` (5 subsequent siblings)
6 siblings, 1 reply; 14+ messages in thread
From: BALATON Zoltan @ 2021-10-27 1:32 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Richard Henderson, Magnus Damm, Yoshinori Sato
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
---
hw/timer/sh_timer.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/timer/sh_timer.c b/hw/timer/sh_timer.c
index 02eb865908..0a18ac8276 100644
--- a/hw/timer/sh_timer.c
+++ b/hw/timer/sh_timer.c
@@ -107,7 +107,7 @@ static void sh_timer_write(void *opaque, hwaddr offset,
if (s->enabled) {
/*
* Pause the timer if it is running. This may cause some inaccuracy
- * dure to rounding, but avoids a whole lot of other messyness
+ * due to rounding, but avoids a whole lot of other messyness
*/
ptimer_stop(s->timer);
}
--
2.21.4
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH 2/6] hw//sh4: Use qemu_log instead of fprintf to stderr
2021-10-27 1:32 [PATCH 0/6] More SH4 clean ups BALATON Zoltan
2021-10-27 1:32 ` [PATCH 1/6] hw/sh4: Fix a typo in a comment BALATON Zoltan
@ 2021-10-27 1:32 ` BALATON Zoltan
2021-10-27 2:12 ` Richard Henderson
2021-10-27 1:32 ` [PATCH 4/6] hw/sh4/r2d: Use error_report " BALATON Zoltan
` (4 subsequent siblings)
6 siblings, 1 reply; 14+ messages in thread
From: BALATON Zoltan @ 2021-10-27 1:32 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Richard Henderson, Magnus Damm, Yoshinori Sato
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
---
hw/char/sh_serial.c | 7 ++++---
hw/sh4/sh7750.c | 13 ++++++-------
2 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/hw/char/sh_serial.c b/hw/char/sh_serial.c
index 1b1e6a6a04..c4231975c7 100644
--- a/hw/char/sh_serial.c
+++ b/hw/char/sh_serial.c
@@ -30,6 +30,7 @@
#include "hw/sh4/sh.h"
#include "chardev/char-fe.h"
#include "qapi/error.h"
+#include "qemu/log.h"
#include "qemu/timer.h"
//#define DEBUG_SERIAL
@@ -200,8 +201,8 @@ static void sh_serial_write(void *opaque, hwaddr offs,
}
}
- fprintf(stderr, "sh_serial: unsupported write to 0x%02"
- HWADDR_PRIx "\n", offs);
+ qemu_log_mask(LOG_UNIMP, "sh_serial: unsupported write to 0x%02"
+ HWADDR_PRIx "\n", offs);
abort();
}
@@ -307,7 +308,7 @@ static uint64_t sh_serial_read(void *opaque, hwaddr offs,
#endif
if (ret & ~((1 << 16) - 1)) {
- fprintf(stderr, "sh_serial: unsupported read from 0x%02"
+ qemu_log_mask(LOG_UNIMP, "sh_serial: unsupported read from 0x%02"
HWADDR_PRIx "\n", offs);
abort();
}
diff --git a/hw/sh4/sh7750.c b/hw/sh4/sh7750.c
index ca7e261aba..f2f251f165 100644
--- a/hw/sh4/sh7750.c
+++ b/hw/sh4/sh7750.c
@@ -24,6 +24,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/log.h"
#include "hw/irq.h"
#include "hw/sh4/sh.h"
#include "sysemu/sysemu.h"
@@ -205,13 +206,13 @@ static void portb_changed(SH7750State *s, uint16_t prev)
static void error_access(const char *kind, hwaddr addr)
{
- fprintf(stderr, "%s to %s (0x" TARGET_FMT_plx ") not supported\n",
- kind, regname(addr), addr);
+ qemu_log_mask(LOG_GUEST_ERROR, "%s to %s (0x" TARGET_FMT_plx
+ ") not supported\n", kind, regname(addr), addr);
}
static void ignore_access(const char *kind, hwaddr addr)
{
- fprintf(stderr, "%s to %s (0x" TARGET_FMT_plx ") ignored\n",
+ qemu_log_mask(LOG_UNIMP, "%s to %s (0x" TARGET_FMT_plx ") ignored\n",
kind, regname(addr), addr);
}
@@ -241,8 +242,7 @@ static uint32_t sh7750_mem_readw(void *opaque, hwaddr addr)
case SH7750_PCR_A7:
return s->pcr;
case SH7750_RFCR_A7:
- fprintf(stderr,
- "Read access to refresh count register, incrementing\n");
+ /* Read access to refresh count register, incrementing */
return s->rfcr++;
case SH7750_PDTRA_A7:
return porta_lines(s);
@@ -363,13 +363,12 @@ static void sh7750_mem_writew(void *opaque, hwaddr addr,
portb_changed(s, temp);
return;
case SH7750_RFCR_A7:
- fprintf(stderr, "Write access to refresh count register\n");
s->rfcr = mem_value;
return;
case SH7750_GPIOIC_A7:
s->gpioic = mem_value;
if (mem_value != 0) {
- fprintf(stderr, "I/O interrupts not implemented\n");
+ qemu_log_mask(LOG_UNIMP, "I/O interrupts not implemented\n");
abort();
}
return;
--
2.21.4
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH 4/6] hw/sh4/r2d: Use error_report instead of fprintf to stderr
2021-10-27 1:32 [PATCH 0/6] More SH4 clean ups BALATON Zoltan
2021-10-27 1:32 ` [PATCH 1/6] hw/sh4: Fix a typo in a comment BALATON Zoltan
2021-10-27 1:32 ` [PATCH 2/6] hw//sh4: Use qemu_log instead of fprintf to stderr BALATON Zoltan
@ 2021-10-27 1:32 ` BALATON Zoltan
2021-10-27 2:19 ` Richard Henderson
2021-10-27 1:32 ` [PATCH 3/6] hw/sh4: Change debug printfs to traces BALATON Zoltan
` (3 subsequent siblings)
6 siblings, 1 reply; 14+ messages in thread
From: BALATON Zoltan @ 2021-10-27 1:32 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Richard Henderson, Magnus Damm, Yoshinori Sato
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
---
hw/sh4/r2d.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c
index 57ccae7249..72759413f3 100644
--- a/hw/sh4/r2d.c
+++ b/hw/sh4/r2d.c
@@ -26,6 +26,7 @@
#include "qemu/osdep.h"
#include "qemu/units.h"
#include "qapi/error.h"
+#include "qemu/error-report.h"
#include "cpu.h"
#include "hw/sysbus.h"
#include "hw/sh4/sh.h"
@@ -324,7 +325,7 @@ static void r2d_init(MachineState *machine)
SDRAM_BASE + LINUX_LOAD_OFFSET,
INITRD_LOAD_OFFSET - LINUX_LOAD_OFFSET);
if (kernel_size < 0) {
- fprintf(stderr, "qemu: could not load kernel '%s'\n", kernel_filename);
+ error_report("qemu: could not load kernel '%s'", kernel_filename);
exit(1);
}
@@ -345,7 +346,7 @@ static void r2d_init(MachineState *machine)
SDRAM_SIZE - INITRD_LOAD_OFFSET);
if (initrd_size < 0) {
- fprintf(stderr, "qemu: could not load initrd '%s'\n", initrd_filename);
+ error_report("qemu: could not load initrd '%s'", initrd_filename);
exit(1);
}
--
2.21.4
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH 3/6] hw/sh4: Change debug printfs to traces
2021-10-27 1:32 [PATCH 0/6] More SH4 clean ups BALATON Zoltan
` (2 preceding siblings ...)
2021-10-27 1:32 ` [PATCH 4/6] hw/sh4/r2d: Use error_report " BALATON Zoltan
@ 2021-10-27 1:32 ` BALATON Zoltan
2021-10-27 2:13 ` Richard Henderson
2021-10-27 1:32 ` [PATCH 5/6] hw/char/sh_serial: QOM-ify BALATON Zoltan
` (2 subsequent siblings)
6 siblings, 1 reply; 14+ messages in thread
From: BALATON Zoltan @ 2021-10-27 1:32 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Richard Henderson, Magnus Damm, Yoshinori Sato
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
---
hw/char/sh_serial.c | 13 ++-----
hw/char/trace-events | 3 ++
hw/intc/sh_intc.c | 79 +++++++++++--------------------------------
hw/intc/trace-events | 8 +++++
hw/sh4/sh7750.c | 8 ++---
hw/sh4/trace-events | 3 ++
hw/sh4/trace.h | 1 +
hw/timer/sh_timer.c | 12 ++-----
hw/timer/trace-events | 3 ++
meson.build | 1 +
10 files changed, 47 insertions(+), 84 deletions(-)
create mode 100644 hw/sh4/trace-events
create mode 100644 hw/sh4/trace.h
diff --git a/hw/char/sh_serial.c b/hw/char/sh_serial.c
index c4231975c7..ccfd570d29 100644
--- a/hw/char/sh_serial.c
+++ b/hw/char/sh_serial.c
@@ -32,8 +32,7 @@
#include "qapi/error.h"
#include "qemu/log.h"
#include "qemu/timer.h"
-
-//#define DEBUG_SERIAL
+#include "trace.h"
#define SH_SERIAL_FLAG_TEND (1 << 0)
#define SH_SERIAL_FLAG_TDE (1 << 1)
@@ -90,10 +89,7 @@ static void sh_serial_write(void *opaque, hwaddr offs,
sh_serial_state *s = opaque;
unsigned char ch;
-#ifdef DEBUG_SERIAL
- printf("sh_serial: write offs=0x%02x val=0x%02x\n",
- offs, val);
-#endif
+ trace_sh_serial("write", size, offs, val);
switch (offs) {
case 0x00: /* SMR */
s->smr = val & ((s->feat & SH_SERIAL_FEAT_SCIF) ? 0x7b : 0xff);
@@ -302,10 +298,7 @@ static uint64_t sh_serial_read(void *opaque, hwaddr offs,
break;
}
}
-#ifdef DEBUG_SERIAL
- printf("sh_serial: read offs=0x%02x val=0x%x\n",
- offs, ret);
-#endif
+ trace_sh_serial("read ", size, offs, ret);
if (ret & ~((1 << 16) - 1)) {
qemu_log_mask(LOG_UNIMP, "sh_serial: unsupported read from 0x%02"
diff --git a/hw/char/trace-events b/hw/char/trace-events
index b774832af4..3e49860e7b 100644
--- a/hw/char/trace-events
+++ b/hw/char/trace-events
@@ -101,3 +101,6 @@ exynos_uart_rx_timeout(uint32_t channel, uint32_t stat, uint32_t intsp) "UART%d:
# cadence_uart.c
cadence_uart_baudrate(unsigned baudrate) "baudrate %u"
+
+# sh_serial.c
+sh_serial(const char *op, unsigned size, uint64_t offs, uint64_t val) "%s size %d offs 0x%02" PRIx64 " val 0x%02" PRIx64
diff --git a/hw/intc/sh_intc.c b/hw/intc/sh_intc.c
index e7c9964dba..c1058d97c0 100644
--- a/hw/intc/sh_intc.c
+++ b/hw/intc/sh_intc.c
@@ -9,13 +9,12 @@
*/
#include "qemu/osdep.h"
+#include "qemu/log.h"
#include "cpu.h"
#include "hw/sh4/sh_intc.h"
#include "hw/irq.h"
#include "hw/sh4/sh.h"
-
-//#define DEBUG_INTC
-//#define DEBUG_INTC_SOURCES
+#include "trace.h"
#define INTC_A7(x) ((x) & 0x1fffffff)
@@ -57,20 +56,14 @@ void sh_intc_toggle_source(struct intc_source *source,
}
}
- if (enable_changed || assert_adj || pending_changed) {
-#ifdef DEBUG_INTC_SOURCES
- printf("sh_intc: (%d/%d/%d/%d) interrupt source 0x%x %s%s%s\n",
- source->parent->pending,
- source->asserted,
- source->enable_count,
- source->enable_max,
- source->vect,
- source->asserted ? "asserted " :
- assert_adj ? "deasserted" : "",
- enable_changed == 1 ? "enabled " :
- enable_changed == -1 ? "disabled " : "",
- source->pending ? "pending" : "");
-#endif
+ if (enable_changed || assert_adj || pending_changed) {
+ trace_sh_intc_sources(source->parent->pending, source->asserted,
+ source->enable_count, source->enable_max,
+ source->vect, source->asserted ? "asserted " :
+ assert_adj ? "deasserted" : "",
+ enable_changed == 1 ? "enabled " :
+ enable_changed == -1 ? "disabled " : "",
+ source->pending ? "pending" : "");
}
}
@@ -101,10 +94,7 @@ int sh_intc_get_pending_vector(struct intc_desc *desc, int imask)
struct intc_source *source = desc->sources + i;
if (source->pending) {
-#ifdef DEBUG_INTC_SOURCES
- printf("sh_intc: (%d) returning interrupt source 0x%x\n",
- desc->pending, source->vect);
-#endif
+ trace_sh_intc_pending(desc->pending, source->vect);
return source->vect;
}
}
@@ -199,30 +189,22 @@ static void sh_intc_toggle_mask(struct intc_desc *desc, intc_enum id,
return;
}
if (!source->next_enum_id && (!source->enable_max || !source->vect)) {
-#ifdef DEBUG_INTC_SOURCES
- printf("sh_intc: reserved interrupt source %d modified\n", id);
-#endif
+ qemu_log_mask(LOG_UNIMP,
+ "sh_intc: reserved interrupt source %d modified\n", id);
return;
}
if (source->vect) {
sh_intc_toggle_source(source, enable ? 1 : -1, 0);
}
-#ifdef DEBUG_INTC
- else {
- printf("setting interrupt group %d to %d\n", id, !!enable);
- }
-#endif
if ((is_group || !source->vect) && source->next_enum_id) {
sh_intc_toggle_mask(desc, source->next_enum_id, enable, 1);
}
-#ifdef DEBUG_INTC
if (!source->vect) {
- printf("setting interrupt group %d to %d - done\n", id, !!enable);
+ trace_sh_intc_set(id, !!enable);
}
-#endif
}
static uint64_t sh_intc_read(void *opaque, hwaddr offset,
@@ -235,12 +217,9 @@ static uint64_t sh_intc_read(void *opaque, hwaddr offset,
unsigned int mode = 0;
unsigned long *valuep;
-#ifdef DEBUG_INTC
- printf("sh_intc_read 0x%lx\n", (unsigned long) offset);
-#endif
-
sh_intc_locate(desc, (unsigned long)offset, &valuep,
&enum_ids, &first, &width, &mode);
+ trace_sh_intc_read(size, offset, *valuep);
return *valuep;
}
@@ -256,13 +235,9 @@ static void sh_intc_write(void *opaque, hwaddr offset,
unsigned long *valuep;
unsigned long mask;
-#ifdef DEBUG_INTC
- printf("sh_intc_write 0x%lx 0x%08x\n", (unsigned long) offset, value);
-#endif
-
+ trace_sh_intc_write(size, offset, value);
sh_intc_locate(desc, (unsigned long)offset, &valuep,
&enum_ids, &first, &width, &mode);
-
switch (mode) {
case INTC_MODE_ENABLE_REG | INTC_MODE_IS_PRIO:
break;
@@ -282,18 +257,10 @@ static void sh_intc_write(void *opaque, hwaddr offset,
if ((*valuep & mask) == (value & mask)) {
continue;
}
-#if 0
- printf("k = %d, first = %d, enum = %d, mask = 0x%08x\n",
- k, first, enum_ids[k], (unsigned int)mask);
-#endif
sh_intc_toggle_mask(desc, enum_ids[k], value & mask, 0);
}
*valuep = value;
-
-#ifdef DEBUG_INTC
- printf("sh_intc_write 0x%lx -> 0x%08x\n", (unsigned long) offset, value);
-#endif
}
static const MemoryRegionOps sh_intc_ops = {
@@ -416,11 +383,8 @@ void sh_intc_register_sources(struct intc_desc *desc,
s = sh_intc_source(desc, vect->enum_id);
if (s) {
s->vect = vect->vect;
-
-#ifdef DEBUG_INTC_SOURCES
- printf("sh_intc: registered source %d -> 0x%04x (%d/%d)\n",
- vect->enum_id, s->vect, s->enable_count, s->enable_max);
-#endif
+ trace_sh_intc_register("source", vect->enum_id, s->vect,
+ s->enable_count, s->enable_max);
}
}
@@ -438,11 +402,8 @@ void sh_intc_register_sources(struct intc_desc *desc,
s = sh_intc_source(desc, gr->enum_ids[k - 1]);
s->next_enum_id = gr->enum_ids[k];
}
-
-#ifdef DEBUG_INTC_SOURCES
- printf("sh_intc: registered group %d (%d/%d)\n",
- gr->enum_id, s->enable_count, s->enable_max);
-#endif
+ trace_sh_intc_register("group", gr->enum_id, 0xffff,
+ s->enable_count, s->enable_max);
}
}
}
diff --git a/hw/intc/trace-events b/hw/intc/trace-events
index 6a17d38998..9c7e41f41c 100644
--- a/hw/intc/trace-events
+++ b/hw/intc/trace-events
@@ -238,3 +238,11 @@ goldfish_pic_write(void *dev, int idx, unsigned int addr, unsigned int size, uin
goldfish_pic_reset(void *dev, int idx) "pic: %p goldfish-irq.%d"
goldfish_pic_realize(void *dev, int idx) "pic: %p goldfish-irq.%d"
goldfish_pic_instance_init(void *dev) "pic: %p goldfish-irq"
+
+# sh_intc.c
+sh_intc_sources(int p, int a, int c, int m, unsigned short v, const char *s1, const char *s2, const char *s3) "(%d/%d/%d/%d) interrupt source 0x%x %s%s%s"
+sh_intc_pending(int p, unsigned short v) "(%d) returning interrupt source 0x%x"
+sh_intc_register(const char *s, int id, unsigned short v, int c, int m) "%s %d -> 0x%04x (%d/%d)"
+sh_intc_read(unsigned size, uint64_t offset, unsigned long val) "size %d 0x%" PRIx64 " -> 0x%" PRIx64
+sh_intc_write(unsigned size, uint64_t offset, unsigned long val) "size %d 0x%" PRIx64 " <- 0x%" PRIx64
+sh_intc_set(int id, int enable) "setting interrupt group %d to %d"
diff --git a/hw/sh4/sh7750.c b/hw/sh4/sh7750.c
index f2f251f165..c3c3caf952 100644
--- a/hw/sh4/sh7750.c
+++ b/hw/sh4/sh7750.c
@@ -33,6 +33,7 @@
#include "hw/sh4/sh_intc.h"
#include "hw/timer/tmu012.h"
#include "exec/exec-all.h"
+#include "trace.h"
#define NB_DEVICES 4
@@ -148,15 +149,11 @@ static void porta_changed(SH7750State *s, uint16_t prev)
uint16_t currenta, changes;
int i, r = 0;
-#if 0
- fprintf(stderr, "porta changed from 0x%04x to 0x%04x\n",
- prev, porta_lines(s));
- fprintf(stderr, "pdtra=0x%04x, pctra=0x%08x\n", s->pdtra, s->pctra);
-#endif
currenta = porta_lines(s);
if (currenta == prev) {
return;
}
+ trace_sh7750_porta(prev, currenta, s->pdtra, s->pctra);
changes = currenta ^ prev;
for (i = 0; i < NB_DEVICES; i++) {
@@ -183,6 +180,7 @@ static void portb_changed(SH7750State *s, uint16_t prev)
if (currentb == prev) {
return;
}
+ trace_sh7750_portb(prev, currentb, s->pdtrb, s->pctrb);
changes = currentb ^ prev;
for (i = 0; i < NB_DEVICES; i++) {
diff --git a/hw/sh4/trace-events b/hw/sh4/trace-events
new file mode 100644
index 0000000000..4b61cd56c8
--- /dev/null
+++ b/hw/sh4/trace-events
@@ -0,0 +1,3 @@
+# sh7750.c
+sh7750_porta(uint16_t prev, uint16_t cur, uint16_t pdtr, uint16_t pctr) "porta changed from 0x%04x to 0x%04x\npdtra=0x%04x, pctra=0x%08x"
+sh7750_portb(uint16_t prev, uint16_t cur, uint16_t pdtr, uint16_t pctr) "portb changed from 0x%04x to 0x%04x\npdtrb=0x%04x, pctrb=0x%08x"
diff --git a/hw/sh4/trace.h b/hw/sh4/trace.h
new file mode 100644
index 0000000000..e2c13323b7
--- /dev/null
+++ b/hw/sh4/trace.h
@@ -0,0 +1 @@
+#include "trace/trace-hw_sh4.h"
diff --git a/hw/timer/sh_timer.c b/hw/timer/sh_timer.c
index 0a18ac8276..1f29f4a650 100644
--- a/hw/timer/sh_timer.c
+++ b/hw/timer/sh_timer.c
@@ -15,8 +15,7 @@
#include "hw/sh4/sh.h"
#include "hw/timer/tmu012.h"
#include "hw/ptimer.h"
-
-//#define DEBUG_TIMER
+#include "trace.h"
#define TIMER_TCR_TPSC (7 << 0)
#define TIMER_TCR_CKEG (3 << 3)
@@ -203,10 +202,7 @@ static void sh_timer_start_stop(void *opaque, int enable)
{
sh_timer_state *s = (sh_timer_state *)opaque;
-#ifdef DEBUG_TIMER
- printf("sh_timer_start_stop %d (%d)\n", enable, s->enabled);
-#endif
-
+ trace_sh_timer_start_stop(enable, s->enabled);
ptimer_transaction_begin(s->timer);
if (s->enabled && !enable) {
ptimer_stop(s->timer);
@@ -216,10 +212,6 @@ static void sh_timer_start_stop(void *opaque, int enable)
}
ptimer_transaction_commit(s->timer);
s->enabled = !!enable;
-
-#ifdef DEBUG_TIMER
- printf("sh_timer_start_stop done %d\n", s->enabled);
-#endif
}
static void sh_timer_tick(void *opaque)
diff --git a/hw/timer/trace-events b/hw/timer/trace-events
index d0edcd2a80..653025817b 100644
--- a/hw/timer/trace-events
+++ b/hw/timer/trace-events
@@ -94,3 +94,6 @@ sifive_pwm_set_alarm(uint64_t alarm, uint64_t now) "Setting alarm to: 0x%" PRIx6
sifive_pwm_interrupt(int num) "Interrupt %d"
sifive_pwm_read(uint64_t offset) "Read at address: 0x%" PRIx64
sifive_pwm_write(uint64_t data, uint64_t offset) "Write 0x%" PRIx64 " at address: 0x%" PRIx64
+
+# sh_timer.c
+sh_timer_start_stop(int enable, int current) "%d (%d)"
diff --git a/meson.build b/meson.build
index 2c5b53cbe2..b092728397 100644
--- a/meson.build
+++ b/meson.build
@@ -2459,6 +2459,7 @@ if have_system
'hw/s390x',
'hw/scsi',
'hw/sd',
+ 'hw/sh4',
'hw/sparc',
'hw/sparc64',
'hw/ssi',
--
2.21.4
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH 3/6] hw/sh4: Change debug printfs to traces
2021-10-27 1:32 ` [PATCH 3/6] hw/sh4: Change debug printfs to traces BALATON Zoltan
@ 2021-10-27 2:13 ` Richard Henderson
2021-10-27 9:40 ` BALATON Zoltan
0 siblings, 1 reply; 14+ messages in thread
From: Richard Henderson @ 2021-10-27 2:13 UTC (permalink / raw)
To: BALATON Zoltan, qemu-devel; +Cc: Peter Maydell, Magnus Damm, Yoshinori Sato
On 10/26/21 6:32 PM, BALATON Zoltan wrote:
> + trace_sh_serial("write", size, offs, val);
> switch (offs) {
> case 0x00: /* SMR */
> s->smr = val & ((s->feat & SH_SERIAL_FEAT_SCIF) ? 0x7b : 0xff);
> @@ -302,10 +298,7 @@ static uint64_t sh_serial_read(void *opaque, hwaddr offs,
> break;
> }
> }
> -#ifdef DEBUG_SERIAL
> - printf("sh_serial: read offs=0x%02x val=0x%x\n",
> - offs, ret);
> -#endif
> + trace_sh_serial("read ", size, offs, ret);
I suggest two separate sh_serial_{read,write} tracepoints.
r~
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH 3/6] hw/sh4: Change debug printfs to traces
2021-10-27 2:13 ` Richard Henderson
@ 2021-10-27 9:40 ` BALATON Zoltan
2021-10-27 15:38 ` Richard Henderson
0 siblings, 1 reply; 14+ messages in thread
From: BALATON Zoltan @ 2021-10-27 9:40 UTC (permalink / raw)
To: Richard Henderson; +Cc: Peter Maydell, Magnus Damm, qemu-devel, Yoshinori Sato
On Tue, 26 Oct 2021, Richard Henderson wrote:
> On 10/26/21 6:32 PM, BALATON Zoltan wrote:
>> + trace_sh_serial("write", size, offs, val);
>> switch (offs) {
>> case 0x00: /* SMR */
>> s->smr = val & ((s->feat & SH_SERIAL_FEAT_SCIF) ? 0x7b : 0xff);
>> @@ -302,10 +298,7 @@ static uint64_t sh_serial_read(void *opaque, hwaddr
>> offs,
>> break;
>> }
>> }
>> -#ifdef DEBUG_SERIAL
>> - printf("sh_serial: read offs=0x%02x val=0x%x\n",
>> - offs, ret);
>> -#endif
>> + trace_sh_serial("read ", size, offs, ret);
>
> I suggest two separate sh_serial_{read,write} tracepoints.
Thought about that but it's unlikely one would only want to trace one
direction, more likely to want all access to the device. But if it's a
requirement I can split this into separate _read and _write.
Regards,
BALATON Zoltan
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH 3/6] hw/sh4: Change debug printfs to traces
2021-10-27 9:40 ` BALATON Zoltan
@ 2021-10-27 15:38 ` Richard Henderson
0 siblings, 0 replies; 14+ messages in thread
From: Richard Henderson @ 2021-10-27 15:38 UTC (permalink / raw)
To: BALATON Zoltan; +Cc: Peter Maydell, Magnus Damm, qemu-devel, Yoshinori Sato
On 10/27/21 2:40 AM, BALATON Zoltan wrote:
>> I suggest two separate sh_serial_{read,write} tracepoints.
>
> Thought about that but it's unlikely one would only want to trace one direction, more
> likely to want all access to the device. But if it's a requirement I can split this into
> separate _read and _write.
Sure, but it's just as easy to enable sh_serial_* to get both tracepoints.
r~
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 5/6] hw/char/sh_serial: QOM-ify
2021-10-27 1:32 [PATCH 0/6] More SH4 clean ups BALATON Zoltan
` (3 preceding siblings ...)
2021-10-27 1:32 ` [PATCH 3/6] hw/sh4: Change debug printfs to traces BALATON Zoltan
@ 2021-10-27 1:32 ` BALATON Zoltan
2021-10-27 1:32 ` [PATCH 6/6] hw/char/sh_serial: Add device id to trace output BALATON Zoltan
2021-10-27 4:10 ` [PATCH 0/6] More SH4 clean ups Philippe Mathieu-Daudé
6 siblings, 0 replies; 14+ messages in thread
From: BALATON Zoltan @ 2021-10-27 1:32 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Richard Henderson, Magnus Damm, Yoshinori Sato
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
---
hw/char/sh_serial.c | 127 ++++++++++++++++++++++++++------------------
hw/sh4/sh7750.c | 62 +++++++++++++++------
include/hw/sh4/sh.h | 9 +---
3 files changed, 123 insertions(+), 75 deletions(-)
diff --git a/hw/char/sh_serial.c b/hw/char/sh_serial.c
index ccfd570d29..91973affb5 100644
--- a/hw/char/sh_serial.c
+++ b/hw/char/sh_serial.c
@@ -26,7 +26,11 @@
*/
#include "qemu/osdep.h"
+#include "hw/sysbus.h"
#include "hw/irq.h"
+#include "hw/qdev-core.h"
+#include "hw/qdev-properties.h"
+#include "hw/qdev-properties-system.h"
#include "hw/sh4/sh.h"
#include "chardev/char-fe.h"
#include "qapi/error.h"
@@ -42,10 +46,10 @@
#define SH_RX_FIFO_LENGTH (16)
-typedef struct {
- MemoryRegion iomem;
- MemoryRegion iomem_p4;
- MemoryRegion iomem_a7;
+OBJECT_DECLARE_SIMPLE_TYPE(SHSerialState, SH_SERIAL)
+
+struct SHSerialState {
+ SysBusDevice parent;
uint8_t smr;
uint8_t brr;
uint8_t scr;
@@ -59,13 +63,12 @@ typedef struct {
uint8_t rx_tail;
uint8_t rx_head;
- int freq;
- int feat;
+ uint8_t feat;
int flags;
int rtrg;
CharBackend chr;
- QEMUTimer *fifo_timeout_timer;
+ QEMUTimer fifo_timeout_timer;
uint64_t etu; /* Elementary Time Unit (ns) */
qemu_irq eri;
@@ -73,9 +76,13 @@ typedef struct {
qemu_irq txi;
qemu_irq tei;
qemu_irq bri;
-} sh_serial_state;
+};
+
+typedef struct {} SHSerialStateClass;
-static void sh_serial_clear_fifo(sh_serial_state *s)
+OBJECT_DEFINE_TYPE(SHSerialState, sh_serial, SH_SERIAL, SYS_BUS_DEVICE)
+
+static void sh_serial_clear_fifo(SHSerialState *s)
{
memset(s->rx_fifo, 0, SH_RX_FIFO_LENGTH);
s->rx_cnt = 0;
@@ -86,7 +93,7 @@ static void sh_serial_clear_fifo(sh_serial_state *s)
static void sh_serial_write(void *opaque, hwaddr offs,
uint64_t val, unsigned size)
{
- sh_serial_state *s = opaque;
+ SHSerialState *s = opaque;
unsigned char ch;
trace_sh_serial("write", size, offs, val);
@@ -205,7 +212,7 @@ static void sh_serial_write(void *opaque, hwaddr offs,
static uint64_t sh_serial_read(void *opaque, hwaddr offs,
unsigned size)
{
- sh_serial_state *s = opaque;
+ SHSerialState *s = opaque;
uint32_t ret = ~0;
#if 0
@@ -309,12 +316,12 @@ static uint64_t sh_serial_read(void *opaque, hwaddr offs,
return ret;
}
-static int sh_serial_can_receive(sh_serial_state *s)
+static int sh_serial_can_receive(SHSerialState *s)
{
return s->scr & (1 << 4);
}
-static void sh_serial_receive_break(sh_serial_state *s)
+static void sh_serial_receive_break(SHSerialState *s)
{
if (s->feat & SH_SERIAL_FEAT_SCIF) {
s->sr |= (1 << 4);
@@ -323,13 +330,13 @@ static void sh_serial_receive_break(sh_serial_state *s)
static int sh_serial_can_receive1(void *opaque)
{
- sh_serial_state *s = opaque;
+ SHSerialState *s = opaque;
return sh_serial_can_receive(s);
}
static void sh_serial_timeout_int(void *opaque)
{
- sh_serial_state *s = opaque;
+ SHSerialState *s = opaque;
s->flags |= SH_SERIAL_FLAG_RDF;
if (s->scr & (1 << 6) && s->rxi) {
@@ -339,7 +346,7 @@ static void sh_serial_timeout_int(void *opaque)
static void sh_serial_receive1(void *opaque, const uint8_t *buf, int size)
{
- sh_serial_state *s = opaque;
+ SHSerialState *s = opaque;
if (s->feat & SH_SERIAL_FEAT_SCIF) {
int i;
@@ -353,11 +360,11 @@ static void sh_serial_receive1(void *opaque, const uint8_t *buf, int size)
if (s->rx_cnt >= s->rtrg) {
s->flags |= SH_SERIAL_FLAG_RDF;
if (s->scr & (1 << 6) && s->rxi) {
- timer_del(s->fifo_timeout_timer);
+ timer_del(&s->fifo_timeout_timer);
qemu_set_irq(s->rxi, 1);
}
} else {
- timer_mod(s->fifo_timeout_timer,
+ timer_mod(&s->fifo_timeout_timer,
qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + 15 * s->etu);
}
}
@@ -369,7 +376,7 @@ static void sh_serial_receive1(void *opaque, const uint8_t *buf, int size)
static void sh_serial_event(void *opaque, QEMUChrEvent event)
{
- sh_serial_state *s = opaque;
+ SHSerialState *s = opaque;
if (event == CHR_EVENT_BREAK) {
sh_serial_receive_break(s);
}
@@ -381,20 +388,10 @@ static const MemoryRegionOps sh_serial_ops = {
.endianness = DEVICE_NATIVE_ENDIAN,
};
-void sh_serial_init(MemoryRegion *sysmem,
- hwaddr base, int feat,
- uint32_t freq, Chardev *chr,
- qemu_irq eri_source,
- qemu_irq rxi_source,
- qemu_irq txi_source,
- qemu_irq tei_source,
- qemu_irq bri_source)
+static void sh_serial_reset(DeviceState *dev)
{
- sh_serial_state *s;
-
- s = g_malloc0(sizeof(sh_serial_state));
+ SHSerialState *s = SH_SERIAL(dev);
- s->feat = feat;
s->flags = SH_SERIAL_FLAG_TEND | SH_SERIAL_FLAG_TDE;
s->rtrg = 1;
@@ -403,38 +400,64 @@ void sh_serial_init(MemoryRegion *sysmem,
s->scr = 1 << 5; /* pretend that TX is enabled so early printk works */
s->sptr = 0;
- if (feat & SH_SERIAL_FEAT_SCIF) {
+ if (s->feat & SH_SERIAL_FEAT_SCIF) {
s->fcr = 0;
} else {
s->dr = 0xff;
}
sh_serial_clear_fifo(s);
+}
- memory_region_init_io(&s->iomem, NULL, &sh_serial_ops, s,
- "serial", 0x100000000ULL);
-
- memory_region_init_alias(&s->iomem_p4, NULL, "serial-p4", &s->iomem,
- 0, 0x28);
- memory_region_add_subregion(sysmem, P4ADDR(base), &s->iomem_p4);
-
- memory_region_init_alias(&s->iomem_a7, NULL, "serial-a7", &s->iomem,
- 0, 0x28);
- memory_region_add_subregion(sysmem, A7ADDR(base), &s->iomem_a7);
-
- if (chr) {
- qemu_chr_fe_init(&s->chr, chr, &error_abort);
+static void sh_serial_realize(DeviceState *d, Error **errp)
+{
+ SHSerialState *s = SH_SERIAL(d);
+ MemoryRegion *iomem = g_malloc(sizeof(*iomem));
+
+ assert(d->id);
+ memory_region_init_io(iomem, OBJECT(d), &sh_serial_ops, s, d->id, 0x28);
+ sysbus_init_mmio(SYS_BUS_DEVICE(d), iomem);
+ qdev_init_gpio_out_named(d, &s->eri, "eri", 1);
+ qdev_init_gpio_out_named(d, &s->rxi, "rxi", 1);
+ qdev_init_gpio_out_named(d, &s->txi, "txi", 1);
+ qdev_init_gpio_out_named(d, &s->tei, "tei", 1);
+ qdev_init_gpio_out_named(d, &s->bri, "bri", 1);
+
+ if (qemu_chr_fe_backend_connected(&s->chr)) {
qemu_chr_fe_set_handlers(&s->chr, sh_serial_can_receive1,
sh_serial_receive1,
sh_serial_event, NULL, s, NULL, true);
}
- s->fifo_timeout_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL,
- sh_serial_timeout_int, s);
+ timer_init_ns(&s->fifo_timeout_timer, QEMU_CLOCK_VIRTUAL,
+ sh_serial_timeout_int, s);
s->etu = NANOSECONDS_PER_SECOND / 9600;
- s->eri = eri_source;
- s->rxi = rxi_source;
- s->txi = txi_source;
- s->tei = tei_source;
- s->bri = bri_source;
+}
+
+static void sh_serial_finalize(Object *obj)
+{
+ SHSerialState *s = SH_SERIAL(obj);
+
+ timer_del(&s->fifo_timeout_timer);
+}
+
+static void sh_serial_init(Object *obj)
+{
+}
+
+static Property sh_serial_properties[] = {
+ DEFINE_PROP_CHR("chardev", SHSerialState, chr),
+ DEFINE_PROP_UINT8("features", SHSerialState, feat, 0),
+ DEFINE_PROP_END_OF_LIST()
+};
+
+static void sh_serial_class_init(ObjectClass *oc, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(oc);
+
+ device_class_set_props(dc, sh_serial_properties);
+ dc->realize = sh_serial_realize;
+ dc->reset = sh_serial_reset;
+ /* Reason: part of SuperH CPU/SoC, needs to be wired up */
+ dc->user_creatable = false;
}
diff --git a/hw/sh4/sh7750.c b/hw/sh4/sh7750.c
index c3c3caf952..dba40a6fb4 100644
--- a/hw/sh4/sh7750.c
+++ b/hw/sh4/sh7750.c
@@ -24,10 +24,14 @@
*/
#include "qemu/osdep.h"
+#include "qapi/error.h"
#include "qemu/log.h"
+#include "hw/sysbus.h"
#include "hw/irq.h"
#include "hw/sh4/sh.h"
#include "sysemu/sysemu.h"
+#include "hw/qdev-properties.h"
+#include "hw/qdev-properties-system.h"
#include "sh7750_regs.h"
#include "sh7750_regnames.h"
#include "hw/sh4/sh_intc.h"
@@ -761,6 +765,9 @@ static const MemoryRegionOps sh7750_mmct_ops = {
SH7750State *sh7750_init(SuperHCPU *cpu, MemoryRegion *sysmem)
{
SH7750State *s;
+ DeviceState *dev;
+ SysBusDevice *sb;
+ MemoryRegion *mr, *alias;
s = g_malloc0(sizeof(SH7750State));
s->cpu = cpu;
@@ -806,21 +813,46 @@ SH7750State *sh7750_init(SuperHCPU *cpu, MemoryRegion *sysmem)
cpu->env.intc_handle = &s->intc;
- sh_serial_init(sysmem, 0x1fe00000,
- 0, s->periph_freq, serial_hd(0),
- s->intc.irqs[SCI1_ERI],
- s->intc.irqs[SCI1_RXI],
- s->intc.irqs[SCI1_TXI],
- s->intc.irqs[SCI1_TEI],
- NULL);
- sh_serial_init(sysmem, 0x1fe80000,
- SH_SERIAL_FEAT_SCIF,
- s->periph_freq, serial_hd(1),
- s->intc.irqs[SCIF_ERI],
- s->intc.irqs[SCIF_RXI],
- s->intc.irqs[SCIF_TXI],
- NULL,
- s->intc.irqs[SCIF_BRI]);
+ /* SCI */
+ dev = qdev_new(TYPE_SH_SERIAL);
+ dev->id = (char *)"sci";
+ qdev_prop_set_chr(dev, "chardev", serial_hd(0));
+ sb = SYS_BUS_DEVICE(dev);
+ sysbus_realize_and_unref(sb, &error_fatal);
+ mr = sysbus_mmio_get_region(sb, 0);
+ alias = g_malloc(sizeof(*alias));
+ memory_region_init_alias(alias, OBJECT(dev), "sci-p4", mr,
+ 0, memory_region_size(mr));
+ memory_region_add_subregion(sysmem, P4ADDR(0x1fe00000), alias);
+ alias = g_malloc(sizeof(*alias));
+ memory_region_init_alias(alias, OBJECT(dev), "sci-a7", mr,
+ 0, memory_region_size(mr));
+ memory_region_add_subregion(sysmem, A7ADDR(0x1fe00000), alias);
+ qdev_connect_gpio_out_named(dev, "eri", 0, s->intc.irqs[SCI1_ERI]);
+ qdev_connect_gpio_out_named(dev, "rxi", 0, s->intc.irqs[SCI1_RXI]);
+ qdev_connect_gpio_out_named(dev, "txi", 0, s->intc.irqs[SCI1_TXI]);
+ qdev_connect_gpio_out_named(dev, "tei", 0, s->intc.irqs[SCI1_TEI]);
+
+ /* SCIF */
+ dev = qdev_new(TYPE_SH_SERIAL);
+ dev->id = (char *)"scif";
+ qdev_prop_set_chr(dev, "chardev", serial_hd(1));
+ qdev_prop_set_uint8(dev, "features", SH_SERIAL_FEAT_SCIF);
+ sb = SYS_BUS_DEVICE(dev);
+ sysbus_realize_and_unref(sb, &error_fatal);
+ mr = sysbus_mmio_get_region(sb, 0);
+ alias = g_malloc(sizeof(*alias));
+ memory_region_init_alias(alias, OBJECT(dev), "scif-p4", mr,
+ 0, memory_region_size(mr));
+ memory_region_add_subregion(sysmem, P4ADDR(0x1fe80000), alias);
+ alias = g_malloc(sizeof(*alias));
+ memory_region_init_alias(alias, OBJECT(dev), "scif-a7", mr,
+ 0, memory_region_size(mr));
+ memory_region_add_subregion(sysmem, A7ADDR(0x1fe80000), alias);
+ qdev_connect_gpio_out_named(dev, "eri", 0, s->intc.irqs[SCIF_ERI]);
+ qdev_connect_gpio_out_named(dev, "rxi", 0, s->intc.irqs[SCIF_RXI]);
+ qdev_connect_gpio_out_named(dev, "txi", 0, s->intc.irqs[SCIF_TXI]);
+ qdev_connect_gpio_out_named(dev, "bri", 0, s->intc.irqs[SCIF_BRI]);
tmu012_init(sysmem, 0x1fd80000,
TMU012_FEAT_TOCR | TMU012_FEAT_3CHAN | TMU012_FEAT_EXTCLK,
diff --git a/include/hw/sh4/sh.h b/include/hw/sh4/sh.h
index 366cedcda0..ec716cdd45 100644
--- a/include/hw/sh4/sh.h
+++ b/include/hw/sh4/sh.h
@@ -54,15 +54,8 @@ int sh7750_register_io_device(struct SH7750State *s,
sh7750_io_device *device);
/* sh_serial.c */
+#define TYPE_SH_SERIAL "sh-serial"
#define SH_SERIAL_FEAT_SCIF (1 << 0)
-void sh_serial_init(MemoryRegion *sysmem,
- hwaddr base, int feat,
- uint32_t freq, Chardev *chr,
- qemu_irq eri_source,
- qemu_irq rxi_source,
- qemu_irq txi_source,
- qemu_irq tei_source,
- qemu_irq bri_source);
/* sh7750.c */
qemu_irq sh7750_irl(struct SH7750State *s);
--
2.21.4
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH 6/6] hw/char/sh_serial: Add device id to trace output
2021-10-27 1:32 [PATCH 0/6] More SH4 clean ups BALATON Zoltan
` (4 preceding siblings ...)
2021-10-27 1:32 ` [PATCH 5/6] hw/char/sh_serial: QOM-ify BALATON Zoltan
@ 2021-10-27 1:32 ` BALATON Zoltan
2021-10-27 4:10 ` [PATCH 0/6] More SH4 clean ups Philippe Mathieu-Daudé
6 siblings, 0 replies; 14+ messages in thread
From: BALATON Zoltan @ 2021-10-27 1:32 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Richard Henderson, Magnus Damm, Yoshinori Sato
Normally there are at least two sh_serial instances. Add device id to
trace messages to make it clear which instance they belong to
otherwise its not possible to tell which serial device is accessed.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
---
hw/char/sh_serial.c | 6 ++++--
hw/char/trace-events | 2 +-
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/hw/char/sh_serial.c b/hw/char/sh_serial.c
index 91973affb5..c2dc51f7f0 100644
--- a/hw/char/sh_serial.c
+++ b/hw/char/sh_serial.c
@@ -94,9 +94,10 @@ static void sh_serial_write(void *opaque, hwaddr offs,
uint64_t val, unsigned size)
{
SHSerialState *s = opaque;
+ DeviceState *d = DEVICE(s);
unsigned char ch;
- trace_sh_serial("write", size, offs, val);
+ trace_sh_serial(d->id, "write", size, offs, val);
switch (offs) {
case 0x00: /* SMR */
s->smr = val & ((s->feat & SH_SERIAL_FEAT_SCIF) ? 0x7b : 0xff);
@@ -213,6 +214,7 @@ static uint64_t sh_serial_read(void *opaque, hwaddr offs,
unsigned size)
{
SHSerialState *s = opaque;
+ DeviceState *d = DEVICE(s);
uint32_t ret = ~0;
#if 0
@@ -305,7 +307,7 @@ static uint64_t sh_serial_read(void *opaque, hwaddr offs,
break;
}
}
- trace_sh_serial("read ", size, offs, ret);
+ trace_sh_serial(d->id, "read ", size, offs, ret);
if (ret & ~((1 << 16) - 1)) {
qemu_log_mask(LOG_UNIMP, "sh_serial: unsupported read from 0x%02"
diff --git a/hw/char/trace-events b/hw/char/trace-events
index 3e49860e7b..2f799c57ae 100644
--- a/hw/char/trace-events
+++ b/hw/char/trace-events
@@ -103,4 +103,4 @@ exynos_uart_rx_timeout(uint32_t channel, uint32_t stat, uint32_t intsp) "UART%d:
cadence_uart_baudrate(unsigned baudrate) "baudrate %u"
# sh_serial.c
-sh_serial(const char *op, unsigned size, uint64_t offs, uint64_t val) "%s size %d offs 0x%02" PRIx64 " val 0x%02" PRIx64
+sh_serial(char *id, const char *op, unsigned size, uint64_t offs, uint64_t val) "%s %s size %d offs 0x%02" PRIx64 " val 0x%02" PRIx64
--
2.21.4
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH 0/6] More SH4 clean ups
2021-10-27 1:32 [PATCH 0/6] More SH4 clean ups BALATON Zoltan
` (5 preceding siblings ...)
2021-10-27 1:32 ` [PATCH 6/6] hw/char/sh_serial: Add device id to trace output BALATON Zoltan
@ 2021-10-27 4:10 ` Philippe Mathieu-Daudé
6 siblings, 0 replies; 14+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-10-27 4:10 UTC (permalink / raw)
To: BALATON Zoltan, qemu-devel
Cc: Peter Maydell, Magnus Damm, Richard Henderson, Yoshinori Sato
On 10/27/21 03:32, BALATON Zoltan wrote:
> Based-on: <cover.1635036053.git.balaton@eik.bme.hu>
> ^ (hw/sh4: Codeing style fixes)
>
> Continuing the clean up stared in previous series this now removes
> printfs and QOM-ify sh_serial.
>
> Is there somebody who will merge these? I don't think there's anybody
> sending pull request for SH4 so maybe Peret/Richard might need to take
> it.
It would be nice if Yoshinori takes care of it,
otherwise I could to offload Richard.
^ permalink raw reply [flat|nested] 14+ messages in thread