From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 89380C369B4 for ; Tue, 15 Apr 2025 09:57:13 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u4d1z-0000Ag-Rj; Tue, 15 Apr 2025 05:56:39 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1u4d1u-00009T-SS; Tue, 15 Apr 2025 05:56:36 -0400 Received: from out28-217.mail.aliyun.com ([115.124.28.217]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1u4d1q-0005z6-P7; Tue, 15 Apr 2025 05:56:33 -0400 Received: from TC-DZ-03-0020.tc.local(mailfrom:lc00631@tecorigin.com fp:SMTPD_---.cNCCBA3_1744710970 cluster:ay29) by smtp.aliyun-inc.com; Tue, 15 Apr 2025 17:56:14 +0800 From: Chao Liu To: alistair23@gmail.com, palmer@dabbelt.com Cc: zhiwei_liu@linux.alibaba.com, alistair.francis@wdc.com, dbarboza@ventanamicro.com, liwei1518@gmail.com, lc00631@tecorigin.com, zqz00548@tecorigin.com, qemu-devel@nongnu.org, qemu-riscv@nongnu.org Subject: [PATCH v0 0/1] fix the way riscv_plic_hart_config_string() Date: Tue, 15 Apr 2025 17:53:57 +0800 Message-ID: X-Mailer: git-send-email 2.47.0.windows.2 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=115.124.28.217; envelope-from=lc00631@tecorigin.com; helo=out28-217.mail.aliyun.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, UNPARSEABLE_RELAY=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi, all: When I was configuring multiple sockets using riscv virt Machine, I found that I could not set the PLIC correctly. By checking the code, I found that it was due to not traversing the CPUState correctly in the riscv_plic_hart_config_string() function. So I tried to fix this. -- Regards, Chao Chao Liu (1): hw/riscv: fix PLIC hart topology configuration string when not getting CPUState correctly hw/riscv/boot.c | 4 ++-- hw/riscv/microchip_pfsoc.c | 2 +- hw/riscv/riscv_hart.c | 1 + hw/riscv/sifive_u.c | 5 +++-- hw/riscv/virt.c | 2 +- include/hw/riscv/boot.h | 2 +- 6 files changed, 9 insertions(+), 7 deletions(-) -- 2.48.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7B2DAC369B5 for ; Tue, 15 Apr 2025 10:09:10 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u4dDL-0004tb-9L; Tue, 15 Apr 2025 06:08:24 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1u4dD8-0004qu-7y; Tue, 15 Apr 2025 06:08:10 -0400 Received: from out28-49.mail.aliyun.com ([115.124.28.49]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1u4dD4-0007If-Fi; Tue, 15 Apr 2025 06:08:09 -0400 Received: from TC-DZ-03-0020.tc.local(mailfrom:lc00631@tecorigin.com fp:SMTPD_---.cN4sjju_1744711658 cluster:ay29) by smtp.aliyun-inc.com; Tue, 15 Apr 2025 18:07:39 +0800 From: Chao Liu To: alistair23@gmail.com, palmer@dabbelt.com Cc: zhiwei_liu@linux.alibaba.com, alistair.francis@wdc.com, dbarboza@ventanamicro.com, liwei1518@gmail.com, lc00631@tecorigin.com, zqz00548@tecorigin.com, qemu-devel@nongnu.org, qemu-riscv@nongnu.org Subject: [PATCH v1 0/1] fix the way riscv_plic_hart_config_string() gets the CPUState Date: Tue, 15 Apr 2025 18:05:29 +0800 Message-ID: X-Mailer: git-send-email 2.47.0.windows.2 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=115.124.28.49; envelope-from=lc00631@tecorigin.com; helo=out28-49.mail.aliyun.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, UNPARSEABLE_RELAY=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Message-ID: <20250415100529.zdA1KDJYG0BZXb6--FUi1wGYvG66-dU0eSPf05U8Ki0@z> Hi, all: When I was configuring multiple sockets using riscv virt Machine, I found that I could not set the PLIC correctly. By checking the code, I found that it was due to not traversing the CPUState correctly in the riscv_plic_hart_config_string() function. So I tried to fix this. PATCH v1 update commit message: "For non-numa or single-cluster machines, hartid_base should be 0." -- Regards, Chao Chao Liu (1): hw/riscv: fix PLIC hart topology configuration string when not getting CPUState correctly hw/riscv/boot.c | 4 ++-- hw/riscv/microchip_pfsoc.c | 2 +- hw/riscv/riscv_hart.c | 1 + hw/riscv/sifive_u.c | 5 +++-- hw/riscv/virt.c | 2 +- include/hw/riscv/boot.h | 2 +- 6 files changed, 9 insertions(+), 7 deletions(-) -- 2.48.1