From: Pavel Pisa via <qemu-devel@nongnu.org>
To: qemu-devel@nongnu.org, Peter Maydell <peter.maydell@linaro.org>,
Gustavo Romero <gustavo.romero@linaro.org>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
Oliver Hartkopp <socketcan@hartkopp.net>,
Ondrej Ille <ondrej.ille@gmail.com>,
Jiri Novak <jnovak@fel.cvut.cz>,
Pavel Pisa <pisa@cmp.felk.cvut.cz>
Subject: [PATCH v1 0/3] CTU CAN FD IP core mapping to the platform bus
Date: Wed, 28 May 2025 13:39:27 +0200 [thread overview]
Message-ID: <cover.1748432169.git.pisa@cmp.felk.cvut.cz> (raw)
Hello Peter, Gustavo and others,
our CTU CAN FD IP core is used on many FPGA platforms
and has been even tapeout on some other university
and even prototypes of the massive production chips
(support for that organized by our former student
in his company).
But actual QEMU emulation targets only PCI/PCIe mapping in
hw/net/can/ctucan_pci.c
its use is described for example by Mateusz Szafoni for the NuttX
development there
https://railab.me/posts/2025/5/host-based-dev-with-nuttx-can-network/
But possibility to map the CTU CAN FD core
hw/net/can/ctucan_core.c
https://canbus.pages.fel.cvut.cz/
onto bus of FPGA based devices as well onto integrated SoCs
is getting important now. We have developed CAN stack for RTEMS
https://docs.rtems.org/docs/main/bsp-howto/can.html
which is tested on real Zynq 7000 and even on PCIe x86 under
mainline QEMU and with proposed patches on Zynq 7000. The next
target on the table is Microchip PolarFire SoC, again under RTEMS
and Linux.
But there is arising another target, Espressif announced mass production
of ESP32-C5 which has integrated CTU CAN FD IP core, the ESP32-H4 is
on horizon and there areplans to use our IP core on future devices as well.
Thanks for review in advance, I expect that you would prefer to move
define of TYPE_CTUCAN_MM_DEV = "ctucan_mm" somewhere in headers
or may it be evech nage the type name. So please, specify where
and how.
I have even questions about better way to process and combine IRQ
sources even on PCI/PCIe boards in past. But because there has been
no result how it could be changed. On the other hand, current solution
works and proposed extension enhances its value for embedded
development for broader community a lot.
Pavel Pisa (3):
hw/net/can: CTU CAN FD IP core mapping to the platform bus
hw/net/can: CTU CAN FD IP platform bus mapping enabled for Xilinx Zynq
hw/net/can: CTU CAN FD IP mapping enabled for Microchip PolarFire SoC
Icicle Kit
hw/arm/xilinx_zynq.c | 1 +
hw/net/can/ctucan_mm.c | 258 +++++++++++++++++++++++++++++++++++++
hw/net/can/meson.build | 1 +
hw/riscv/microchip_pfsoc.c | 2 +
4 files changed, 262 insertions(+)
create mode 100644 hw/net/can/ctucan_mm.c
--
2.39.5
next reply other threads:[~2025-05-28 11:57 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-28 11:39 Pavel Pisa via [this message]
2025-05-28 11:39 ` [PATCH v1 1/3] hw/net/can: CTU CAN FD IP core mapping to the platform bus Pavel Pisa via
2025-06-12 15:50 ` Peter Maydell
2025-06-15 22:31 ` Pavel Pisa
2025-05-28 11:39 ` [PATCH v1 2/3] hw/net/can: CTU CAN FD IP platform bus mapping enabled for Xilinx Zynq Pavel Pisa via
2025-05-28 11:39 ` [PATCH v1 3/3] hw/net/can: CTU CAN FD IP mapping enabled for Microchip PolarFire SoC Icicle Kit Pavel Pisa via
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