Re: [PATCH v2 1/8] x86: Fix the 64-byte boundary enumeration for extended state

[David Edmondson <david.edmondson@oracle.com>]

On Wednesday, 2022-02-16 at 22:04:27 -08, Yang Zhong wrote:

> From: Jing Liu <jing2.liu@intel.com>
>
> The extended state subleaves (EAX=0Dh, ECX=n, n>1).ECX[1]
> indicate whether the extended state component locates
> on the next 64-byte boundary following the preceding state
> component when the compacted format of an XSAVE area is
> used.
>
> Right now, they are all zero because no supported component
> needed the bit to be set, but the upcoming AMX feature will
> use it.  Fix the subleaves value according to KVM's supported
> cpuid.
>
> Signed-off-by: Jing Liu <jing2.liu@intel.com>
> Signed-off-by: Yang Zhong <yang.zhong@intel.com>

Reviewed-by: David Edmondson <david.edmondson@oracle.com>

> ---
>  target/i386/cpu.h         | 6 ++++++
>  target/i386/cpu.c         | 1 +
>  target/i386/kvm/kvm-cpu.c | 1 +
>  3 files changed, 8 insertions(+)
>
> diff --git a/target/i386/cpu.h b/target/i386/cpu.h
> index 9911d7c871..de1dc124ab 100644
> --- a/target/i386/cpu.h
> +++ b/target/i386/cpu.h
> @@ -548,6 +548,11 @@ typedef enum X86Seg {
>  #define XSTATE_Hi16_ZMM_MASK            (1ULL << XSTATE_Hi16_ZMM_BIT)
>  #define XSTATE_PKRU_MASK                (1ULL << XSTATE_PKRU_BIT)
>
> +#define ESA_FEATURE_ALIGN64_BIT         1
> +
> +#define ESA_FEATURE_ALIGN64_MASK        (1U << ESA_FEATURE_ALIGN64_BIT)
> +
> +
>  /* CPUID feature words */
>  typedef enum FeatureWord {
>      FEAT_1_EDX,         /* CPUID[1].EDX */
> @@ -1354,6 +1359,7 @@ QEMU_BUILD_BUG_ON(sizeof(XSavePKRU) != 0x8);
>  typedef struct ExtSaveArea {
>      uint32_t feature, bits;
>      uint32_t offset, size;
> +    uint32_t ecx;
>  } ExtSaveArea;
>
>  #define XSAVE_STATE_AREA_COUNT (XSTATE_PKRU_BIT + 1)
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index aa9e636800..37f06b0b1a 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -5487,6 +5487,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
>                  const ExtSaveArea *esa = &x86_ext_save_areas[count];
>                  *eax = esa->size;
>                  *ebx = esa->offset;
> +                *ecx = esa->ecx & ESA_FEATURE_ALIGN64_MASK;
>              }
>          }
>          break;
> diff --git a/target/i386/kvm/kvm-cpu.c b/target/i386/kvm/kvm-cpu.c
> index d95028018e..ce27d3b1df 100644
> --- a/target/i386/kvm/kvm-cpu.c
> +++ b/target/i386/kvm/kvm-cpu.c
> @@ -104,6 +104,7 @@ static void kvm_cpu_xsave_init(void)
>              if (sz != 0) {
>                  assert(esa->size == sz);
>                  esa->offset = kvm_arch_get_supported_cpuid(s, 0xd, i, R_EBX);
> +                esa->ecx = kvm_arch_get_supported_cpuid(s, 0xd, i, R_ECX);
>              }
>          }
>      }

dme.
-- 
We're deep in discussion, the party's on mute.