From: David Edmondson <david.edmondson@oracle.com>
To: Joao Martins <joao.m.martins@oracle.com>
Cc: Eduardo Habkost <ehabkost@redhat.com>,
"Michael S . Tsirkin" <mst@redhat.com>,
Richard Henderson <richard.henderson@linaro.org>,
qemu-devel@nongnu.org, Daniel Jordan <daniel.m.jordan@oracle.com>,
Alex Williamson <alex.williamson@redhat.com>,
Paolo Bonzini <pbonzini@redhat.com>, Ani Sinha <ani@anisinha.ca>,
Igor Mammedov <imammedo@redhat.com>,
Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Subject: Re: [PATCH RFCv2 3/4] i386/pc: warn if phys-bits is too low
Date: Mon, 14 Feb 2022 13:15:38 +0000 [thread overview]
Message-ID: <cuno839pp1h.fsf@oracle.com> (raw)
In-Reply-To: <20220207202422.31582-4-joao.m.martins@oracle.com> (Joao Martins's message of "Mon, 7 Feb 2022 20:24:21 +0000")
On Monday, 2022-02-07 at 20:24:21 GMT, Joao Martins wrote:
> Default phys-bits on Qemu is TCG_PHYS_BITS (40) which is enough
> to address 1Tb (0xff ffff ffff). On AMD platforms, if a
> ram-above-4g relocation happens and the CPU wasn't configured
> with a big enough phys-bits, warn the user. There isn't a
> catastrophic failure exactly, the guest will still boot, but
> most likely won't be able to use more than ~4G of RAM.
>
> Signed-off-by: Joao Martins <joao.m.martins@oracle.com>
> ---
> hw/i386/pc.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/hw/i386/pc.c b/hw/i386/pc.c
> index b060aedd38f3..f8712eb8427e 100644
> --- a/hw/i386/pc.c
> +++ b/hw/i386/pc.c
> @@ -842,6 +842,7 @@ static void relocate_4g(MachineState *machine, PCMachineState *pcms)
> X86MachineState *x86ms = X86_MACHINE(pcms);
> ram_addr_t device_mem_size = 0;
> uint32_t eax, vendor[3];
> + hwaddr maxphysaddr;
>
> host_cpuid(0x0, 0, &eax, &vendor[0], &vendor[2], &vendor[1]);
> if (!IS_AMD_VENDOR(vendor)) {
> @@ -858,6 +859,12 @@ static void relocate_4g(MachineState *machine, PCMachineState *pcms)
> return;
> }
>
> + maxphysaddr = ((hwaddr)1 << X86_CPU(first_cpu)->phys_bits) - 1;
> + if (maxphysaddr < AMD_ABOVE_1TB_START)
Braces around the block are required, I believe.
> + warn_report("Relocated RAM above 4G to start at %lu "
Should use PRIu64?
> + "phys-bits too low (%u)",
> + AMD_ABOVE_1TB_START, X86_CPU(first_cpu)->phys_bits);
> +
> x86ms->above_4g_mem_start = AMD_ABOVE_1TB_START;
And a real nit - until above_4g_mem_start is modified, the number of
phys_bits is fine, so I would have put the warning after the assignment.
> }
dme.
--
Tonight I'm gonna bury that horse in the ground.
next prev parent reply other threads:[~2022-02-14 14:05 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-07 20:24 [PATCH RFCv2 0/4] i386/pc: Fix creation of >= 1010G guests on AMD systems with IOMMU Joao Martins
2022-02-07 20:24 ` [PATCH RFCv2 1/4] hw/i386: add 4g boundary start to X86MachineState Joao Martins
2022-02-14 13:19 ` Igor Mammedov
2022-02-14 13:21 ` Joao Martins
2022-02-07 20:24 ` [PATCH RFCv2 2/4] i386/pc: relocate 4g start to 1T where applicable Joao Martins
2022-02-14 14:53 ` Igor Mammedov
2022-02-14 15:05 ` Joao Martins
2022-02-14 15:31 ` Igor Mammedov
2022-02-15 9:53 ` Gerd Hoffmann
2022-02-15 19:37 ` Joao Martins
2022-02-16 8:19 ` Gerd Hoffmann
2022-02-16 11:54 ` Joao Martins
2022-02-16 12:32 ` Gerd Hoffmann
2022-02-16 9:51 ` Daniel P. Berrangé
2022-02-21 13:15 ` Dr. David Alan Gilbert
2022-02-22 8:46 ` Igor Mammedov
2022-02-22 9:30 ` Dr. David Alan Gilbert
2022-02-22 9:42 ` Gerd Hoffmann
2022-02-23 8:43 ` Igor Mammedov
2022-02-23 9:16 ` Dr. David Alan Gilbert
2022-02-23 9:31 ` Igor Mammedov
2022-02-18 17:12 ` Joao Martins
2022-02-21 6:58 ` Igor Mammedov
2022-02-21 15:28 ` Joao Martins
2022-02-22 11:00 ` Joao Martins
2022-02-23 8:38 ` Igor Mammedov
2022-02-07 20:24 ` [PATCH RFCv2 3/4] i386/pc: warn if phys-bits is too low Joao Martins
2022-02-14 13:15 ` David Edmondson [this message]
2022-02-14 13:18 ` Joao Martins
2022-02-14 15:03 ` Igor Mammedov
2022-02-14 15:18 ` Joao Martins
2022-02-14 15:41 ` Igor Mammedov
2022-02-14 15:48 ` Joao Martins
2022-02-23 17:18 ` Joao Martins
2022-02-24 9:01 ` Igor Mammedov
2022-02-24 9:27 ` Joao Martins
2022-02-07 20:24 ` [PATCH RFCv2 4/4] i386/pc: Restrict AMD-only enforcing of valid IOVAs to new machine type Joao Martins
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=cuno839pp1h.fsf@oracle.com \
--to=david.edmondson@oracle.com \
--cc=alex.williamson@redhat.com \
--cc=ani@anisinha.ca \
--cc=daniel.m.jordan@oracle.com \
--cc=ehabkost@redhat.com \
--cc=imammedo@redhat.com \
--cc=joao.m.martins@oracle.com \
--cc=mst@redhat.com \
--cc=pbonzini@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=richard.henderson@linaro.org \
--cc=suravee.suthikulpanit@amd.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).