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([2a01:cb1c:b26:7100:7654:8924:d030:917]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4264a1dda06sm55582745e9.17.2024.07.05.03.03.53 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 05 Jul 2024 03:03:54 -0700 (PDT) Message-ID: Date: Fri, 5 Jul 2024 12:03:53 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 0/8] PRI support for VT-d To: Yi Liu , CLEMENT MATHIEU--DRIF , "qemu-devel@nongnu.org" Cc: "jasowang@redhat.com" , "zhenzhong.duan@intel.com" , "kevin.tian@intel.com" , "joao.m.martins@oracle.com" , "peterx@redhat.com" References: <20240530122439.42888-1-clement.mathieu--drif@eviden.com> <311d4200-a5a4-418b-bc54-9f2c871235b0@intel.com> <5b461da1-09ef-4744-970d-9f8aadf7cd32@intel.com> Content-Language: en-US From: cmd In-Reply-To: <5b461da1-09ef-4744-970d-9f8aadf7cd32@intel.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=clement.mathieudrif.etu@gmail.com; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 05/07/2024 08:20, Yi Liu wrote: > On 2024/7/5 13:13, CLEMENT MATHIEU--DRIF wrote: >> >> On 05/07/2024 05:03, Yi Liu wrote: >>> Caution: External email. Do not open attachments or click links, >>> unless this email comes from a known sender and you know the content >>> is safe. >>> >>> >>> On 2024/5/30 20:24, CLEMENT MATHIEU--DRIF wrote: >>>> This series belongs to a list of series that add SVM support for VT-d. >>>> >>>> Here we focus on the implementation of PRI support in the IOMMU and >>>> on a PCI-level >>>> API for PRI to be used by virtual devices. >>>> >>>> This work is based on the VT-d specification version 4.1 (March 2023). >>>> Here is a link to a GitHub repository where you can find the >>>> following elements : >>>>       - Qemu with all the patches for SVM >>>>           - ATS >>>>           - PRI >>>>           - Device IOTLB invalidations >>>>           - Requests with already translated addresses >>>>       - A demo device >>>>       - A simple driver for the demo device >>>>       - A userspace program (for testing and demonstration purposes) >>> >>> I didn't see the drain PRQ related logics in this series. Please >>> consider >>> adding it in next version. It's needed when repurposing a PASID. >> >> Hi, >> >> Are you talking about wait descriptors with SW = 0, IF = 0, FN = 1 >> (section 7.10 of VT-d)? >> >> I'll move that to the PRI series. > > yes. But not only that patch. When guest software submitting the > descriptors per CH7.10 of VT-d spec, QEMU need to emulate the > PRQ drain behavior. > Ok, will check >>> >>>> https://github.com/BullSequana/Qemu-in-guest-SVM-demo >>>> >>>> >>>> Clément Mathieu--Drif (8): >>>>     pcie: add a helper to declare the PRI capability for a pcie device >>>>     pcie: helper functions to check to check if PRI is enabled >>>>     pcie: add a way to get the outstanding page request allocation >>>> (pri) >>>>       from the config space. >>>>     pci: declare structures and IOMMU operation for PRI >>>>     pci: add a PCI-level API for PRI >>>>     intel_iommu: declare PRI constants and structures >>>>     intel_iommu: declare registers for PRI >>>>     intel_iommu: add PRI operations support >>>> >>>>    hw/i386/intel_iommu.c          | 302 >>>> +++++++++++++++++++++++++++++++++ >>>>    hw/i386/intel_iommu_internal.h |  54 +++++- >>>>    hw/pci/pci.c                   |  37 ++++ >>>>    hw/pci/pcie.c                  |  42 +++++ >>>>    include/exec/memory.h          |  65 +++++++ >>>>    include/hw/pci/pci.h           |  45 +++++ >>>>    include/hw/pci/pci_bus.h       |   1 + >>>>    include/hw/pci/pcie.h          |   7 +- >>>>    include/hw/pci/pcie_regs.h     |   4 + >>>>    system/memory.c                |  49 ++++++ >>>>    10 files changed, 604 insertions(+), 2 deletions(-) >>>> >>> >>> -- >>> Regards, >>> Yi Liu >