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To: Richard Henderson , Chinmay Rath , qemu-ppc@nongnu.org Cc: qemu-devel@nongnu.org, npiggin@gmail.com, danielhb413@gmail.com, harshpb@linux.ibm.com References: <20240607144921.726730-1-rathc@linux.ibm.com> <20240607144921.726730-3-rathc@linux.ibm.com> <91e78fa4-f844-4b79-ba09-46c722f35df8@linaro.org> Content-Language: en-US From: Chinmay Rath In-Reply-To: <91e78fa4-f844-4b79-ba09-46c722f35df8@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: k6aoxcLzTrbrpBLobzaCOJlT3IvOCwmp X-Proofpoint-GUID: UU52eo8CIHOHQaUiuQ_oeJwA8Z95yQLn X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-06-09_14,2024-06-06_02,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 lowpriorityscore=0 impostorscore=0 suspectscore=0 malwarescore=0 spamscore=0 mlxscore=0 bulkscore=0 adultscore=0 clxscore=1011 mlxlogscore=705 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2405170001 definitions=main-2406090141 Received-SPF: none client-ip=148.163.158.5; envelope-from=rathc@linux.vnet.ibm.com; helo=mx0b-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H4=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_NONE=0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi Richard, On 6/7/24 21:11, Richard Henderson wrote: > On 6/7/24 07:49, Chinmay Rath wrote: >> +static bool do_ld_st_vl(DisasContext *ctx, arg_X *a, >> +                        void (*helper)(TCGv_ptr, TCGv, TCGv_ptr, TCGv)) >> +{ >> +    TCGv EA; >> +    TCGv_ptr xt; >> +    if (a->rt < 32) { >> +        REQUIRE_VSX(ctx); >> +    } else { >> +        REQUIRE_VECTOR(ctx); >> +    } >> +    xt = gen_vsr_ptr(a->rt); >> +    gen_set_access_type(ctx, ACCESS_INT); >> + >> +    if (a->ra) { >> +        EA = tcg_temp_new(); >> +        tcg_gen_mov_tl(EA, cpu_gpr[a->ra]); >> +    } else { >> +        EA = tcg_constant_tl(0); >> +    } >> +    if (NARROW_MODE(ctx)) { >> +        tcg_gen_ext32u_tl(EA, EA); > > ra == 0, narrow mode, will crash, due to write into constant 0. > Obviously 0 does not need extending, so this could be > >     if (!a->ra) { >         ea = constant 0; >     } else if (narrow mode) { >         ea = tcg_temp_new(); >         tcg_gen_ext32u_tl(ea, cpu_gpr[a->ra]); >     } else { >         ra = cpu_gpr[a->ra]; >     } > ^ Thank you Richard, will take care in v2. > > Aren't there existing helper functions for computing this address? > And if not, better to create one. ^ The calculation of effective address in these instructions is slightly different than the others, for which helper function exist : EA for these insns : EA ← (RA=0) ? 0 : GPR[RA] EA for rest storage access insns : EA ← ((RA=0) ? 0 : GPR[RA]) + GPR[RB] This is why I could not reuse that function. Also, this calculation of EA is limited to these 4 insns above, and only 2 others (prefixed insns), which is why I did not create a new function for this, considering it won't be reused for any other insn. Please let me know if I should create a new function in this case as well. Thanks and Regards, Chinmay > > > r~ >