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[176.184.10.250]) by smtp.gmail.com with ESMTPSA id jt26-20020a170906ca1a00b00a558206b2c5sm7748013ejb.99.2024.05.08.07.08.46 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 08 May 2024 07:08:47 -0700 (PDT) Message-ID: Date: Wed, 8 May 2024 16:08:45 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/4] hw/char: Add QOM property for STM32L4x5 USART clock frequency To: Peter Maydell Cc: =?UTF-8?Q?In=C3=A8s_Varhol?= , qemu-devel@nongnu.org, qemu-arm@nongnu.org, Thomas Huth , Arnaud Minier , Laurent Vivier , =?UTF-8?Q?Marc-Andr=C3=A9_Lureau?= , Alistair Francis , Samuel Tardieu , Paolo Bonzini , Markus Armbruster References: <20240505140556.373711-1-ines.varhol@telecom-paris.fr> <20240505140556.373711-4-ines.varhol@telecom-paris.fr> <06e98554-3430-49d5-94f3-c5d683327f55@linaro.org> Content-Language: en-US From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::533; envelope-from=philmd@linaro.org; helo=mail-ed1-x533.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi, On 7/5/24 11:54, Peter Maydell wrote: > On Mon, 6 May 2024 at 10:34, Philippe Mathieu-Daudé wrote: >> >> Hi, >> >> On 5/5/24 16:05, Inès Varhol wrote: >>> Signed-off-by: Inès Varhol >>> --- >>> hw/char/stm32l4x5_usart.c | 12 ++++++++++++ >>> 1 file changed, 12 insertions(+) >>> >>> diff --git a/hw/char/stm32l4x5_usart.c b/hw/char/stm32l4x5_usart.c >>> index fc5dcac0c4..ee7727481c 100644 >>> --- a/hw/char/stm32l4x5_usart.c >>> +++ b/hw/char/stm32l4x5_usart.c >>> @@ -26,6 +26,7 @@ >>> #include "hw/clock.h" >>> #include "hw/irq.h" >>> #include "hw/qdev-clock.h" >>> +#include "qapi/visitor.h" >>> #include "hw/qdev-properties.h" >>> #include "hw/qdev-properties-system.h" >>> #include "hw/registerfields.h" >>> @@ -523,6 +524,14 @@ static Property stm32l4x5_usart_base_properties[] = { >>> DEFINE_PROP_END_OF_LIST(), >>> }; >>> >>> +static void clock_freq_get(Object *obj, Visitor *v, >>> + const char *name, void *opaque, Error **errp) >>> +{ >>> + Stm32l4x5UsartBaseState *s = STM32L4X5_USART_BASE(obj); >>> + uint32_t clock_freq_hz = clock_get_hz(s->clk); >>> + visit_type_uint32(v, name, &clock_freq_hz, errp); >>> +} >>> + >>> static void stm32l4x5_usart_base_init(Object *obj) >>> { >>> Stm32l4x5UsartBaseState *s = STM32L4X5_USART_BASE(obj); >>> @@ -534,6 +543,9 @@ static void stm32l4x5_usart_base_init(Object *obj) >>> sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->mmio); >>> >>> s->clk = qdev_init_clock_in(DEVICE(s), "clk", NULL, s, 0); >>> + >>> + object_property_add(obj, "clock-freq-hz", "uint32", >>> + clock_freq_get, NULL, NULL, NULL); >> >> Patch LGTM, but I wonder if registering QOM getter without setter >> is recommended. Perhaps we should encourage parity? In normal HW >> emulation we shouldn't update this clock externally, but thinking >> about testing, this could be interesting to introduce jitter. > > object_property_add() with the set function NULL is fine, > and is documented to mean "property cannot be set". Attempts > to set it will be failed (in object_property_set()) with a > reasonable error. > > But it's not clear to me why we want the property in the first > place -- we don't generally have devices which take a Clock > input have properties exposing its frequency. If we did want > that it would probably be better if we could do it generically > rather than by adding more boilerplate code to each device. Inès qtest checking (via HMP) the configured clock has a correct scaled frequency seems a good use case. > Mostly "frequency" properties on devices are for the case > where they *don't* have a Clock input and instead have > ad-hoc legacy handling where the board/SoC that creates the > device sets an integer property to define the input frequency > because it doesn't model the clock tree with Clock objects. > > thanks > -- PMM