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[83.57.172.194]) by smtp.gmail.com with ESMTPSA id u205sm23550214wme.42.2021.01.02.02.56.30 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 02 Jan 2021 02:56:31 -0800 (PST) Subject: Re: [RFC PATCH 3/5] hw/pci-host/bonito: Remap PCI "lo" regions when PCIMAP reg is modified From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= To: Peter Maydell References: <20210101231215.1870611-1-f4bug@amsat.org> <20210101231215.1870611-4-f4bug@amsat.org> <2da14074-a4ef-e90c-ea42-74d48ca06afd@amsat.org> Message-ID: Date: Sat, 2 Jan 2021 11:56:29 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.5.0 MIME-Version: 1.0 In-Reply-To: <2da14074-a4ef-e90c-ea42-74d48ca06afd@amsat.org> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wm1-x32a.google.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.249, NICE_REPLY_A=-2.749, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aleksandar Rikalo , Qemu-block , Huacai Chen , Mark Cave-Ayland , QEMU Developers , Wainer dos Santos Moschetta , Artyom Tarasenko , Cleber Rosa , John Snow , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 1/2/21 11:44 AM, Philippe Mathieu-Daudé wrote: > On 1/2/21 12:19 AM, Peter Maydell wrote: >> On Fri, 1 Jan 2021 at 23:12, Philippe Mathieu-Daudé wrote: >>> >>> Per the datasheet (Chapter 5.7.1. "PCI address regions"), >>> the PCIMAP register: >>> >>> Map the 64Mbyte regions marked "PCI_Lo" in the CPU's memory map, >>> each of which can be assigned to any 64 Mbyte-aligned region of >>> PCI memory. The address appearing on the PCI bus consists of the >>> low 26 bits of the CPU physical address, with the high 6 bits >>> coming from the appropriate base6 field. Each of the three regions >>> is an independent window onto PCI memory, and can be positioned on >>> any 64Mbyte boundary in PCI space. >>> >>> Remap the 3 regions on reset and when PCIMAP is updated. >>> >>> Signed-off-by: Philippe Mathieu-Daudé >>> --- >>> hw/pci-host/bonito.c | 49 ++++++++++++++++++++++++++++++++------------ >>> 1 file changed, 36 insertions(+), 13 deletions(-) >>> >>> diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c >>> index a99eced0657..c58eeaf504c 100644 >>> --- a/hw/pci-host/bonito.c >>> +++ b/hw/pci-host/bonito.c >>> @@ -137,6 +137,10 @@ FIELD(BONGENCFG, PCIQUEUE, 12, 1) >>> >>> /* 4. PCI address map control */ >>> #define BONITO_PCIMAP (0x10 >> 2) /* 0x110 */ >>> +FIELD(PCIMAP, LO0, 0, 6) >>> +FIELD(PCIMAP, LO1, 6, 6) >>> +FIELD(PCIMAP, LO2, 12, 6) >>> +FIELD(PCIMAP, 2G, 18, 1) >>> #define BONITO_PCIMEMBASECFG (0x14 >> 2) /* 0x114 */ >>> #define BONITO_PCIMAP_CFG (0x18 >> 2) /* 0x118 */ >>> >>> @@ -237,6 +241,7 @@ struct BonitoState { >>> qemu_irq *pic; >>> PCIBonitoState *pci_dev; >>> MemoryRegion pci_mem; >>> + MemoryRegion pcimem_lo_alias[3]; >>> }; >>> >>> #define TYPE_BONITO_PCI_HOST_BRIDGE "Bonito-pcihost" >>> @@ -245,6 +250,31 @@ OBJECT_DECLARE_SIMPLE_TYPE(BonitoState, BONITO_PCI_HOST_BRIDGE) >>> #define TYPE_PCI_BONITO "Bonito" >>> OBJECT_DECLARE_SIMPLE_TYPE(PCIBonitoState, PCI_BONITO) >>> >>> +static void bonito_remap(PCIBonitoState *s) >>> +{ >>> + static const char *const region_name[3] = { >>> + "pci.lomem0", "pci.lomem1", "pci.lomem2" >>> + }; >>> + BonitoState *bs = BONITO_PCI_HOST_BRIDGE(s->pcihost); >>> + >>> + for (size_t i = 0; i < 3; i++) { >>> + uint32_t offset = extract32(s->regs[BONITO_PCIMAP], 6 * i, 6) << 26; >>> + >>> + if (memory_region_is_mapped(&bs->pcimem_lo_alias[i])) { >>> + memory_region_del_subregion(get_system_memory(), >>> + &bs->pcimem_lo_alias[i]); >>> + object_unparent(OBJECT(&bs->pcimem_lo_alias[i])); >>> + } >>> + >>> + memory_region_init_alias(&bs->pcimem_lo_alias[i], OBJECT(s), >>> + region_name[i], &bs->pci_mem, >>> + offset, 64 * MiB); >>> + memory_region_add_subregion(get_system_memory(), >>> + BONITO_PCILO_BASE + i * 64 * MiB, >>> + &bs->pcimem_lo_alias[i]); >>> + } >> >> Rather than delete-and-reinit-and-add, it's probably better to >> just create the subregions once at device startup, and then use >> memory_region_set_enabled() and memory_region_set_address() >> to manipulate whether the subregion is visible and what address >> in the system memory it is mapped at. > > Great! Thanks Peter :) TIL these functions. > From what I understand from memory_region_readd_subregion (called > from memory_region_set_address) using memory_region_set_enabled() > directly is enough. Actually since this is a alias, we don't want to modify the base address but the alias offset, so I need to use memory_region_set_alias_offset().