From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Subject: Re: [PATCH v4 0/7] tcg: pc-relative translation blocks
Date: Tue, 6 Sep 2022 10:28:31 +0100 [thread overview]
Message-ID: <d0b82889-952f-f3f2-788a-fc21bd1e5c14@linaro.org> (raw)
In-Reply-To: <20220906091126.298041-1-richard.henderson@linaro.org>
On 9/6/22 10:11, Richard Henderson wrote:
> The goal here is to reduce the amount of code generation when the
> guest kernel enables address space randomization. This requires
> extensive changes to each target, so opt-in with TARGET_TB_PCREL.
>
> This is split out of v3, which also contained target/arm changes,
> as I now have patches for x86 and s390x as well.
>
>
> r~
>
>
> Based-on: 20220905202259.189852-1-richard.henderson@linaro.org
> ("[PATCH v3 0/6] tcg: Introduce CPUTLBEntryFull")
>
> v2: https://lore.kernel.org/qemu-devel/20220816203400.161187-1-richard.henderson@linaro.org/
> v3: https://lore.kernel.org/qemu-devel/20220822232338.1727934-1-richard.henderson@linaro.org/
>
> branch: https://gitlab.com/rth7680/qemu/-/tree/tcg-pcrel
Arg. Accidentally dropped a patch from v3:
>
>
> Richard Henderson (7):
> accel/tcg: Use bool for page_find_alloc
> accel/tcg: Use DisasContextBase in plugin_gen_tb_start
> accel/tcg: Do not align tb->page_addr[0]
> include/hw/core: Create struct CPUJumpCache
> accel/tcg: Introduce tb_pc and tb_pc_log
> accel/tcg: Introduce TARGET_TB_PCREL
> accel/tcg: Split log_cpu_exec into inline and slow path
>
> include/exec/cpu-defs.h | 3 +
> include/exec/exec-all.h | 51 ++++++++++-
> include/exec/plugin-gen.h | 7 +-
> include/hw/core/cpu.h | 9 +-
> accel/tcg/cpu-exec.c | 108 ++++++++++++++++--------
> accel/tcg/cputlb.c | 5 +-
> accel/tcg/plugin-gen.c | 22 ++---
> accel/tcg/translate-all.c | 90 ++++++++++++--------
> accel/tcg/translator.c | 2 +-
> target/arm/cpu.c | 4 +-
> target/avr/cpu.c | 2 +-
> target/hexagon/cpu.c | 2 +-
> target/hppa/cpu.c | 4 +-
> target/i386/tcg/tcg-cpu.c | 2 +-
> target/loongarch/cpu.c | 2 +-
> target/microblaze/cpu.c | 2 +-
> target/mips/tcg/exception.c | 2 +-
> target/mips/tcg/sysemu/special_helper.c | 2 +-
> target/openrisc/cpu.c | 2 +-
> target/riscv/cpu.c | 4 +-
> target/rx/cpu.c | 2 +-
> target/sh4/cpu.c | 4 +-
> target/sparc/cpu.c | 2 +-
> target/tricore/cpu.c | 2 +-
> tcg/tcg.c | 6 +-
> 25 files changed, 226 insertions(+), 115 deletions(-)
>
next prev parent reply other threads:[~2022-09-06 10:12 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-06 9:11 [PATCH v4 0/7] tcg: pc-relative translation blocks Richard Henderson
2022-09-06 9:11 ` [PATCH v4 1/7] accel/tcg: Use bool for page_find_alloc Richard Henderson
2022-09-06 13:04 ` Philippe Mathieu-Daudé via
2022-09-21 20:04 ` Alex Bennée
2022-09-06 9:11 ` [PATCH v4 2/7] accel/tcg: Use DisasContextBase in plugin_gen_tb_start Richard Henderson
2022-09-21 20:09 ` Alex Bennée
2022-09-06 9:11 ` [PATCH v4 3/7] accel/tcg: Do not align tb->page_addr[0] Richard Henderson
2022-09-06 9:11 ` [PATCH v4 4/7] include/hw/core: Create struct CPUJumpCache Richard Henderson
2022-09-06 13:08 ` Philippe Mathieu-Daudé via
2022-09-06 9:11 ` [PATCH v4 5/7] accel/tcg: Introduce tb_pc and tb_pc_log Richard Henderson
2022-09-06 9:11 ` [PATCH v4 6/7] accel/tcg: Introduce TARGET_TB_PCREL Richard Henderson
2022-09-06 9:11 ` [PATCH v4 7/7] accel/tcg: Split log_cpu_exec into inline and slow path Richard Henderson
2022-09-06 13:30 ` Philippe Mathieu-Daudé via
2022-09-06 9:28 ` Richard Henderson [this message]
2022-09-06 9:29 ` [PATCH v4 0/7] tcg: pc-relative translation blocks Richard Henderson
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