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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: "Inès Varhol" <ines.varhol@telecom-paris.fr>, qemu-devel@nongnu.org
Cc: "Paolo Bonzini" <pbonzini@redhat.com>,
	"Thomas Huth" <thuth@redhat.com>,
	"Marc-André Lureau" <marcandre.lureau@redhat.com>,
	qemu-arm@nongnu.org, "Laurent Vivier" <lvivier@redhat.com>,
	"Samuel Tardieu" <sam@rfc1149.net>,
	"Arnaud Minier" <arnaud.minier@telecom-paris.fr>,
	"Peter Maydell" <peter.maydell@linaro.org>
Subject: Re: [PATCH v4 2/5] hw/arm : Pass STM32L4x5 SYSCFG gpios to STM32L4x5 SoC
Date: Mon, 15 Apr 2024 11:35:08 +0200	[thread overview]
Message-ID: <d0ec7672-8604-4a9e-9a4a-90fd89e419b6@linaro.org> (raw)
In-Reply-To: <11343bd1-1f0d-4654-a50d-f3b19fabf9e8@linaro.org>

On 15/4/24 11:29, Philippe Mathieu-Daudé wrote:
> Hi Inès,
> 
> On 14/4/24 15:05, Inès Varhol wrote:
>> Exposing SYSCFG inputs to the SoC is practical in order to wire the SoC
>> to the optional DM163 display from the board code (GPIOs outputs need
>> to be connected to both SYSCFG inputs and DM163 inputs).
>>
>> STM32L4x5 SYSCFG in-irq interception needed to be changed accordingly.
>>
>> Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr>
>> Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr>
>> ---
>>   hw/arm/stm32l4x5_soc.c              |  6 ++++--
>>   tests/qtest/stm32l4x5_gpio-test.c   | 12 +++++++-----
>>   tests/qtest/stm32l4x5_syscfg-test.c | 16 +++++++++-------
>>   3 files changed, 20 insertions(+), 14 deletions(-)
>>
>> diff --git a/hw/arm/stm32l4x5_soc.c b/hw/arm/stm32l4x5_soc.c
>> index 40e294f838..c4b45e6956 100644
>> --- a/hw/arm/stm32l4x5_soc.c
>> +++ b/hw/arm/stm32l4x5_soc.c
>> @@ -1,8 +1,8 @@
>>   /*
>>    * STM32L4x5 SoC family
>>    *
>> - * Copyright (c) 2023 Arnaud Minier <arnaud.minier@telecom-paris.fr>
>> - * Copyright (c) 2023 Inès Varhol <ines.varhol@telecom-paris.fr>
>> + * Copyright (c) 2024 Arnaud Minier <arnaud.minier@telecom-paris.fr>
>> + * Copyright (c) 2024 Inès Varhol <ines.varhol@telecom-paris.fr>
> 
> You can keep 2023-2024.
> 
>>    *
>>    * SPDX-License-Identifier: GPL-2.0-or-later
>>    *
>> @@ -221,6 +221,8 @@ static void stm32l4x5_soc_realize(DeviceState 
>> *dev_soc, Error **errp)
>>           }
>>       }
>> +    qdev_pass_gpios(DEVICE(&s->syscfg), dev_soc, NULL);
>> +
>>       /* EXTI device */
>>       busdev = SYS_BUS_DEVICE(&s->exti);
>>       if (!sysbus_realize(busdev, errp)) {
>> diff --git a/tests/qtest/stm32l4x5_gpio-test.c 
>> b/tests/qtest/stm32l4x5_gpio-test.c
>> index 0f6bda54d3..495a6fc413 100644
>> --- a/tests/qtest/stm32l4x5_gpio-test.c
>> +++ b/tests/qtest/stm32l4x5_gpio-test.c
>> @@ -43,6 +43,8 @@
>>   #define OTYPER_PUSH_PULL 0
>>   #define OTYPER_OPEN_DRAIN 1
>> +#define SYSCFG "/machine/soc"
> 
> Can we have a comment such /* SoC forwards GPIOs to SysCfg */?
> 
> (Similar comments for stm32l4x5_syscfg-test.c).

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>




  reply	other threads:[~2024-04-15  9:35 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-14 13:05 [PATCH v4 0/5] Add device DM163 (led driver, matrix colors shield & display) Inès Varhol
2024-04-14 13:05 ` [PATCH v4 1/5] hw/display : Add device DM163 Inès Varhol
2024-04-15 10:00   ` Philippe Mathieu-Daudé
2024-04-14 13:05 ` [PATCH v4 2/5] hw/arm : Pass STM32L4x5 SYSCFG gpios to STM32L4x5 SoC Inès Varhol
2024-04-15  9:29   ` Philippe Mathieu-Daudé
2024-04-15  9:35     ` Philippe Mathieu-Daudé [this message]
2024-04-14 13:05 ` [PATCH v4 3/5] hw/arm : Create Bl475eMachineState Inès Varhol
2024-04-15  9:30   ` Philippe Mathieu-Daudé
2024-04-14 13:05 ` [PATCH v4 4/5] hw/arm : Connect DM163 to B-L475E-IOT01A Inès Varhol
2024-04-15  9:41   ` Philippe Mathieu-Daudé
2024-04-14 13:05 ` [PATCH v4 5/5] tests/qtest : Add testcase for DM163 Inès Varhol
2024-04-15  5:11   ` Thomas Huth
2024-04-15  9:37   ` Philippe Mathieu-Daudé

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