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From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= To: Helge Deller , qemu-devel@nongnu.org, Richard Henderson Cc: Sven Schnelle , Anton Johansson References: <20220131213529.17404-1-deller@gmx.de> <20220131213529.17404-4-deller@gmx.de> Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=philmd@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, T_SCC_BODY_TEXT_LINE=-0.01, T_SPF_TEMPERROR=0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi Helge & Richard, Nevermind the missed review comments, I'm revisiting this patch while looking at building libtcg-hppa.so. On 1/2/22 00:56, Philippe Mathieu-Daudé wrote: > On 31/1/22 22:35, Helge Deller wrote: >> Almost all PA-RISC machines have either a button that is labeled with >> 'TOC' or >> a BMC/GSP function to trigger a TOC.  TOC is a non-maskable interrupt >> that is >> sent to the processor.  This can be used for diagnostic purposes like >> obtaining >> a stack trace/register dump or to enter KDB/KGDB in Linux. >> >> This patch adds support for such an emulated TOC button. >> >> It wires up the qemu monitor "nmi" command to trigger a TOC.  For that it > > s/qemu/QEMU/ (few others). > >> provides the hppa_nmi function which is assigned to the >> nmi_monitor_handler >> function pointer.  When called it raises the EXCP_TOC hardware >> interrupt in the >> hppa_cpu_do_interrupt() function.  The interrupt function then calls the >> architecturally defined TOC function in SeaBIOS-hppa firmware (at >> fixed address >> 0xf0000000). >> >> According to the PA-RISC PDC specification, the SeaBIOS firmware then >> writes >> the CPU registers into PIM (processor internal memmory) for later >> analysis.  In > > Typo "memory". > >> order to write all registers it needs to know the contents of the CPU >> "shadow >> registers" and the IASQ- and IAOQ-back values. The IAOQ/IASQ values are >> provided by qemu in shadow registers when entering the SeaBIOS TOC >> function. >> This patch adds a new aritificial opcode "getshadowregs" (0xfffdead2) >> which > > Typo "artificial". > >> restores the original values of the shadow registers. With this opcode >> SeaBIOS >> can store those registers as well into PIM before calling an >> OS-provided TOC >> handler. >> >> To trigger a TOC, switch to the qemu monitor with Ctrl-A C, and type >> in the >> command "nmi".  After the TOC started the OS-debugger, exit the qemu >> monitor >> with Ctrl-A C. IIUC you are abusing TOC to communicate with SeaBIOS, filling iaoq_f with SeaBIOS-specific 0xf0000000, unrelated to the pa2.0 spec; is that correct? I'm trying to see how to integrate firmware specific knowledge into libtcg-hppa.so which is supposed to be only architectured parts (usually we handle firmware stuffs in machine code, not translation one). Regards, Phil. >> Signed-off-by: Helge Deller >> --- >>   hw/hppa/machine.c        | 35 ++++++++++++++++++++++++++++++++++- >>   target/hppa/cpu.c        |  2 +- >>   target/hppa/cpu.h        |  5 +++++ >>   target/hppa/helper.h     |  1 + >>   target/hppa/insns.decode |  1 + >>   target/hppa/int_helper.c | 19 ++++++++++++++++++- >>   target/hppa/op_helper.c  |  7 ++++++- >>   target/hppa/translate.c  | 10 ++++++++++ >>   8 files changed, 76 insertions(+), 4 deletions(-) >> +static const TypeInfo machine_hppa_machine_init_typeinfo = { >> +    .name = ("hppa" "-machine"), > >        .name = MACHINE_TYPE_NAME("hppa"), > >> +    .parent = "machine", >> +    .class_init = machine_hppa_machine_init_class_init, >> +    .interfaces = (InterfaceInfo[]) { >> +        { TYPE_NMI }, >> +        { } >> +    }, >> +};