From: Richard Henderson <richard.henderson@linaro.org>
To: "Matheus K. Ferst" <matheus.ferst@eldorado.org.br>,
qemu-devel@nongnu.org, qemu-ppc@nongnu.org
Cc: peter.maydell@linaro.org, danielhb413@gmail.com, groug@kaod.org,
f4bug@amsat.org, clg@kaod.org, alex.bennee@linaro.org,
aurelien@aurel32.net, david@gibson.dropbear.id.au
Subject: Re: [PATCH] tests/tcg/ppc64le: remove INT128 requirement to run non_signalling_xscv
Date: Mon, 20 Dec 2021 11:18:02 -0800 [thread overview]
Message-ID: <d220766e-9022-8a59-79d5-33a889c49c02@linaro.org> (raw)
In-Reply-To: <493cf62e-2a80-08b4-1d0b-72b222a0bbd8@eldorado.org.br>
On 12/20/21 4:18 AM, Matheus K. Ferst wrote:
> I'd like to avoid mtvsrdd/mfvsrld because they were introduced in PowerISA v3.0, and
> xscvspdpn/xscvdpspn are from v2.07.
Fair enough, I suppose.
> How about
>
> asm("mtvsrd 0, %2\n\t"
> "mtvsrd 1, %3\n\t"
> "xxmrghd 0, 0, 1\n\t"
> INSN " 0, 0\n\t"
> "mfvsrd %0, 0\n\t"
> "xxswapd 0, 0\n\t"
> "mfvsrd %1, 0\n\t"
> : "=r" (th), "=r" (tl)
> : "r" (bh), "r" (bl)
> : "vs0", "vs1");
>
> ?
Looks good.
r~
prev parent reply other threads:[~2021-12-20 19:22 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-16 14:09 [PATCH] tests/tcg/ppc64le: remove INT128 requirement to run non_signalling_xscv matheus.ferst
2021-12-17 23:54 ` Richard Henderson
2021-12-20 12:18 ` Matheus K. Ferst
2021-12-20 19:18 ` Richard Henderson [this message]
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