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Tue, 14 Jun 2022 09:53:37 +0000 (GMT) Received: from [9.145.3.226] (unknown [9.145.3.226]) by b06wcsmtp001.portsmouth.uk.ibm.com (Postfix) with ESMTP; Tue, 14 Jun 2022 09:53:37 +0000 (GMT) Message-ID: Date: Tue, 14 Jun 2022 11:53:36 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.9.0 Subject: Re: [PATCH 08/11] ppc/pnv: turn chip8->phbs[] into a PnvPHB3* array Content-Language: en-US To: Daniel Henrique Barboza , qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, clg@kaod.org, mark.cave-ayland@ilande.co.uk References: <20220613154456.359674-1-danielhb@linux.ibm.com> <20220613154456.359674-9-danielhb@linux.ibm.com> From: Frederic Barrat In-Reply-To: <20220613154456.359674-9-danielhb@linux.ibm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: xZBYBE7i8gulnXlE-RM5l83V41i8Qvhd X-Proofpoint-GUID: xZBYBE7i8gulnXlE-RM5l83V41i8Qvhd X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.874,Hydra:6.0.517,FMLib:17.11.64.514 definitions=2022-06-14_02,2022-06-13_01,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=735 malwarescore=0 impostorscore=0 suspectscore=0 phishscore=0 priorityscore=1501 adultscore=0 clxscore=1015 spamscore=0 bulkscore=0 lowpriorityscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2204290000 definitions=main-2206140037 Received-SPF: pass client-ip=148.163.156.1; envelope-from=fbarrat@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 13/06/2022 17:44, Daniel Henrique Barboza wrote: > When enabling user created PHBs (a change reverted by commit 9c10d86fee) > we were handling PHBs created by default versus by the user in different > manners. The only difference between these PHBs is that one will have a > valid phb3->chip that is assigned during pnv_chip_power8_realize(), > while the user created needs to search which chip it belongs to. > > Aside from that there shouldn't be any difference. Making the default > PHBs behave in line with the user created ones will make it easier to > re-introduce them later on. It will also make the code easier to follow > since we are dealing with them in equal manner. > > The first step is to turn chip8->phbs[] into a PnvPHB3 pointer array. > This will allow us to assign user created PHBs into it later on. The way > we initilize the default case is now more in line with that would happen > with the user created case: the object is created, parented by the chip > because pnv_xscom_dt() relies on it, and then assigned to the array. > > Signed-off-by: Daniel Henrique Barboza > --- This patch is more prep work for the user-created device instead of general cleanup like the previous ones, but I don't see anything wrong with it. So: Reviewed-by: Frederic Barrat Fred > hw/ppc/pnv.c | 19 ++++++++++++++----- > include/hw/ppc/pnv.h | 6 +++++- > 2 files changed, 19 insertions(+), 6 deletions(-) > > diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c > index 5e3323e950..6ce9e94e05 100644 > --- a/hw/ppc/pnv.c > +++ b/hw/ppc/pnv.c > @@ -660,7 +660,7 @@ static void pnv_chip_power8_pic_print_info(PnvChip *chip, Monitor *mon) > ics_pic_print_info(&chip8->psi.ics, mon); > > for (i = 0; i < chip8->num_phbs; i++) { > - PnvPHB3 *phb3 = &chip8->phbs[i]; > + PnvPHB3 *phb3 = chip8->phbs[i]; > > pnv_phb3_msi_pic_print_info(&phb3->msis, mon); > ics_pic_print_info(&phb3->lsis, mon); > @@ -1149,7 +1149,16 @@ static void pnv_chip_power8_instance_init(Object *obj) > chip8->num_phbs = pcc->num_phbs; > > for (i = 0; i < chip8->num_phbs; i++) { > - object_initialize_child(obj, "phb[*]", &chip8->phbs[i], TYPE_PNV_PHB3); > + PnvPHB3 *phb3 = PNV_PHB3(object_new(TYPE_PNV_PHB3)); > + > + /* > + * We need the chip to parent the PHB to allow the DT > + * to build correctly (via pnv_xscom_dt()). > + * > + * TODO: the PHB should be parented by a PEC device. > + */ > + object_property_add_child(obj, "phb[*]", OBJECT(phb3)); > + chip8->phbs[i] = phb3; > } > > } > @@ -1278,7 +1287,7 @@ static void pnv_chip_power8_realize(DeviceState *dev, Error **errp) > > /* PHB3 controllers */ > for (i = 0; i < chip8->num_phbs; i++) { > - PnvPHB3 *phb = &chip8->phbs[i]; > + PnvPHB3 *phb = chip8->phbs[i]; > > object_property_set_int(OBJECT(phb), "index", i, &error_fatal); > object_property_set_int(OBJECT(phb), "chip-id", chip->chip_id, > @@ -1963,7 +1972,7 @@ static ICSState *pnv_ics_get(XICSFabric *xi, int irq) > } > > for (j = 0; j < chip8->num_phbs; j++) { > - pnv_ics_get_phb_ics(&chip8->phbs[j], &args); > + pnv_ics_get_phb_ics(chip8->phbs[j], &args); > > if (args.ics) { > return args.ics; > @@ -1996,7 +2005,7 @@ static void pnv_ics_resend(XICSFabric *xi) > Pnv8Chip *chip8 = PNV8_CHIP(pnv->chips[i]); > > for (j = 0; j < chip8->num_phbs; j++) { > - PnvPHB3 *phb3 = &chip8->phbs[j]; > + PnvPHB3 *phb3 = chip8->phbs[j]; > > ics_resend(&phb3->lsis); > ics_resend(ICS(&phb3->msis)); > diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h > index 033890a23f..11f1089289 100644 > --- a/include/hw/ppc/pnv.h > +++ b/include/hw/ppc/pnv.h > @@ -80,7 +80,11 @@ struct Pnv8Chip { > PnvHomer homer; > > #define PNV8_CHIP_PHB3_MAX 4 > - PnvPHB3 phbs[PNV8_CHIP_PHB3_MAX]; > + /* > + * The array is used to allow quick access to the phbs by > + * pnv_ics_get_child() and pnv_ics_resend_child(). > + */ > + PnvPHB3 *phbs[PNV8_CHIP_PHB3_MAX]; > uint32_t num_phbs; > > XICSFabric *xics;