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From: Richard Henderson <richard.henderson@linaro.org>
To: Michael Clark <mjc@sifive.com>, qemu-devel@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>,
	Sagar Karandikar <sagark@eecs.berkeley.edu>,
	Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
	Palmer Dabbelt <palmer@sifive.com>,
	patches@groups.riscv.org
Subject: Re: [Qemu-devel] [PATCH] RISC-V: Fix missing break statement in disassembler
Date: Tue, 1 May 2018 11:41:32 -0700	[thread overview]
Message-ID: <d2446c1c-0142-37ae-9f43-ddb48d7a29b9@linaro.org> (raw)
In-Reply-To: <1525043888-90983-1-git-send-email-mjc@sifive.com>

On 04/29/2018 04:18 PM, Michael Clark wrote:
> This fixes an issue when disassembling rv128 c.sqsp,
> where the code erroneously fell through to c.swsp.
> 
> Cc: Palmer Dabbelt <palmer@sifive.com>
> Cc: Sagar Karandikar <sagark@eecs.berkeley.edu>
> Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
> Cc: Peter Maydell <peter.maydell@linaro.org>
> Signed-off-by: Michael Clark <mjc@sifive.com>
> ---
>  disas/riscv.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~

  reply	other threads:[~2018-05-01 18:41 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-29 23:18 [Qemu-devel] [PATCH] RISC-V: Fix missing break statement in disassembler Michael Clark
2018-05-01 18:41 ` Richard Henderson [this message]
2018-05-01 22:54 ` Philippe Mathieu-Daudé

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