* [PATCH-for-10.0 v2 01/13] hw/pci: Do not declare PCIBus::flags mask as enum
2024-11-26 11:21 [PATCH-for-10.0 v2 00/13] hw/boards: Remove legacy MachineClass::pci_allow_0_address flag Philippe Mathieu-Daudé
@ 2024-11-26 11:22 ` Philippe Mathieu-Daudé
2024-11-27 9:37 ` Philippe Mathieu-Daudé
2024-11-26 11:22 ` [PATCH-for-10.0 v2 02/13] hw/pci-bridge: Initialize bridge with parent bus flags Philippe Mathieu-Daudé
` (11 subsequent siblings)
12 siblings, 1 reply; 20+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-11-26 11:22 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-s390x, Thomas Huth, Michael S. Tsirkin, qemu-riscv,
Marcel Apfelbaum, Peter Maydell, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé
We use PCIBus::flags to mask various flags. It is not
an enum, and doing so confuses static analyzers. Rename
the enum as singular. Use a generic unsigned type for
the mask.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/hw/pci/pci_bus.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/hw/pci/pci_bus.h b/include/hw/pci/pci_bus.h
index 22613125462..6ecfe2e06d5 100644
--- a/include/hw/pci/pci_bus.h
+++ b/include/hw/pci/pci_bus.h
@@ -19,7 +19,7 @@ struct PCIBusClass {
uint16_t (*numa_node)(PCIBus *bus);
};
-enum PCIBusFlags {
+enum PCIBusFlag {
/* This bus is the root of a PCI domain */
PCI_BUS_IS_ROOT = 0x0001,
/* PCIe extended configuration space is accessible on this bus */
@@ -32,7 +32,7 @@ enum PCIBusFlags {
struct PCIBus {
BusState qbus;
- enum PCIBusFlags flags;
+ unsigned flags;
const PCIIOMMUOps *iommu_ops;
void *iommu_opaque;
uint8_t devfn_min;
--
2.45.2
^ permalink raw reply related [flat|nested] 20+ messages in thread* Re: [PATCH-for-10.0 v2 01/13] hw/pci: Do not declare PCIBus::flags mask as enum
2024-11-26 11:22 ` [PATCH-for-10.0 v2 01/13] hw/pci: Do not declare PCIBus::flags mask as enum Philippe Mathieu-Daudé
@ 2024-11-27 9:37 ` Philippe Mathieu-Daudé
2024-12-04 6:49 ` Thomas Huth
0 siblings, 1 reply; 20+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-11-27 9:37 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-s390x, Thomas Huth, Michael S. Tsirkin, qemu-riscv,
Marcel Apfelbaum, Peter Maydell, qemu-arm, Paolo Bonzini
On 26/11/24 12:22, Philippe Mathieu-Daudé wrote:
> We use PCIBus::flags to mask various flags. It is not
> an enum, and doing so confuses static analyzers. Rename
> the enum as singular. Use a generic unsigned type for
> the mask.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> include/hw/pci/pci_bus.h | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/include/hw/pci/pci_bus.h b/include/hw/pci/pci_bus.h
> index 22613125462..6ecfe2e06d5 100644
> --- a/include/hw/pci/pci_bus.h
> +++ b/include/hw/pci/pci_bus.h
> @@ -19,7 +19,7 @@ struct PCIBusClass {
> uint16_t (*numa_node)(PCIBus *bus);
> };
>
> -enum PCIBusFlags {
> +enum PCIBusFlag {
> /* This bus is the root of a PCI domain */
> PCI_BUS_IS_ROOT = 0x0001,
> /* PCIe extended configuration space is accessible on this bus */
(more diff context:)
PCI_BUS_EXTENDED_CONFIG_SPACE = 0x0002,
/* This is a CXL Type BUS */
PCI_BUS_CXL = 0x0004,
Enum would be the [0, 1, 2] bits. Since we define bitmask and use
bitmask arguments in the code, shouldn't we simply replace that
enum by #define?
> @@ -32,7 +32,7 @@ enum PCIBusFlags {
>
> struct PCIBus {
> BusState qbus;
> - enum PCIBusFlags flags;
> + unsigned flags;
> const PCIIOMMUOps *iommu_ops;
> void *iommu_opaque;
> uint8_t devfn_min;
^ permalink raw reply [flat|nested] 20+ messages in thread* Re: [PATCH-for-10.0 v2 01/13] hw/pci: Do not declare PCIBus::flags mask as enum
2024-11-27 9:37 ` Philippe Mathieu-Daudé
@ 2024-12-04 6:49 ` Thomas Huth
0 siblings, 0 replies; 20+ messages in thread
From: Thomas Huth @ 2024-12-04 6:49 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: qemu-ppc, qemu-s390x, Michael S. Tsirkin, qemu-riscv,
Marcel Apfelbaum, Peter Maydell, qemu-arm, Paolo Bonzini
On 27/11/2024 10.37, Philippe Mathieu-Daudé wrote:
> On 26/11/24 12:22, Philippe Mathieu-Daudé wrote:
>> We use PCIBus::flags to mask various flags. It is not
>> an enum, and doing so confuses static analyzers. Rename
>> the enum as singular. Use a generic unsigned type for
>> the mask.
>>
>> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>> ---
>> include/hw/pci/pci_bus.h | 4 ++--
>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/include/hw/pci/pci_bus.h b/include/hw/pci/pci_bus.h
>> index 22613125462..6ecfe2e06d5 100644
>> --- a/include/hw/pci/pci_bus.h
>> +++ b/include/hw/pci/pci_bus.h
>> @@ -19,7 +19,7 @@ struct PCIBusClass {
>> uint16_t (*numa_node)(PCIBus *bus);
>> };
>> -enum PCIBusFlags {
>> +enum PCIBusFlag {
>> /* This bus is the root of a PCI domain */
>> PCI_BUS_IS_ROOT = 0x0001,
>> /* PCIe extended configuration space is accessible on this bus */
>
> (more diff context:)
>
> PCI_BUS_EXTENDED_CONFIG_SPACE = 0x0002,
> /* This is a CXL Type BUS */
> PCI_BUS_CXL = 0x0004,
>
> Enum would be the [0, 1, 2] bits. Since we define bitmask and use
> bitmask arguments in the code, shouldn't we simply replace that
> enum by #define?
Agreed, this rather sounds like #defines than an enum to me, too.
Thomas
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH-for-10.0 v2 02/13] hw/pci-bridge: Initialize bridge with parent bus flags
2024-11-26 11:21 [PATCH-for-10.0 v2 00/13] hw/boards: Remove legacy MachineClass::pci_allow_0_address flag Philippe Mathieu-Daudé
2024-11-26 11:22 ` [PATCH-for-10.0 v2 01/13] hw/pci: Do not declare PCIBus::flags mask as enum Philippe Mathieu-Daudé
@ 2024-11-26 11:22 ` Philippe Mathieu-Daudé
2024-11-26 11:22 ` [PATCH-for-10.0 v2 03/13] hw/pci: Factor machine_refuses_bar_at_addr_0() helper out Philippe Mathieu-Daudé
` (10 subsequent siblings)
12 siblings, 0 replies; 20+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-11-26 11:22 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-s390x, Thomas Huth, Michael S. Tsirkin, qemu-riscv,
Marcel Apfelbaum, Peter Maydell, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé
Bridged buses inherit their parent flag,
except they can not be a root.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/pci-bridge/pci_expander_bridge.c | 8 ++++++--
hw/pci/pci_bridge.c | 1 +
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c
index 07d411cff52..bbf615f544b 100644
--- a/hw/pci-bridge/pci_expander_bridge.c
+++ b/hw/pci-bridge/pci_expander_bridge.c
@@ -336,6 +336,7 @@ static bool pxb_dev_realize_common(PCIDevice *dev, enum BusType type,
PXBDev *pxb = PXB_DEV(dev);
DeviceState *ds, *bds = NULL;
PCIBus *bus;
+ PCIBus *parent_bus = pci_get_bus(dev);
const char *dev_name = NULL;
Error *local_err = NULL;
MachineState *ms = MACHINE(qdev_get_machine());
@@ -358,12 +359,15 @@ static bool pxb_dev_realize_common(PCIDevice *dev, enum BusType type,
ds = qdev_new(type == CXL ? TYPE_PXB_CXL_HOST : TYPE_PXB_HOST);
if (type == PCIE) {
bus = pci_root_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_PCIE_BUS);
+ bus->flags = parent_bus->flags & ~PCI_BUS_IS_ROOT;
} else if (type == CXL) {
bus = pci_root_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_CXL_BUS);
+ bus->flags = parent_bus->flags & ~PCI_BUS_IS_ROOT;
bus->flags |= PCI_BUS_CXL;
PXB_CXL_DEV(dev)->cxl_host_bridge = PXB_CXL_HOST(ds);
} else {
bus = pci_root_bus_new(ds, "pxb-internal", NULL, NULL, 0, TYPE_PXB_BUS);
+ bus->flags = parent_bus->flags & ~PCI_BUS_IS_ROOT;
bds = qdev_new("pci-bridge");
bds->id = g_strdup(dev_name);
qdev_prop_set_uint8(bds, PCI_BRIDGE_DEV_PROP_CHASSIS_NR, pxb->bus_nr);
@@ -371,8 +375,8 @@ static bool pxb_dev_realize_common(PCIDevice *dev, enum BusType type,
}
bus->parent_dev = dev;
- bus->address_space_mem = pci_get_bus(dev)->address_space_mem;
- bus->address_space_io = pci_get_bus(dev)->address_space_io;
+ bus->address_space_mem = parent_bus->address_space_mem;
+ bus->address_space_io = parent_bus->address_space_io;
bus->map_irq = pxb_map_irq_fn;
PCI_HOST_BRIDGE(ds)->bus = bus;
diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c
index 2c7bb1a5254..d47ded9e0cf 100644
--- a/hw/pci/pci_bridge.c
+++ b/hw/pci/pci_bridge.c
@@ -376,6 +376,7 @@ void pci_bridge_initfn(PCIDevice *dev, const char *typename)
qbus_init(sec_bus, sizeof(br->sec_bus), typename, DEVICE(dev),
br->bus_name);
+ sec_bus->flags = parent->flags & ~PCI_BUS_IS_ROOT;
sec_bus->parent_dev = dev;
sec_bus->map_irq = br->map_irq ? br->map_irq : pci_swizzle_map_irq_fn;
sec_bus->address_space_mem = &br->address_space_mem;
--
2.45.2
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH-for-10.0 v2 03/13] hw/pci: Factor machine_refuses_bar_at_addr_0() helper out
2024-11-26 11:21 [PATCH-for-10.0 v2 00/13] hw/boards: Remove legacy MachineClass::pci_allow_0_address flag Philippe Mathieu-Daudé
2024-11-26 11:22 ` [PATCH-for-10.0 v2 01/13] hw/pci: Do not declare PCIBus::flags mask as enum Philippe Mathieu-Daudé
2024-11-26 11:22 ` [PATCH-for-10.0 v2 02/13] hw/pci-bridge: Initialize bridge with parent bus flags Philippe Mathieu-Daudé
@ 2024-11-26 11:22 ` Philippe Mathieu-Daudé
2024-11-26 11:22 ` [PATCH-for-10.0 v2 04/13] hw/pci: Introduce PCIBusFlag::PCI_BUS_BAR_AT_ADDR0_REFUSED Philippe Mathieu-Daudé
` (9 subsequent siblings)
12 siblings, 0 replies; 20+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-11-26 11:22 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-s390x, Thomas Huth, Michael S. Tsirkin, qemu-riscv,
Marcel Apfelbaum, Peter Maydell, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé
Since we are going to re-use access to the
MachineClass::pci_allow_0_address field, factor the
current code as a new machine_refuses_bar_at_addr_0()
helper. In pci_bar_address() invert 'allow_0_address'
logic as 'bar_at_addr_0_refused'.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/pci/pci.c | 14 ++++++++++----
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index 1416ae202c3..e05f8a828bb 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -520,6 +520,13 @@ bool pci_bus_bypass_iommu(PCIBus *bus)
return host_bridge->bypass_iommu;
}
+static bool machine_refuses_bar_at_addr_0(void)
+{
+ MachineClass *mc = MACHINE_GET_CLASS(qdev_get_machine());
+
+ return !mc->pci_allow_0_address;
+}
+
static void pci_root_bus_internal_init(PCIBus *bus, DeviceState *parent,
MemoryRegion *mem, MemoryRegion *io,
uint8_t devfn_min)
@@ -1472,8 +1479,7 @@ pcibus_t pci_bar_address(PCIDevice *d,
{
pcibus_t new_addr, last_addr;
uint16_t cmd = pci_get_word(d->config + PCI_COMMAND);
- MachineClass *mc = MACHINE_GET_CLASS(qdev_get_machine());
- bool allow_0_address = mc->pci_allow_0_address;
+ bool bar_at_addr_0_refused = machine_refuses_bar_at_addr_0();
if (type & PCI_BASE_ADDRESS_SPACE_IO) {
if (!(cmd & PCI_COMMAND_IO)) {
@@ -1485,7 +1491,7 @@ pcibus_t pci_bar_address(PCIDevice *d,
* TODO: make priorities correct and remove this work around.
*/
if (last_addr <= new_addr || last_addr >= UINT32_MAX ||
- (!allow_0_address && new_addr == 0)) {
+ (bar_at_addr_0_refused && new_addr == 0)) {
return PCI_BAR_UNMAPPED;
}
return new_addr;
@@ -1506,7 +1512,7 @@ pcibus_t pci_bar_address(PCIDevice *d,
mappings, we handle specific values as invalid
mappings. */
if (last_addr <= new_addr || last_addr == PCI_BAR_UNMAPPED ||
- (!allow_0_address && new_addr == 0)) {
+ (bar_at_addr_0_refused && new_addr == 0)) {
return PCI_BAR_UNMAPPED;
}
--
2.45.2
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH-for-10.0 v2 04/13] hw/pci: Introduce PCIBusFlag::PCI_BUS_BAR_AT_ADDR0_REFUSED
2024-11-26 11:21 [PATCH-for-10.0 v2 00/13] hw/boards: Remove legacy MachineClass::pci_allow_0_address flag Philippe Mathieu-Daudé
` (2 preceding siblings ...)
2024-11-26 11:22 ` [PATCH-for-10.0 v2 03/13] hw/pci: Factor machine_refuses_bar_at_addr_0() helper out Philippe Mathieu-Daudé
@ 2024-11-26 11:22 ` Philippe Mathieu-Daudé
2024-11-26 11:22 ` [PATCH-for-10.0 v2 05/13] hw/pci: Propagate bar_at_addr_0_refused to pci_root_bus_internal_init() Philippe Mathieu-Daudé
` (8 subsequent siblings)
12 siblings, 0 replies; 20+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-11-26 11:22 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-s390x, Thomas Huth, Michael S. Tsirkin, qemu-riscv,
Marcel Apfelbaum, Peter Maydell, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé
Some machines need PCI buses to allow access at BAR0.
Introduce the PCI_BUS_BAR_AT_ADDR0_REFUSED flag and the
pci_bus_refuse_bar_at_addr_0() helper. Set the flag in
pci_root_bus_internal_init() where all root buses are
created.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/hw/pci/pci_bus.h | 6 ++++++
hw/pci/pci.c | 5 ++++-
2 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/include/hw/pci/pci_bus.h b/include/hw/pci/pci_bus.h
index 6ecfe2e06d5..6d7bf682e8f 100644
--- a/include/hw/pci/pci_bus.h
+++ b/include/hw/pci/pci_bus.h
@@ -26,6 +26,7 @@ enum PCIBusFlag {
PCI_BUS_EXTENDED_CONFIG_SPACE = 0x0002,
/* This is a CXL Type BUS */
PCI_BUS_CXL = 0x0004,
+ PCI_BUS_BAR_AT_ADDR0_REFUSED = 0x0008,
};
#define PCI_NO_PASID UINT32_MAX
@@ -72,4 +73,9 @@ static inline bool pci_bus_allows_extended_config_space(PCIBus *bus)
return !!(bus->flags & PCI_BUS_EXTENDED_CONFIG_SPACE);
}
+static inline bool pci_bus_refuse_bar_at_addr_0(PCIBus *bus)
+{
+ return !!(bus->flags & PCI_BUS_BAR_AT_ADDR0_REFUSED);
+}
+
#endif /* QEMU_PCI_BUS_H */
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index e05f8a828bb..27b66583e54 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -537,6 +537,9 @@ static void pci_root_bus_internal_init(PCIBus *bus, DeviceState *parent,
bus->address_space_mem = mem;
bus->address_space_io = io;
bus->flags |= PCI_BUS_IS_ROOT;
+ if (machine_refuses_bar_at_addr_0()) {
+ bus->flags |= PCI_BUS_BAR_AT_ADDR0_REFUSED;
+ }
/* host bridge */
QLIST_INIT(&bus->child);
@@ -1479,7 +1482,7 @@ pcibus_t pci_bar_address(PCIDevice *d,
{
pcibus_t new_addr, last_addr;
uint16_t cmd = pci_get_word(d->config + PCI_COMMAND);
- bool bar_at_addr_0_refused = machine_refuses_bar_at_addr_0();
+ bool bar_at_addr_0_refused = pci_bus_refuse_bar_at_addr_0(pci_get_bus(d));
if (type & PCI_BASE_ADDRESS_SPACE_IO) {
if (!(cmd & PCI_COMMAND_IO)) {
--
2.45.2
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH-for-10.0 v2 05/13] hw/pci: Propagate bar_at_addr_0_refused to pci_root_bus_internal_init()
2024-11-26 11:21 [PATCH-for-10.0 v2 00/13] hw/boards: Remove legacy MachineClass::pci_allow_0_address flag Philippe Mathieu-Daudé
` (3 preceding siblings ...)
2024-11-26 11:22 ` [PATCH-for-10.0 v2 04/13] hw/pci: Introduce PCIBusFlag::PCI_BUS_BAR_AT_ADDR0_REFUSED Philippe Mathieu-Daudé
@ 2024-11-26 11:22 ` Philippe Mathieu-Daudé
2024-12-05 16:44 ` Peter Maydell
2024-11-26 11:22 ` [PATCH-for-10.0 v2 06/13] hw/pci: Propagate bar_at_addr_0_refused to pci_root_bus_init() Philippe Mathieu-Daudé
` (7 subsequent siblings)
12 siblings, 1 reply; 20+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-11-26 11:22 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-s390x, Thomas Huth, Michael S. Tsirkin, qemu-riscv,
Marcel Apfelbaum, Peter Maydell, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé
Have pci_root_bus_internal_init() callers set the
'bar_at_addr_0_refused' argument. No logical change.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/pci/pci.c | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index 27b66583e54..8eacb8f82fc 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -529,7 +529,8 @@ static bool machine_refuses_bar_at_addr_0(void)
static void pci_root_bus_internal_init(PCIBus *bus, DeviceState *parent,
MemoryRegion *mem, MemoryRegion *io,
- uint8_t devfn_min)
+ uint8_t devfn_min,
+ bool bar_at_addr_0_refused)
{
assert(PCI_FUNC(devfn_min) == 0);
bus->devfn_min = devfn_min;
@@ -537,7 +538,7 @@ static void pci_root_bus_internal_init(PCIBus *bus, DeviceState *parent,
bus->address_space_mem = mem;
bus->address_space_io = io;
bus->flags |= PCI_BUS_IS_ROOT;
- if (machine_refuses_bar_at_addr_0()) {
+ if (bar_at_addr_0_refused && machine_refuses_bar_at_addr_0()) {
bus->flags |= PCI_BUS_BAR_AT_ADDR0_REFUSED;
}
@@ -563,7 +564,8 @@ void pci_root_bus_init(PCIBus *bus, size_t bus_size, DeviceState *parent,
uint8_t devfn_min, const char *typename)
{
qbus_init(bus, bus_size, typename, parent, name);
- pci_root_bus_internal_init(bus, parent, mem, io, devfn_min);
+ pci_root_bus_internal_init(bus, parent, mem, io, devfn_min,
+ true);
}
PCIBus *pci_root_bus_new(DeviceState *parent, const char *name,
@@ -573,7 +575,8 @@ PCIBus *pci_root_bus_new(DeviceState *parent, const char *name,
PCIBus *bus;
bus = PCI_BUS(qbus_new(typename, parent, name));
- pci_root_bus_internal_init(bus, parent, mem, io, devfn_min);
+ pci_root_bus_internal_init(bus, parent, mem, io, devfn_min,
+ true);
return bus;
}
--
2.45.2
^ permalink raw reply related [flat|nested] 20+ messages in thread* Re: [PATCH-for-10.0 v2 05/13] hw/pci: Propagate bar_at_addr_0_refused to pci_root_bus_internal_init()
2024-11-26 11:22 ` [PATCH-for-10.0 v2 05/13] hw/pci: Propagate bar_at_addr_0_refused to pci_root_bus_internal_init() Philippe Mathieu-Daudé
@ 2024-12-05 16:44 ` Peter Maydell
2024-12-05 21:24 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 20+ messages in thread
From: Peter Maydell @ 2024-12-05 16:44 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, qemu-ppc, qemu-s390x, Thomas Huth, Michael S. Tsirkin,
qemu-riscv, Marcel Apfelbaum, qemu-arm, Paolo Bonzini
On Tue, 26 Nov 2024 at 11:22, Philippe Mathieu-Daudé <philmd@linaro.org> wrote:
>
> Have pci_root_bus_internal_init() callers set the
> 'bar_at_addr_0_refused' argument. No logical change.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> hw/pci/pci.c | 11 +++++++----
> 1 file changed, 7 insertions(+), 4 deletions(-)
>
> diff --git a/hw/pci/pci.c b/hw/pci/pci.c
> index 27b66583e54..8eacb8f82fc 100644
> --- a/hw/pci/pci.c
> +++ b/hw/pci/pci.c
> @@ -529,7 +529,8 @@ static bool machine_refuses_bar_at_addr_0(void)
>
> static void pci_root_bus_internal_init(PCIBus *bus, DeviceState *parent,
> MemoryRegion *mem, MemoryRegion *io,
> - uint8_t devfn_min)
> + uint8_t devfn_min,
> + bool bar_at_addr_0_refused)
> {
> assert(PCI_FUNC(devfn_min) == 0);
> bus->devfn_min = devfn_min;
> @@ -537,7 +538,7 @@ static void pci_root_bus_internal_init(PCIBus *bus, DeviceState *parent,
> bus->address_space_mem = mem;
> bus->address_space_io = io;
> bus->flags |= PCI_BUS_IS_ROOT;
> - if (machine_refuses_bar_at_addr_0()) {
> + if (bar_at_addr_0_refused && machine_refuses_bar_at_addr_0()) {
Should this be || rather than && ? If I understand the
intent correctly, we want to prevent a BAR at address 0
if either:
* the MachineClass field says we don't want one
(legacy handling, eventually goes away)
* the new command line argument says we don't want one
rather than only if *both* say "no address 0" ?
thanks
-- PMM
^ permalink raw reply [flat|nested] 20+ messages in thread* Re: [PATCH-for-10.0 v2 05/13] hw/pci: Propagate bar_at_addr_0_refused to pci_root_bus_internal_init()
2024-12-05 16:44 ` Peter Maydell
@ 2024-12-05 21:24 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 20+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-12-05 21:24 UTC (permalink / raw)
To: Peter Maydell
Cc: qemu-devel, qemu-ppc, qemu-s390x, Thomas Huth, Michael S. Tsirkin,
qemu-riscv, Marcel Apfelbaum, qemu-arm, Paolo Bonzini
On 5/12/24 17:44, Peter Maydell wrote:
> On Tue, 26 Nov 2024 at 11:22, Philippe Mathieu-Daudé <philmd@linaro.org> wrote:
>>
>> Have pci_root_bus_internal_init() callers set the
>> 'bar_at_addr_0_refused' argument. No logical change.
>>
>> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>> ---
>> hw/pci/pci.c | 11 +++++++----
>> 1 file changed, 7 insertions(+), 4 deletions(-)
>>
>> diff --git a/hw/pci/pci.c b/hw/pci/pci.c
>> index 27b66583e54..8eacb8f82fc 100644
>> --- a/hw/pci/pci.c
>> +++ b/hw/pci/pci.c
>> @@ -529,7 +529,8 @@ static bool machine_refuses_bar_at_addr_0(void)
>>
>> static void pci_root_bus_internal_init(PCIBus *bus, DeviceState *parent,
>> MemoryRegion *mem, MemoryRegion *io,
>> - uint8_t devfn_min)
>> + uint8_t devfn_min,
>> + bool bar_at_addr_0_refused)
>> {
>> assert(PCI_FUNC(devfn_min) == 0);
>> bus->devfn_min = devfn_min;
>> @@ -537,7 +538,7 @@ static void pci_root_bus_internal_init(PCIBus *bus, DeviceState *parent,
>> bus->address_space_mem = mem;
>> bus->address_space_io = io;
>> bus->flags |= PCI_BUS_IS_ROOT;
>> - if (machine_refuses_bar_at_addr_0()) {
>> + if (bar_at_addr_0_refused && machine_refuses_bar_at_addr_0()) {
>
> Should this be || rather than && ? If I understand the
> intent correctly, we want to prevent a BAR at address 0
> if either:
> * the MachineClass field says we don't want one
> (legacy handling, eventually goes away)
> * the new command line argument says we don't want one
>
> rather than only if *both* say "no address 0" ?
Oops :)
>
> thanks
> -- PMM
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH-for-10.0 v2 06/13] hw/pci: Propagate bar_at_addr_0_refused to pci_root_bus_init()
2024-11-26 11:21 [PATCH-for-10.0 v2 00/13] hw/boards: Remove legacy MachineClass::pci_allow_0_address flag Philippe Mathieu-Daudé
` (4 preceding siblings ...)
2024-11-26 11:22 ` [PATCH-for-10.0 v2 05/13] hw/pci: Propagate bar_at_addr_0_refused to pci_root_bus_internal_init() Philippe Mathieu-Daudé
@ 2024-11-26 11:22 ` Philippe Mathieu-Daudé
2024-11-26 11:22 ` [PATCH-for-10.0 v2 07/13] hw/pci: Propagate bar_at_addr_0_refused to pci_root_bus_new() Philippe Mathieu-Daudé
` (6 subsequent siblings)
12 siblings, 0 replies; 20+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-11-26 11:22 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-s390x, Thomas Huth, Michael S. Tsirkin, qemu-riscv,
Marcel Apfelbaum, Peter Maydell, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé
Have pci_root_bus_init() callers set the
'bar_at_addr_0_refused' argument. No logical change.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/hw/pci/pci.h | 3 ++-
hw/pci-host/raven.c | 2 +-
hw/pci-host/versatile.c | 2 +-
hw/pci/pci.c | 5 +++--
4 files changed, 7 insertions(+), 5 deletions(-)
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index 135695c5511..b499846083f 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -284,7 +284,8 @@ bool pci_bus_is_express(const PCIBus *bus);
void pci_root_bus_init(PCIBus *bus, size_t bus_size, DeviceState *parent,
const char *name,
MemoryRegion *mem, MemoryRegion *io,
- uint8_t devfn_min, const char *typename);
+ uint8_t devfn_min, const char *typename,
+ bool bar_at_addr_0_refused);
PCIBus *pci_root_bus_new(DeviceState *parent, const char *name,
MemoryRegion *mem, MemoryRegion *io,
uint8_t devfn_min, const char *typename);
diff --git a/hw/pci-host/raven.c b/hw/pci-host/raven.c
index a7dfddd69ea..d5087af5ec6 100644
--- a/hw/pci-host/raven.c
+++ b/hw/pci-host/raven.c
@@ -313,7 +313,7 @@ static void raven_pcihost_initfn(Object *obj)
&s->pci_io_non_contiguous, 1);
memory_region_add_subregion(address_space_mem, 0xc0000000, &s->pci_memory);
pci_root_bus_init(&s->pci_bus, sizeof(s->pci_bus), DEVICE(obj), NULL,
- &s->pci_memory, &s->pci_io, 0, TYPE_PCI_BUS);
+ &s->pci_memory, &s->pci_io, 0, TYPE_PCI_BUS, true);
/* Bus master address space */
memory_region_init(&s->bm, obj, "bm-raven", 4 * GiB);
diff --git a/hw/pci-host/versatile.c b/hw/pci-host/versatile.c
index d257acee172..f82262f8d1e 100644
--- a/hw/pci-host/versatile.c
+++ b/hw/pci-host/versatile.c
@@ -407,7 +407,7 @@ static void pci_vpb_realize(DeviceState *dev, Error **errp)
pci_root_bus_init(&s->pci_bus, sizeof(s->pci_bus), dev, "pci",
&s->pci_mem_space, &s->pci_io_space,
- PCI_DEVFN(11, 0), TYPE_PCI_BUS);
+ PCI_DEVFN(11, 0), TYPE_PCI_BUS, true);
h->bus = &s->pci_bus;
object_initialize(&s->pci_dev, sizeof(s->pci_dev), TYPE_VERSATILE_PCI_HOST);
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index 8eacb8f82fc..f7158fb9573 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -561,11 +561,12 @@ bool pci_bus_is_express(const PCIBus *bus)
void pci_root_bus_init(PCIBus *bus, size_t bus_size, DeviceState *parent,
const char *name,
MemoryRegion *mem, MemoryRegion *io,
- uint8_t devfn_min, const char *typename)
+ uint8_t devfn_min, const char *typename,
+ bool bar_at_addr_0_refused)
{
qbus_init(bus, bus_size, typename, parent, name);
pci_root_bus_internal_init(bus, parent, mem, io, devfn_min,
- true);
+ bar_at_addr_0_refused);
}
PCIBus *pci_root_bus_new(DeviceState *parent, const char *name,
--
2.45.2
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH-for-10.0 v2 07/13] hw/pci: Propagate bar_at_addr_0_refused to pci_root_bus_new()
2024-11-26 11:21 [PATCH-for-10.0 v2 00/13] hw/boards: Remove legacy MachineClass::pci_allow_0_address flag Philippe Mathieu-Daudé
` (5 preceding siblings ...)
2024-11-26 11:22 ` [PATCH-for-10.0 v2 06/13] hw/pci: Propagate bar_at_addr_0_refused to pci_root_bus_init() Philippe Mathieu-Daudé
@ 2024-11-26 11:22 ` Philippe Mathieu-Daudé
2024-11-26 11:22 ` [PATCH-for-10.0 v2 08/13] hw/pci: Propagate bar_at_addr_0_refused to pci_register_root_bus() Philippe Mathieu-Daudé
` (5 subsequent siblings)
12 siblings, 0 replies; 20+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-11-26 11:22 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-s390x, Thomas Huth, Michael S. Tsirkin, qemu-riscv,
Marcel Apfelbaum, Peter Maydell, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé
Have pci_root_bus_new() callers set the
'bar_at_addr_0_refused' argument. No logical change.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/hw/pci/pci.h | 3 ++-
hw/pci-bridge/pci_expander_bridge.c | 9 ++++++---
hw/pci-host/gt64120.c | 2 +-
hw/pci-host/i440fx.c | 2 +-
hw/pci-host/q35.c | 2 +-
hw/pci-host/remote.c | 2 +-
hw/pci/pci.c | 7 ++++---
7 files changed, 16 insertions(+), 11 deletions(-)
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index b499846083f..f5454db0eb5 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -288,7 +288,8 @@ void pci_root_bus_init(PCIBus *bus, size_t bus_size, DeviceState *parent,
bool bar_at_addr_0_refused);
PCIBus *pci_root_bus_new(DeviceState *parent, const char *name,
MemoryRegion *mem, MemoryRegion *io,
- uint8_t devfn_min, const char *typename);
+ uint8_t devfn_min, const char *typename,
+ bool bar_at_addr_0_refused);
void pci_root_bus_cleanup(PCIBus *bus);
void pci_bus_irqs(PCIBus *bus, pci_set_irq_fn set_irq,
void *irq_opaque, int nirq);
diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c
index bbf615f544b..d4b472a8305 100644
--- a/hw/pci-bridge/pci_expander_bridge.c
+++ b/hw/pci-bridge/pci_expander_bridge.c
@@ -358,15 +358,18 @@ static bool pxb_dev_realize_common(PCIDevice *dev, enum BusType type,
ds = qdev_new(type == CXL ? TYPE_PXB_CXL_HOST : TYPE_PXB_HOST);
if (type == PCIE) {
- bus = pci_root_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_PCIE_BUS);
+ bus = pci_root_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_PCIE_BUS,
+ true);
bus->flags = parent_bus->flags & ~PCI_BUS_IS_ROOT;
} else if (type == CXL) {
- bus = pci_root_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_CXL_BUS);
+ bus = pci_root_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_CXL_BUS,
+ true);
bus->flags = parent_bus->flags & ~PCI_BUS_IS_ROOT;
bus->flags |= PCI_BUS_CXL;
PXB_CXL_DEV(dev)->cxl_host_bridge = PXB_CXL_HOST(ds);
} else {
- bus = pci_root_bus_new(ds, "pxb-internal", NULL, NULL, 0, TYPE_PXB_BUS);
+ bus = pci_root_bus_new(ds, "pxb-internal", NULL, NULL, 0, TYPE_PXB_BUS,
+ true);
bus->flags = parent_bus->flags & ~PCI_BUS_IS_ROOT;
bds = qdev_new("pci-bridge");
bds->id = g_strdup(dev_name);
diff --git a/hw/pci-host/gt64120.c b/hw/pci-host/gt64120.c
index 14fc803d279..3cc92e7200f 100644
--- a/hw/pci-host/gt64120.c
+++ b/hw/pci-host/gt64120.c
@@ -1193,7 +1193,7 @@ static void gt64120_realize(DeviceState *dev, Error **errp)
phb->bus = pci_root_bus_new(dev, "pci",
&s->pci0_mem,
get_system_io(),
- PCI_DEVFN(18, 0), TYPE_PCI_BUS);
+ PCI_DEVFN(18, 0), TYPE_PCI_BUS, true);
pci_create_simple(phb->bus, PCI_DEVFN(0, 0), "gt64120_pci");
memory_region_init_io(&phb->conf_mem, OBJECT(phb),
diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c
index 4f0a0438d77..35a54b953a7 100644
--- a/hw/pci-host/i440fx.c
+++ b/hw/pci-host/i440fx.c
@@ -268,7 +268,7 @@ static void i440fx_pcihost_realize(DeviceState *dev, Error **errp)
memory_region_add_coalescing(&phb->conf_mem, 0, 4);
b = pci_root_bus_new(dev, NULL, s->pci_address_space,
- s->io_memory, 0, TYPE_PCI_BUS);
+ s->io_memory, 0, TYPE_PCI_BUS, true);
phb->bus = b;
d = pci_create_simple(b, 0, s->pci_type);
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index f3e713318ed..e47ba7aa0c2 100644
--- a/hw/pci-host/q35.c
+++ b/hw/pci-host/q35.c
@@ -65,7 +65,7 @@ static void q35_host_realize(DeviceState *dev, Error **errp)
pci->bus = pci_root_bus_new(DEVICE(s), "pcie.0",
s->mch.pci_address_space,
s->mch.address_space_io,
- 0, TYPE_PCIE_BUS);
+ 0, TYPE_PCIE_BUS, true);
qdev_realize(DEVICE(&s->mch), BUS(pci->bus), &error_fatal);
}
diff --git a/hw/pci-host/remote.c b/hw/pci-host/remote.c
index bfb25ef6af8..646e14de4e9 100644
--- a/hw/pci-host/remote.c
+++ b/hw/pci-host/remote.c
@@ -43,7 +43,7 @@ static void remote_pcihost_realize(DeviceState *dev, Error **errp)
pci->bus = pci_root_bus_new(DEVICE(s), "remote-pci",
s->mr_pci_mem, s->mr_sys_io,
- 0, TYPE_PCIE_BUS);
+ 0, TYPE_PCIE_BUS, true);
}
static void remote_pcihost_class_init(ObjectClass *klass, void *data)
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index f7158fb9573..5fea39e4dfa 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -571,13 +571,14 @@ void pci_root_bus_init(PCIBus *bus, size_t bus_size, DeviceState *parent,
PCIBus *pci_root_bus_new(DeviceState *parent, const char *name,
MemoryRegion *mem, MemoryRegion *io,
- uint8_t devfn_min, const char *typename)
+ uint8_t devfn_min, const char *typename,
+ bool bar_at_addr_0_refused)
{
PCIBus *bus;
bus = PCI_BUS(qbus_new(typename, parent, name));
pci_root_bus_internal_init(bus, parent, mem, io, devfn_min,
- true);
+ bar_at_addr_0_refused);
return bus;
}
@@ -622,7 +623,7 @@ PCIBus *pci_register_root_bus(DeviceState *parent, const char *name,
{
PCIBus *bus;
- bus = pci_root_bus_new(parent, name, mem, io, devfn_min, typename);
+ bus = pci_root_bus_new(parent, name, mem, io, devfn_min, typename, true);
pci_bus_irqs(bus, set_irq, irq_opaque, nirq);
pci_bus_map_irqs(bus, map_irq);
return bus;
--
2.45.2
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH-for-10.0 v2 08/13] hw/pci: Propagate bar_at_addr_0_refused to pci_register_root_bus()
2024-11-26 11:21 [PATCH-for-10.0 v2 00/13] hw/boards: Remove legacy MachineClass::pci_allow_0_address flag Philippe Mathieu-Daudé
` (6 preceding siblings ...)
2024-11-26 11:22 ` [PATCH-for-10.0 v2 07/13] hw/pci: Propagate bar_at_addr_0_refused to pci_root_bus_new() Philippe Mathieu-Daudé
@ 2024-11-26 11:22 ` Philippe Mathieu-Daudé
2024-11-26 11:22 ` [PATCH-for-10.0 v2 09/13] hw/ppc/spapr: Create host bridge setting bar_at_addr_0_refused=false Philippe Mathieu-Daudé
` (4 subsequent siblings)
12 siblings, 0 replies; 20+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-11-26 11:22 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-s390x, Thomas Huth, Michael S. Tsirkin, qemu-riscv,
Marcel Apfelbaum, Peter Maydell, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé
Have pci_register_root_bus() callers set the
'bar_at_addr_0_refused' argument. No logical change.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/hw/pci/pci.h | 2 +-
hw/alpha/typhoon.c | 2 +-
hw/pci-host/articia.c | 3 ++-
hw/pci-host/astro.c | 3 ++-
hw/pci-host/bonito.c | 2 +-
hw/pci-host/designware.c | 2 +-
hw/pci-host/dino.c | 2 +-
hw/pci-host/gpex.c | 3 ++-
hw/pci-host/grackle.c | 2 +-
hw/pci-host/mv64361.c | 2 +-
hw/pci-host/pnv_phb3.c | 2 +-
hw/pci-host/pnv_phb4.c | 2 +-
hw/pci-host/ppc440_pcix.c | 2 +-
hw/pci-host/ppc4xx_pci.c | 2 +-
hw/pci-host/ppce500.c | 3 ++-
hw/pci-host/sabre.c | 2 +-
hw/pci-host/sh_pci.c | 2 +-
hw/pci-host/uninorth.c | 8 ++++----
hw/pci-host/xilinx-pcie.c | 2 +-
hw/pci/pci.c | 5 +++--
hw/ppc/ppc440_uc.c | 2 +-
hw/ppc/spapr_pci.c | 2 +-
hw/s390x/s390-pci-bus.c | 2 +-
23 files changed, 32 insertions(+), 27 deletions(-)
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index f5454db0eb5..216b1cbc13a 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -310,7 +310,7 @@ PCIBus *pci_register_root_bus(DeviceState *parent, const char *name,
void *irq_opaque,
MemoryRegion *mem, MemoryRegion *io,
uint8_t devfn_min, int nirq,
- const char *typename);
+ const char *typename, bool bar_at_addr_0_refused);
void pci_unregister_root_bus(PCIBus *bus);
void pci_bus_set_route_irq_fn(PCIBus *, pci_route_irq_fn);
PCIINTxRoute pci_device_route_intx_to_irq(PCIDevice *dev, int pin);
diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c
index e8711ae16a3..37f5e07e726 100644
--- a/hw/alpha/typhoon.c
+++ b/hw/alpha/typhoon.c
@@ -891,7 +891,7 @@ PCIBus *typhoon_init(MemoryRegion *ram, qemu_irq *p_isa_irq,
b = pci_register_root_bus(dev, "pci",
typhoon_set_irq, sys_map_irq, s,
&s->pchip.reg_mem, &s->pchip.reg_io,
- devfn_min, 64, TYPE_PCI_BUS);
+ devfn_min, 64, TYPE_PCI_BUS, true);
phb->bus = b;
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
diff --git a/hw/pci-host/articia.c b/hw/pci-host/articia.c
index f3fcc49f812..847b4c54e2a 100644
--- a/hw/pci-host/articia.c
+++ b/hw/pci-host/articia.c
@@ -184,7 +184,8 @@ static void articia_realize(DeviceState *dev, Error **errp)
/* devfn_min is 8 that matches first PCI slot in AmigaOne */
h->bus = pci_register_root_bus(dev, NULL, articia_pcihost_set_irq,
amigaone_pcihost_bus0_map_irq, dev, &s->mem,
- &s->io, PCI_DEVFN(8, 0), 4, TYPE_PCI_BUS);
+ &s->io, PCI_DEVFN(8, 0), 4, TYPE_PCI_BUS,
+ true);
pdev = pci_create_simple_multifunction(h->bus, PCI_DEVFN(0, 0),
TYPE_ARTICIA_PCI_HOST);
ARTICIA_PCI_HOST(pdev)->as = s;
diff --git a/hw/pci-host/astro.c b/hw/pci-host/astro.c
index 379095b3566..1831646f9e7 100644
--- a/hw/pci-host/astro.c
+++ b/hw/pci-host/astro.c
@@ -454,7 +454,8 @@ static void elroy_pcihost_init(Object *obj)
phb->bus = pci_register_root_bus(DEVICE(s), "pci",
elroy_set_irq, elroy_pci_map_irq, s,
&s->pci_mmio, &s->pci_io,
- PCI_DEVFN(0, 0), ELROY_IRQS, TYPE_PCI_BUS);
+ PCI_DEVFN(0, 0), ELROY_IRQS, TYPE_PCI_BUS,
+ true);
sysbus_init_mmio(sbd, &s->this_mem);
diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
index 1516d0074dd..b2c931bacdb 100644
--- a/hw/pci-host/bonito.c
+++ b/hw/pci-host/bonito.c
@@ -635,7 +635,7 @@ static void bonito_host_realize(DeviceState *dev, Error **errp)
phb->bus = pci_register_root_bus(dev, "pci",
pci_bonito_set_irq, pci_bonito_map_irq,
dev, &bs->pci_mem, get_system_io(),
- PCI_DEVFN(5, 0), 32, TYPE_PCI_BUS);
+ PCI_DEVFN(5, 0), 32, TYPE_PCI_BUS, true);
for (size_t i = 0; i < 3; i++) {
char *name = g_strdup_printf("pci.lomem%zu", i);
diff --git a/hw/pci-host/designware.c b/hw/pci-host/designware.c
index c3fc37b9047..eb6d995d3ed 100644
--- a/hw/pci-host/designware.c
+++ b/hw/pci-host/designware.c
@@ -700,7 +700,7 @@ static void designware_pcie_host_realize(DeviceState *dev, Error **errp)
&s->pci.memory,
&s->pci.io,
0, 4,
- TYPE_PCIE_BUS);
+ TYPE_PCIE_BUS, true);
pci->bus->flags |= PCI_BUS_EXTENDED_CONFIG_SPACE;
memory_region_init(&s->pci.address_space_root,
diff --git a/hw/pci-host/dino.c b/hw/pci-host/dino.c
index 283fc0dc575..8c01372e18c 100644
--- a/hw/pci-host/dino.c
+++ b/hw/pci-host/dino.c
@@ -473,7 +473,7 @@ static void dino_pcihost_init(Object *obj)
phb->bus = pci_register_root_bus(DEVICE(s), "pci",
dino_set_irq, dino_pci_map_irq, s,
&s->pci_mem, get_system_io(),
- PCI_DEVFN(0, 0), 32, TYPE_PCI_BUS);
+ PCI_DEVFN(0, 0), 32, TYPE_PCI_BUS, true);
/* Set up windows into PCI bus memory. */
for (i = 1; i < 31; i++) {
diff --git a/hw/pci-host/gpex.c b/hw/pci-host/gpex.c
index e9cf455bf52..299f4d4f840 100644
--- a/hw/pci-host/gpex.c
+++ b/hw/pci-host/gpex.c
@@ -135,7 +135,8 @@ static void gpex_host_realize(DeviceState *dev, Error **errp)
pci->bus = pci_register_root_bus(dev, "pcie.0", gpex_set_irq,
pci_swizzle_map_irq_fn, s, &s->io_mmio,
- &s->io_ioport, 0, 4, TYPE_PCIE_BUS);
+ &s->io_ioport, 0, 4, TYPE_PCIE_BUS,
+ true);
pci_bus_set_route_irq_fn(pci->bus, gpex_route_intx_pin_to_irq);
qdev_realize(DEVICE(&s->gpex_root), BUS(pci->bus), &error_fatal);
diff --git a/hw/pci-host/grackle.c b/hw/pci-host/grackle.c
index 8e589ff2c9e..2934da19bee 100644
--- a/hw/pci-host/grackle.c
+++ b/hw/pci-host/grackle.c
@@ -58,7 +58,7 @@ static void grackle_realize(DeviceState *dev, Error **errp)
s,
&s->pci_mmio,
&s->pci_io,
- 0, 4, TYPE_PCI_BUS);
+ 0, 4, TYPE_PCI_BUS, true);
pci_create_simple(phb->bus, 0, "grackle");
}
diff --git a/hw/pci-host/mv64361.c b/hw/pci-host/mv64361.c
index 1036d8600d7..d61e3ecc0a7 100644
--- a/hw/pci-host/mv64361.c
+++ b/hw/pci-host/mv64361.c
@@ -92,7 +92,7 @@ static void mv64361_pcihost_realize(DeviceState *dev, Error **errp)
name = g_strdup_printf("pci.%d", s->index);
h->bus = pci_register_root_bus(dev, name, mv64361_pcihost_set_irq,
pci_swizzle_map_irq_fn, dev,
- &s->mem, &s->io, 0, 4, TYPE_PCI_BUS);
+ &s->mem, &s->io, 0, 4, TYPE_PCI_BUS, true);
g_free(name);
pci_create_simple(h->bus, 0, TYPE_MV64361_PCI_BRIDGE);
}
diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c
index 2a74dbe45f5..633c92c6a56 100644
--- a/hw/pci-host/pnv_phb3.c
+++ b/hw/pci-host/pnv_phb3.c
@@ -1009,7 +1009,7 @@ void pnv_phb3_bus_init(DeviceState *dev, PnvPHB3 *phb)
dev->id ? dev->id : NULL,
pnv_phb3_set_irq, pnv_phb3_map_irq, phb,
&phb->pci_mmio, &phb->pci_io,
- 0, 4, TYPE_PNV_PHB3_ROOT_BUS);
+ 0, 4, TYPE_PNV_PHB3_ROOT_BUS, true);
object_property_set_int(OBJECT(pci->bus), "phb-id", phb->phb_id,
&error_abort);
diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c
index 99991008c13..a9b46af564f 100644
--- a/hw/pci-host/pnv_phb4.c
+++ b/hw/pci-host/pnv_phb4.c
@@ -1563,7 +1563,7 @@ void pnv_phb4_bus_init(DeviceState *dev, PnvPHB4 *phb)
pci->bus = pci_register_root_bus(dev, dev->id ? dev->id : NULL,
pnv_phb4_set_irq, pnv_phb4_map_irq, phb,
&phb->pci_mmio, &phb->pci_io,
- 0, 4, TYPE_PNV_PHB4_ROOT_BUS);
+ 0, 4, TYPE_PNV_PHB4_ROOT_BUS, true);
object_property_set_int(OBJECT(pci->bus), "phb-id", phb->phb_id,
&error_abort);
diff --git a/hw/pci-host/ppc440_pcix.c b/hw/pci-host/ppc440_pcix.c
index 07924bce28a..b0e2aa96872 100644
--- a/hw/pci-host/ppc440_pcix.c
+++ b/hw/pci-host/ppc440_pcix.c
@@ -498,7 +498,7 @@ static void ppc440_pcix_realize(DeviceState *dev, Error **errp)
memory_region_init(&s->iomem, OBJECT(dev), "pci-io", 64 * KiB);
h->bus = pci_register_root_bus(dev, NULL, ppc440_pcix_set_irq,
ppc440_pcix_map_irq, &s->irq, &s->busmem, &s->iomem,
- PCI_DEVFN(1, 0), 1, TYPE_PCI_BUS);
+ PCI_DEVFN(1, 0), 1, TYPE_PCI_BUS, true);
memory_region_init(&s->bm, OBJECT(s), "bm-ppc440-pcix", UINT64_MAX);
memory_region_add_subregion(&s->bm, 0x0, &s->busmem);
diff --git a/hw/pci-host/ppc4xx_pci.c b/hw/pci-host/ppc4xx_pci.c
index b6c6c8993c4..9c17e3c655e 100644
--- a/hw/pci-host/ppc4xx_pci.c
+++ b/hw/pci-host/ppc4xx_pci.c
@@ -329,7 +329,7 @@ static void ppc4xx_pcihost_realize(DeviceState *dev, Error **errp)
b = pci_register_root_bus(dev, NULL, ppc4xx_pci_set_irq,
ppc4xx_pci_map_irq, s->irq, get_system_memory(),
get_system_io(), 0, ARRAY_SIZE(s->irq),
- TYPE_PCI_BUS);
+ TYPE_PCI_BUS, true);
h->bus = b;
pci_create_simple(b, 0, TYPE_PPC4xx_HOST_BRIDGE);
diff --git a/hw/pci-host/ppce500.c b/hw/pci-host/ppce500.c
index b70631045a0..fb659d4c707 100644
--- a/hw/pci-host/ppce500.c
+++ b/hw/pci-host/ppce500.c
@@ -465,7 +465,8 @@ static void e500_pcihost_realize(DeviceState *dev, Error **errp)
b = pci_register_root_bus(dev, NULL, mpc85xx_pci_set_irq,
mpc85xx_pci_map_irq, s, &s->busmem, &s->pio,
- PCI_DEVFN(s->first_slot, 0), 4, TYPE_PCI_BUS);
+ PCI_DEVFN(s->first_slot, 0), 4, TYPE_PCI_BUS,
+ true);
h->bus = b;
/* Set up PCI view of memory */
diff --git a/hw/pci-host/sabre.c b/hw/pci-host/sabre.c
index 1707feb9513..06f6a15bf2d 100644
--- a/hw/pci-host/sabre.c
+++ b/hw/pci-host/sabre.c
@@ -381,7 +381,7 @@ static void sabre_realize(DeviceState *dev, Error **errp)
pci_sabre_set_irq, pci_sabre_map_irq, s,
&s->pci_mmio,
&s->pci_ioport,
- 0, 0x40, TYPE_PCI_BUS);
+ 0, 0x40, TYPE_PCI_BUS, true);
pci_create_simple(phb->bus, 0, TYPE_SABRE_PCI_DEVICE);
diff --git a/hw/pci-host/sh_pci.c b/hw/pci-host/sh_pci.c
index 4edebced5eb..8da59ad573d 100644
--- a/hw/pci-host/sh_pci.c
+++ b/hw/pci-host/sh_pci.c
@@ -132,7 +132,7 @@ static void sh_pcic_host_realize(DeviceState *dev, Error **errp)
get_system_memory(),
get_system_io(),
PCI_DEVFN(0, 0), PCI_NUM_PINS,
- TYPE_PCI_BUS);
+ TYPE_PCI_BUS, true);
memory_region_init_io(&s->memconfig_p4, OBJECT(s), &sh_pci_reg_ops, s,
"sh_pci", 0x224);
memory_region_init_alias(&s->memconfig_a7, OBJECT(s), "sh_pci.2",
diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
index e4c1abd8715..f2d410fa4aa 100644
--- a/hw/pci-host/uninorth.c
+++ b/hw/pci-host/uninorth.c
@@ -124,7 +124,7 @@ static void pci_unin_main_realize(DeviceState *dev, Error **errp)
s,
&s->pci_mmio,
&s->pci_io,
- PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
+ PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS, true);
pci_create_simple(h->bus, PCI_DEVFN(11, 0), "uni-north-pci");
@@ -174,7 +174,7 @@ static void pci_u3_agp_realize(DeviceState *dev, Error **errp)
s,
&s->pci_mmio,
&s->pci_io,
- PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
+ PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS, false);
pci_create_simple(h->bus, PCI_DEVFN(11, 0), "u3-agp");
}
@@ -218,7 +218,7 @@ static void pci_unin_agp_realize(DeviceState *dev, Error **errp)
s,
&s->pci_mmio,
&s->pci_io,
- PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
+ PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS, false);
pci_create_simple(h->bus, PCI_DEVFN(11, 0), "uni-north-agp");
}
@@ -251,7 +251,7 @@ static void pci_unin_internal_realize(DeviceState *dev, Error **errp)
s,
&s->pci_mmio,
&s->pci_io,
- PCI_DEVFN(14, 0), 4, TYPE_PCI_BUS);
+ PCI_DEVFN(14, 0), 4, TYPE_PCI_BUS, false);
pci_create_simple(h->bus, PCI_DEVFN(14, 0), "uni-north-internal-pci");
}
diff --git a/hw/pci-host/xilinx-pcie.c b/hw/pci-host/xilinx-pcie.c
index 24f691ea829..634d24c479b 100644
--- a/hw/pci-host/xilinx-pcie.c
+++ b/hw/pci-host/xilinx-pcie.c
@@ -135,7 +135,7 @@ static void xilinx_pcie_host_realize(DeviceState *dev, Error **errp)
pci->bus = pci_register_root_bus(dev, s->name, xilinx_pcie_set_irq,
pci_swizzle_map_irq_fn, s, &s->mmio,
- &s->io, 0, 4, TYPE_PCIE_BUS);
+ &s->io, 0, 4, TYPE_PCIE_BUS, true);
qdev_realize(DEVICE(&s->root), BUS(pci->bus), &error_fatal);
}
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index 5fea39e4dfa..889821f64c0 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -619,11 +619,12 @@ PCIBus *pci_register_root_bus(DeviceState *parent, const char *name,
void *irq_opaque,
MemoryRegion *mem, MemoryRegion *io,
uint8_t devfn_min, int nirq,
- const char *typename)
+ const char *typename, bool bar_at_addr_0_refused)
{
PCIBus *bus;
- bus = pci_root_bus_new(parent, name, mem, io, devfn_min, typename, true);
+ bus = pci_root_bus_new(parent, name, mem, io, devfn_min, typename,
+ bar_at_addr_0_refused);
pci_bus_irqs(bus, set_irq, irq_opaque, nirq);
pci_bus_map_irqs(bus, map_irq);
return bus;
diff --git a/hw/ppc/ppc440_uc.c b/hw/ppc/ppc440_uc.c
index 1312aa2080e..c93a7744dc1 100644
--- a/hw/ppc/ppc440_uc.c
+++ b/hw/ppc/ppc440_uc.c
@@ -1016,7 +1016,7 @@ static void ppc460ex_pcie_realize(DeviceState *dev, Error **errp)
snprintf(buf, sizeof(buf), "pcie.%d", s->num);
pci->bus = pci_register_root_bus(DEVICE(s), buf, ppc460ex_set_irq,
pci_swizzle_map_irq_fn, s, &s->busmem,
- &s->iomem, 0, 4, TYPE_PCIE_BUS);
+ &s->iomem, 0, 4, TYPE_PCIE_BUS, true);
ppc460ex_pcie_register_dcrs(s);
}
diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
index 7e24084673f..e6e8018c1cd 100644
--- a/hw/ppc/spapr_pci.c
+++ b/hw/ppc/spapr_pci.c
@@ -1886,7 +1886,7 @@ static void spapr_phb_realize(DeviceState *dev, Error **errp)
pci_spapr_set_irq, pci_swizzle_map_irq_fn, sphb,
&sphb->memspace, &sphb->iospace,
PCI_DEVFN(0, 0), PCI_NUM_PINS,
- TYPE_PCI_BUS);
+ TYPE_PCI_BUS, true);
/*
* Despite resembling a vanilla PCI bus in most ways, the PAPR
diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c
index 40b2567aa70..1ca9df42c5a 100644
--- a/hw/s390x/s390-pci-bus.c
+++ b/hw/s390x/s390-pci-bus.c
@@ -834,7 +834,7 @@ static void s390_pcihost_realize(DeviceState *dev, Error **errp)
b = pci_register_root_bus(dev, NULL, s390_pci_set_irq, s390_pci_map_irq,
NULL, get_system_memory(), get_system_io(), 0,
- 64, TYPE_PCI_BUS);
+ 64, TYPE_PCI_BUS, true);
pci_setup_iommu(b, &s390_iommu_ops, s);
bus = BUS(b);
--
2.45.2
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH-for-10.0 v2 09/13] hw/ppc/spapr: Create host bridge setting bar_at_addr_0_refused=false
2024-11-26 11:21 [PATCH-for-10.0 v2 00/13] hw/boards: Remove legacy MachineClass::pci_allow_0_address flag Philippe Mathieu-Daudé
` (7 preceding siblings ...)
2024-11-26 11:22 ` [PATCH-for-10.0 v2 08/13] hw/pci: Propagate bar_at_addr_0_refused to pci_register_root_bus() Philippe Mathieu-Daudé
@ 2024-11-26 11:22 ` Philippe Mathieu-Daudé
2024-11-26 11:22 ` [PATCH-for-10.0 v2 10/13] hw/pci-host/gpex: Expose 'refuse-bar-at-addr-0' property Philippe Mathieu-Daudé
` (3 subsequent siblings)
12 siblings, 0 replies; 20+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-11-26 11:22 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-s390x, Thomas Huth, Michael S. Tsirkin, qemu-riscv,
Marcel Apfelbaum, Peter Maydell, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé
Since all sPAPR machines set MachineClass::pci_allow_0_address
(see commit e402463073 "pci: allow 0 address for PCI IO/MEM
regions"), directly create the host bridge passing
bar_at_addr_0_refused=false to pci_register_root_bus().
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/ppc/spapr.c | 1 -
hw/ppc/spapr_pci.c | 2 +-
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 5c02037c564..8af56bd68a2 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -4600,7 +4600,6 @@ static void spapr_machine_class_init(ObjectClass *oc, void *data)
mc->default_display = "std";
mc->kvm_type = spapr_kvm_type;
machine_class_allow_dynamic_sysbus_dev(mc, TYPE_SPAPR_PCI_HOST_BRIDGE);
- mc->pci_allow_0_address = true;
assert(!mc->get_hotplug_handler);
mc->get_hotplug_handler = spapr_get_hotplug_handler;
hc->pre_plug = spapr_machine_device_pre_plug;
diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
index e6e8018c1cd..1d12c0b4112 100644
--- a/hw/ppc/spapr_pci.c
+++ b/hw/ppc/spapr_pci.c
@@ -1886,7 +1886,7 @@ static void spapr_phb_realize(DeviceState *dev, Error **errp)
pci_spapr_set_irq, pci_swizzle_map_irq_fn, sphb,
&sphb->memspace, &sphb->iospace,
PCI_DEVFN(0, 0), PCI_NUM_PINS,
- TYPE_PCI_BUS, true);
+ TYPE_PCI_BUS, false);
/*
* Despite resembling a vanilla PCI bus in most ways, the PAPR
--
2.45.2
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH-for-10.0 v2 10/13] hw/pci-host/gpex: Expose 'refuse-bar-at-addr-0' property
2024-11-26 11:21 [PATCH-for-10.0 v2 00/13] hw/boards: Remove legacy MachineClass::pci_allow_0_address flag Philippe Mathieu-Daudé
` (8 preceding siblings ...)
2024-11-26 11:22 ` [PATCH-for-10.0 v2 09/13] hw/ppc/spapr: Create host bridge setting bar_at_addr_0_refused=false Philippe Mathieu-Daudé
@ 2024-11-26 11:22 ` Philippe Mathieu-Daudé
2024-12-05 16:47 ` Peter Maydell
2024-11-26 11:22 ` [PATCH-for-10.0 v2 11/13] hw/arm/virt: Create GPEX host bridge without refuse-bar-at-addr-0 Philippe Mathieu-Daudé
` (2 subsequent siblings)
12 siblings, 1 reply; 20+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-11-26 11:22 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-s390x, Thomas Huth, Michael S. Tsirkin, qemu-riscv,
Marcel Apfelbaum, Peter Maydell, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé
Expose the "refuse-bar-at-addr-0" property so machines
using a GPEX host bridge can set this flag on the bus.
While the default property is set to 'false', all caller
set it to 'true' so there is no logical change so far.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/hw/pci-host/gpex.h | 1 +
hw/arm/sbsa-ref.c | 2 ++
hw/arm/virt.c | 2 ++
hw/i386/microvm.c | 2 ++
hw/loongarch/virt.c | 2 ++
hw/mips/loongson3_virt.c | 2 ++
hw/openrisc/virt.c | 2 ++
hw/pci-host/gpex.c | 4 +++-
hw/riscv/virt.c | 2 ++
hw/xen/xen-pvh-common.c | 2 ++
hw/xtensa/virt.c | 2 ++
11 files changed, 22 insertions(+), 1 deletion(-)
diff --git a/include/hw/pci-host/gpex.h b/include/hw/pci-host/gpex.h
index dce883573ba..44c6463afb3 100644
--- a/include/hw/pci-host/gpex.h
+++ b/include/hw/pci-host/gpex.h
@@ -64,6 +64,7 @@ struct GPEXHost {
int irq_num[GPEX_NUM_IRQS];
bool allow_unmapped_accesses;
+ bool refuse_bar_at_addr_0;
struct GPEXConfig gpex_cfg;
};
diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index e3195d54497..f6cf43cf0c9 100644
--- a/hw/arm/sbsa-ref.c
+++ b/hw/arm/sbsa-ref.c
@@ -647,6 +647,8 @@ static void create_pcie(SBSAMachineState *sms)
int i;
dev = qdev_new(TYPE_GPEX_HOST);
+ object_property_set_bool(OBJECT(dev), "refuse-bar-at-addr-0",
+ true, &error_fatal);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
/* Map ECAM space */
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 1a381e9a2bd..06affc3638b 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -1510,6 +1510,8 @@ static void create_pcie(VirtMachineState *vms)
MachineClass *mc = MACHINE_GET_CLASS(ms);
dev = qdev_new(TYPE_GPEX_HOST);
+ object_property_set_bool(OBJECT(dev), "refuse-bar-at-addr-0",
+ true, &error_fatal);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
ecam_id = VIRT_ECAM_ID(vms->highmem_ecam);
diff --git a/hw/i386/microvm.c b/hw/i386/microvm.c
index 86637afa0f3..2231fd8f9cf 100644
--- a/hw/i386/microvm.c
+++ b/hw/i386/microvm.c
@@ -108,6 +108,8 @@ static void create_gpex(MicrovmMachineState *mms)
int i;
dev = qdev_new(TYPE_GPEX_HOST);
+ object_property_set_bool(OBJECT(dev), "refuse-bar-at-addr-0",
+ true, &error_fatal);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
/* Map only the first size_ecam bytes of ECAM space */
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index 9a635d1d3d3..b5a26d3c23d 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -712,6 +712,8 @@ static void virt_devices_init(DeviceState *pch_pic,
int i;
gpex_dev = qdev_new(TYPE_GPEX_HOST);
+ object_property_set_bool(OBJECT(gpex_dev), "refuse-bar-at-addr-0",
+ true, &error_fatal);
d = SYS_BUS_DEVICE(gpex_dev);
sysbus_realize_and_unref(d, &error_fatal);
pci_bus = PCI_HOST_BRIDGE(gpex_dev)->bus;
diff --git a/hw/mips/loongson3_virt.c b/hw/mips/loongson3_virt.c
index f3b6326cc59..21af0b5bc86 100644
--- a/hw/mips/loongson3_virt.c
+++ b/hw/mips/loongson3_virt.c
@@ -430,6 +430,8 @@ static inline void loongson3_virt_devices_init(MachineState *machine,
LoongsonMachineState *s = LOONGSON_MACHINE(machine);
dev = qdev_new(TYPE_GPEX_HOST);
+ object_property_set_bool(OBJECT(dev), "refuse-bar-at-addr-0",
+ true, &error_fatal);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
pci_bus = PCI_HOST_BRIDGE(dev)->bus;
diff --git a/hw/openrisc/virt.c b/hw/openrisc/virt.c
index 47d2c9bd3c7..cde9379a992 100644
--- a/hw/openrisc/virt.c
+++ b/hw/openrisc/virt.c
@@ -380,6 +380,8 @@ static void openrisc_virt_pcie_init(OR1KVirtState *state,
int i;
dev = qdev_new(TYPE_GPEX_HOST);
+ object_property_set_bool(OBJECT(dev), "refuse-bar-at-addr-0",
+ true, &error_fatal);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
/* Map ECAM space. */
diff --git a/hw/pci-host/gpex.c b/hw/pci-host/gpex.c
index 299f4d4f840..b888f4e831d 100644
--- a/hw/pci-host/gpex.c
+++ b/hw/pci-host/gpex.c
@@ -136,7 +136,7 @@ static void gpex_host_realize(DeviceState *dev, Error **errp)
pci->bus = pci_register_root_bus(dev, "pcie.0", gpex_set_irq,
pci_swizzle_map_irq_fn, s, &s->io_mmio,
&s->io_ioport, 0, 4, TYPE_PCIE_BUS,
- true);
+ s->refuse_bar_at_addr_0);
pci_bus_set_route_irq_fn(pci->bus, gpex_route_intx_pin_to_irq);
qdev_realize(DEVICE(&s->gpex_root), BUS(pci->bus), &error_fatal);
@@ -155,6 +155,8 @@ static Property gpex_host_properties[] = {
*/
DEFINE_PROP_BOOL("allow-unmapped-accesses", GPEXHost,
allow_unmapped_accesses, true),
+ DEFINE_PROP_BOOL("refuse-bar-at-addr-0", GPEXHost,
+ refuse_bar_at_addr_0, false),
DEFINE_PROP_UINT64(PCI_HOST_ECAM_BASE, GPEXHost, gpex_cfg.ecam.base, 0),
DEFINE_PROP_SIZE(PCI_HOST_ECAM_SIZE, GPEXHost, gpex_cfg.ecam.size, 0),
DEFINE_PROP_UINT64(PCI_HOST_PIO_BASE, GPEXHost, gpex_cfg.pio.base, 0),
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index 45a8c4f8190..8999fc348cb 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -1158,6 +1158,8 @@ static inline DeviceState *gpex_pcie_init(MemoryRegion *sys_mem,
pio_base, NULL);
object_property_set_int(OBJECT(GPEX_HOST(dev)), PCI_HOST_PIO_SIZE,
pio_size, NULL);
+ object_property_set_bool(OBJECT(dev), "refuse-bar-at-addr-0",
+ true, &error_fatal);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
diff --git a/hw/xen/xen-pvh-common.c b/hw/xen/xen-pvh-common.c
index 218ac851cf7..3131a2dd280 100644
--- a/hw/xen/xen-pvh-common.c
+++ b/hw/xen/xen-pvh-common.c
@@ -139,6 +139,8 @@ static inline void xenpvh_gpex_init(XenPVHMachineState *s,
object_initialize_child(OBJECT(s), "gpex", &s->pci.gpex,
TYPE_GPEX_HOST);
+ object_property_set_bool(OBJECT(s), "refuse-bar-at-addr-0",
+ true, &error_fatal);
dev = DEVICE(&s->pci.gpex);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
diff --git a/hw/xtensa/virt.c b/hw/xtensa/virt.c
index 5310a888613..dcb39a67868 100644
--- a/hw/xtensa/virt.c
+++ b/hw/xtensa/virt.c
@@ -62,6 +62,8 @@ static void create_pcie(MachineState *ms, CPUXtensaState *env, int irq_base,
int i;
dev = qdev_new(TYPE_GPEX_HOST);
+ object_property_set_bool(OBJECT(dev), "refuse-bar-at-addr-0",
+ true, &error_fatal);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
/* Map only the first size_ecam bytes of ECAM space. */
--
2.45.2
^ permalink raw reply related [flat|nested] 20+ messages in thread* Re: [PATCH-for-10.0 v2 10/13] hw/pci-host/gpex: Expose 'refuse-bar-at-addr-0' property
2024-11-26 11:22 ` [PATCH-for-10.0 v2 10/13] hw/pci-host/gpex: Expose 'refuse-bar-at-addr-0' property Philippe Mathieu-Daudé
@ 2024-12-05 16:47 ` Peter Maydell
2024-12-05 21:25 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 20+ messages in thread
From: Peter Maydell @ 2024-12-05 16:47 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, qemu-ppc, qemu-s390x, Thomas Huth, Michael S. Tsirkin,
qemu-riscv, Marcel Apfelbaum, qemu-arm, Paolo Bonzini
On Tue, 26 Nov 2024 at 11:23, Philippe Mathieu-Daudé <philmd@linaro.org> wrote:
>
> Expose the "refuse-bar-at-addr-0" property so machines
> using a GPEX host bridge can set this flag on the bus.
> While the default property is set to 'false', all caller
> set it to 'true' so there is no logical change so far.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> include/hw/pci-host/gpex.h | 1 +
> hw/arm/sbsa-ref.c | 2 ++
> hw/arm/virt.c | 2 ++
> hw/i386/microvm.c | 2 ++
> hw/loongarch/virt.c | 2 ++
> hw/mips/loongson3_virt.c | 2 ++
> hw/openrisc/virt.c | 2 ++
> hw/pci-host/gpex.c | 4 +++-
> hw/riscv/virt.c | 2 ++
> hw/xen/xen-pvh-common.c | 2 ++
> hw/xtensa/virt.c | 2 ++
> 11 files changed, 22 insertions(+), 1 deletion(-)
>
> diff --git a/include/hw/pci-host/gpex.h b/include/hw/pci-host/gpex.h
> index dce883573ba..44c6463afb3 100644
> --- a/include/hw/pci-host/gpex.h
> +++ b/include/hw/pci-host/gpex.h
> @@ -64,6 +64,7 @@ struct GPEXHost {
> int irq_num[GPEX_NUM_IRQS];
>
> bool allow_unmapped_accesses;
> + bool refuse_bar_at_addr_0;
>
> struct GPEXConfig gpex_cfg;
> };
> diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
> index e3195d54497..f6cf43cf0c9 100644
> --- a/hw/arm/sbsa-ref.c
> +++ b/hw/arm/sbsa-ref.c
> @@ -647,6 +647,8 @@ static void create_pcie(SBSAMachineState *sms)
> int i;
>
> dev = qdev_new(TYPE_GPEX_HOST);
> + object_property_set_bool(OBJECT(dev), "refuse-bar-at-addr-0",
> + true, &error_fatal);
> sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
>
> /* Map ECAM space */
> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
> index 1a381e9a2bd..06affc3638b 100644
> --- a/hw/arm/virt.c
> +++ b/hw/arm/virt.c
> @@ -1510,6 +1510,8 @@ static void create_pcie(VirtMachineState *vms)
> MachineClass *mc = MACHINE_GET_CLASS(ms);
>
> dev = qdev_new(TYPE_GPEX_HOST);
> + object_property_set_bool(OBJECT(dev), "refuse-bar-at-addr-0",
> + true, &error_fatal);
> sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
>
> ecam_id = VIRT_ECAM_ID(vms->highmem_ecam);
These don't look right, because both virt and sbsa-ref
set mc->pci_allow_0_address = true. And in the next
patch you delete them again...
-- PMM
^ permalink raw reply [flat|nested] 20+ messages in thread* Re: [PATCH-for-10.0 v2 10/13] hw/pci-host/gpex: Expose 'refuse-bar-at-addr-0' property
2024-12-05 16:47 ` Peter Maydell
@ 2024-12-05 21:25 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 20+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-12-05 21:25 UTC (permalink / raw)
To: Peter Maydell
Cc: qemu-devel, qemu-ppc, qemu-s390x, Thomas Huth, Michael S. Tsirkin,
qemu-riscv, Marcel Apfelbaum, qemu-arm, Paolo Bonzini
On 5/12/24 17:47, Peter Maydell wrote:
> On Tue, 26 Nov 2024 at 11:23, Philippe Mathieu-Daudé <philmd@linaro.org> wrote:
>>
>> Expose the "refuse-bar-at-addr-0" property so machines
>> using a GPEX host bridge can set this flag on the bus.
>> While the default property is set to 'false', all caller
>> set it to 'true' so there is no logical change so far.
>>
>> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>> ---
>> include/hw/pci-host/gpex.h | 1 +
>> hw/arm/sbsa-ref.c | 2 ++
>> hw/arm/virt.c | 2 ++
>> hw/i386/microvm.c | 2 ++
>> hw/loongarch/virt.c | 2 ++
>> hw/mips/loongson3_virt.c | 2 ++
>> hw/openrisc/virt.c | 2 ++
>> hw/pci-host/gpex.c | 4 +++-
>> hw/riscv/virt.c | 2 ++
>> hw/xen/xen-pvh-common.c | 2 ++
>> hw/xtensa/virt.c | 2 ++
>> 11 files changed, 22 insertions(+), 1 deletion(-)
>>
>> diff --git a/include/hw/pci-host/gpex.h b/include/hw/pci-host/gpex.h
>> index dce883573ba..44c6463afb3 100644
>> --- a/include/hw/pci-host/gpex.h
>> +++ b/include/hw/pci-host/gpex.h
>> @@ -64,6 +64,7 @@ struct GPEXHost {
>> int irq_num[GPEX_NUM_IRQS];
>>
>> bool allow_unmapped_accesses;
>> + bool refuse_bar_at_addr_0;
>>
>> struct GPEXConfig gpex_cfg;
>> };
>> diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
>> index e3195d54497..f6cf43cf0c9 100644
>> --- a/hw/arm/sbsa-ref.c
>> +++ b/hw/arm/sbsa-ref.c
>> @@ -647,6 +647,8 @@ static void create_pcie(SBSAMachineState *sms)
>> int i;
>>
>> dev = qdev_new(TYPE_GPEX_HOST);
>> + object_property_set_bool(OBJECT(dev), "refuse-bar-at-addr-0",
>> + true, &error_fatal);
>> sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
>>
>> /* Map ECAM space */
>> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
>> index 1a381e9a2bd..06affc3638b 100644
>> --- a/hw/arm/virt.c
>> +++ b/hw/arm/virt.c
>> @@ -1510,6 +1510,8 @@ static void create_pcie(VirtMachineState *vms)
>> MachineClass *mc = MACHINE_GET_CLASS(ms);
>>
>> dev = qdev_new(TYPE_GPEX_HOST);
>> + object_property_set_bool(OBJECT(dev), "refuse-bar-at-addr-0",
>> + true, &error_fatal);
>> sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
>>
>> ecam_id = VIRT_ECAM_ID(vms->highmem_ecam);
>
> These don't look right, because both virt and sbsa-ref
> set mc->pci_allow_0_address = true. And in the next
> patch you delete them again...
Indeed.
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH-for-10.0 v2 11/13] hw/arm/virt: Create GPEX host bridge without refuse-bar-at-addr-0
2024-11-26 11:21 [PATCH-for-10.0 v2 00/13] hw/boards: Remove legacy MachineClass::pci_allow_0_address flag Philippe Mathieu-Daudé
` (9 preceding siblings ...)
2024-11-26 11:22 ` [PATCH-for-10.0 v2 10/13] hw/pci-host/gpex: Expose 'refuse-bar-at-addr-0' property Philippe Mathieu-Daudé
@ 2024-11-26 11:22 ` Philippe Mathieu-Daudé
2024-11-26 11:22 ` [PATCH-for-10.0 v2 12/13] hw/riscv/virt: " Philippe Mathieu-Daudé
2024-11-26 11:22 ` [PATCH-for-10.0 v2 13/13] hw/pci/pci: Remove legacy MachineClass::pci_allow_0_address flag Philippe Mathieu-Daudé
12 siblings, 0 replies; 20+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-11-26 11:22 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-s390x, Thomas Huth, Michael S. Tsirkin, qemu-riscv,
Marcel Apfelbaum, Peter Maydell, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé
ARM virt and sbsa-ref machines set MachineClass::pci_allow_0_address
(see commit 74de8c3568 "hw/arm/virt: Allow zero address for PCI IO
space"), directly create the GPEX host bridge using the default
'false' value of the "refuse-bar-at-addr-0" property.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/arm/sbsa-ref.c | 3 ---
hw/arm/virt.c | 3 ---
2 files changed, 6 deletions(-)
diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index f6cf43cf0c9..c232b933c07 100644
--- a/hw/arm/sbsa-ref.c
+++ b/hw/arm/sbsa-ref.c
@@ -647,8 +647,6 @@ static void create_pcie(SBSAMachineState *sms)
int i;
dev = qdev_new(TYPE_GPEX_HOST);
- object_property_set_bool(OBJECT(dev), "refuse-bar-at-addr-0",
- true, &error_fatal);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
/* Map ECAM space */
@@ -898,7 +896,6 @@ static void sbsa_ref_class_init(ObjectClass *oc, void *data)
mc->default_cpu_type = ARM_CPU_TYPE_NAME("neoverse-n2");
mc->valid_cpu_types = valid_cpu_types;
mc->max_cpus = 512;
- mc->pci_allow_0_address = true;
mc->minimum_page_bits = 12;
mc->block_default_type = IF_IDE;
mc->no_cdrom = 1;
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 06affc3638b..f9ec3c22409 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -1510,8 +1510,6 @@ static void create_pcie(VirtMachineState *vms)
MachineClass *mc = MACHINE_GET_CLASS(ms);
dev = qdev_new(TYPE_GPEX_HOST);
- object_property_set_bool(OBJECT(dev), "refuse-bar-at-addr-0",
- true, &error_fatal);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
ecam_id = VIRT_ECAM_ID(vms->highmem_ecam);
@@ -3126,7 +3124,6 @@ static void virt_machine_class_init(ObjectClass *oc, void *data)
#endif
mc->block_default_type = IF_VIRTIO;
mc->no_cdrom = 1;
- mc->pci_allow_0_address = true;
/* We know we will never create a pre-ARMv7 CPU which needs 1K pages */
mc->minimum_page_bits = 12;
mc->possible_cpu_arch_ids = virt_possible_cpu_arch_ids;
--
2.45.2
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH-for-10.0 v2 12/13] hw/riscv/virt: Create GPEX host bridge without refuse-bar-at-addr-0
2024-11-26 11:21 [PATCH-for-10.0 v2 00/13] hw/boards: Remove legacy MachineClass::pci_allow_0_address flag Philippe Mathieu-Daudé
` (10 preceding siblings ...)
2024-11-26 11:22 ` [PATCH-for-10.0 v2 11/13] hw/arm/virt: Create GPEX host bridge without refuse-bar-at-addr-0 Philippe Mathieu-Daudé
@ 2024-11-26 11:22 ` Philippe Mathieu-Daudé
2024-11-26 11:22 ` [PATCH-for-10.0 v2 13/13] hw/pci/pci: Remove legacy MachineClass::pci_allow_0_address flag Philippe Mathieu-Daudé
12 siblings, 0 replies; 20+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-11-26 11:22 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-s390x, Thomas Huth, Michael S. Tsirkin, qemu-riscv,
Marcel Apfelbaum, Peter Maydell, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé
RISCV virt machine set MachineClass::pci_allow_0_address
(see commit acead54c78 "riscv: virt: Allow PCI address 0"),
directly create the GPEX host bridge using the default
'false' value of the "refuse-bar-at-addr-0" property.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/riscv/virt.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index 8999fc348cb..b28edb9ffd5 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -1158,8 +1158,6 @@ static inline DeviceState *gpex_pcie_init(MemoryRegion *sys_mem,
pio_base, NULL);
object_property_set_int(OBJECT(GPEX_HOST(dev)), PCI_HOST_PIO_SIZE,
pio_size, NULL);
- object_property_set_bool(OBJECT(dev), "refuse-bar-at-addr-0",
- true, &error_fatal);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
@@ -1807,7 +1805,6 @@ static void virt_machine_class_init(ObjectClass *oc, void *data)
mc->default_cpu_type = TYPE_RISCV_CPU_BASE;
mc->block_default_type = IF_VIRTIO;
mc->no_cdrom = 1;
- mc->pci_allow_0_address = true;
mc->possible_cpu_arch_ids = riscv_numa_possible_cpu_arch_ids;
mc->cpu_index_to_instance_props = riscv_numa_cpu_index_to_props;
mc->get_default_cpu_node_id = riscv_numa_get_default_cpu_node_id;
--
2.45.2
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH-for-10.0 v2 13/13] hw/pci/pci: Remove legacy MachineClass::pci_allow_0_address flag
2024-11-26 11:21 [PATCH-for-10.0 v2 00/13] hw/boards: Remove legacy MachineClass::pci_allow_0_address flag Philippe Mathieu-Daudé
` (11 preceding siblings ...)
2024-11-26 11:22 ` [PATCH-for-10.0 v2 12/13] hw/riscv/virt: " Philippe Mathieu-Daudé
@ 2024-11-26 11:22 ` Philippe Mathieu-Daudé
12 siblings, 0 replies; 20+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-11-26 11:22 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-s390x, Thomas Huth, Michael S. Tsirkin, qemu-riscv,
Marcel Apfelbaum, Peter Maydell, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé
There are no more users of MachineClass::pci_allow_0_address,
remove the field along with the machine_refuses_bar_at_addr_0()
method.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/hw/boards.h | 1 -
hw/pci/pci.c | 10 +---------
2 files changed, 1 insertion(+), 10 deletions(-)
diff --git a/include/hw/boards.h b/include/hw/boards.h
index 36fbb9b59df..66fb2eddd34 100644
--- a/include/hw/boards.h
+++ b/include/hw/boards.h
@@ -284,7 +284,6 @@ struct MachineClass {
no_floppy:1,
no_cdrom:1,
no_sdcard:1,
- pci_allow_0_address:1,
legacy_fw_cfg_order:1;
bool is_default;
const char *default_machine_opts;
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index 889821f64c0..20362da7b89 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -45,7 +45,6 @@
#include "hw/pci/msi.h"
#include "hw/pci/msix.h"
#include "hw/hotplug.h"
-#include "hw/boards.h"
#include "qapi/error.h"
#include "qemu/cutils.h"
#include "pci-internal.h"
@@ -520,13 +519,6 @@ bool pci_bus_bypass_iommu(PCIBus *bus)
return host_bridge->bypass_iommu;
}
-static bool machine_refuses_bar_at_addr_0(void)
-{
- MachineClass *mc = MACHINE_GET_CLASS(qdev_get_machine());
-
- return !mc->pci_allow_0_address;
-}
-
static void pci_root_bus_internal_init(PCIBus *bus, DeviceState *parent,
MemoryRegion *mem, MemoryRegion *io,
uint8_t devfn_min,
@@ -538,7 +530,7 @@ static void pci_root_bus_internal_init(PCIBus *bus, DeviceState *parent,
bus->address_space_mem = mem;
bus->address_space_io = io;
bus->flags |= PCI_BUS_IS_ROOT;
- if (bar_at_addr_0_refused && machine_refuses_bar_at_addr_0()) {
+ if (bar_at_addr_0_refused) {
bus->flags |= PCI_BUS_BAR_AT_ADDR0_REFUSED;
}
--
2.45.2
^ permalink raw reply related [flat|nested] 20+ messages in thread