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From: Yi Liu <yi.l.liu@intel.com>
To: CLEMENT MATHIEU--DRIF <clement.mathieu--drif@eviden.com>,
	"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>
Cc: "jasowang@redhat.com" <jasowang@redhat.com>,
	"zhenzhong.duan@intel.com" <zhenzhong.duan@intel.com>,
	"kevin.tian@intel.com" <kevin.tian@intel.com>,
	"joao.m.martins@oracle.com" <joao.m.martins@oracle.com>,
	"peterx@redhat.com" <peterx@redhat.com>,
	"mst@redhat.com" <mst@redhat.com>
Subject: Re: [PATCH ats_vtd v5 06/22] pcie: add helper to declare PASID capability for a pcie device
Date: Wed, 3 Jul 2024 20:04:51 +0800	[thread overview]
Message-ID: <d2bed39c-9c5c-4336-bc42-2bf422aab7cc@intel.com> (raw)
In-Reply-To: <20240702055221.1337035-7-clement.mathieu--drif@eviden.com>

On 2024/7/2 13:52, CLEMENT MATHIEU--DRIF wrote:
> From: Clément Mathieu--Drif <clement.mathieu--drif@eviden.com>
> 
> Signed-off-by: Clément Mathieu--Drif <clement.mathieu--drif@eviden.com>
> ---
>   hw/pci/pcie.c                             | 24 +++++++++++++++++++++++
>   include/hw/pci/pcie.h                     |  6 +++++-
>   include/hw/pci/pcie_regs.h                |  3 +++
>   include/standard-headers/linux/pci_regs.h |  1 +
>   4 files changed, 33 insertions(+), 1 deletion(-)
> 
> diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c
> index 4b2f0805c6..d6a052b616 100644
> --- a/hw/pci/pcie.c
> +++ b/hw/pci/pcie.c
> @@ -1177,3 +1177,27 @@ void pcie_acs_reset(PCIDevice *dev)
>           pci_set_word(dev->config + dev->exp.acs_cap + PCI_ACS_CTRL, 0);
>       }
>   }
> +
> +/* PASID */
> +void pcie_pasid_init(PCIDevice *dev, uint16_t offset, uint8_t pasid_width,
> +                     bool exec_perm, bool priv_mod)
> +{
> +    assert(pasid_width <= PCI_EXT_CAP_PASID_MAX_WIDTH);
> +    static const uint16_t control_reg_rw_mask = 0x07;
> +    uint16_t capability_reg = pasid_width;
> +
> +    pcie_add_capability(dev, PCI_EXT_CAP_ID_PASID, PCI_PASID_VER, offset,
> +                        PCI_EXT_CAP_PASID_SIZEOF);
> +
> +    capability_reg <<= PCI_PASID_CAP_WIDTH_SHIFT;
> +    capability_reg |= exec_perm ? PCI_PASID_CAP_EXEC : 0;
> +    capability_reg |= priv_mod  ? PCI_PASID_CAP_PRIV : 0;
> +    pci_set_word(dev->config + offset + PCI_PASID_CAP, capability_reg);
> +
> +    /* Everything is disabled by default */
> +    pci_set_word(dev->config + offset + PCI_PASID_CTRL, 0);
> +
> +    pci_set_word(dev->wmask + offset + PCI_PASID_CTRL, control_reg_rw_mask);
> +
> +    dev->exp.pasid_cap = offset;
> +}

seems no user of this helper in this series. If yes, you may drop this
patch and include it when there is a caller of it.

> diff --git a/include/hw/pci/pcie.h b/include/hw/pci/pcie.h
> index 5eddb90976..b870958c99 100644
> --- a/include/hw/pci/pcie.h
> +++ b/include/hw/pci/pcie.h
> @@ -72,8 +72,9 @@ struct PCIExpressDevice {
>       uint16_t aer_cap;
>       PCIEAERLog aer_log;
>   
> -    /* Offset of ATS capability in config space */
> +    /* Offset of ATS and PASID capabilities in config space */
>       uint16_t ats_cap;
> +    uint16_t pasid_cap;
>   
>       /* ACS */
>       uint16_t acs_cap;
> @@ -150,4 +151,7 @@ void pcie_cap_slot_unplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
>                                Error **errp);
>   void pcie_cap_slot_unplug_request_cb(HotplugHandler *hotplug_dev,
>                                        DeviceState *dev, Error **errp);
> +
> +void pcie_pasid_init(PCIDevice *dev, uint16_t offset, uint8_t pasid_width,
> +                     bool exec_perm, bool priv_mod);
>   #endif /* QEMU_PCIE_H */
> diff --git a/include/hw/pci/pcie_regs.h b/include/hw/pci/pcie_regs.h
> index 9d3b6868dc..0a86598f80 100644
> --- a/include/hw/pci/pcie_regs.h
> +++ b/include/hw/pci/pcie_regs.h
> @@ -86,6 +86,9 @@ typedef enum PCIExpLinkWidth {
>   #define PCI_ARI_VER                     1
>   #define PCI_ARI_SIZEOF                  8
>   
> +/* PASID */
> +#define PCI_PASID_VER                   1
> +#define PCI_EXT_CAP_PASID_MAX_WIDTH     20
>   /* AER */
>   #define PCI_ERR_VER                     2
>   #define PCI_ERR_SIZEOF                  0x48
> diff --git a/include/standard-headers/linux/pci_regs.h b/include/standard-headers/linux/pci_regs.h
> index a39193213f..406dce8e82 100644
> --- a/include/standard-headers/linux/pci_regs.h
> +++ b/include/standard-headers/linux/pci_regs.h
> @@ -935,6 +935,7 @@
>   #define  PCI_PASID_CAP_EXEC	0x0002	/* Exec permissions Supported */
>   #define  PCI_PASID_CAP_PRIV	0x0004	/* Privilege Mode Supported */
>   #define  PCI_PASID_CAP_WIDTH	0x1f00
> +#define  PCI_PASID_CAP_WIDTH_SHIFT  8
>   #define PCI_PASID_CTRL		0x06    /* PASID control register */
>   #define  PCI_PASID_CTRL_ENABLE	0x0001	/* Enable bit */
>   #define  PCI_PASID_CTRL_EXEC	0x0002	/* Exec permissions Enable */

-- 
Regards,
Yi Liu


  reply	other threads:[~2024-07-03 12:02 UTC|newest]

Thread overview: 55+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-07-02  5:52 [PATCH ats_vtd v5 00/22] ATS support for VT-d CLEMENT MATHIEU--DRIF
2024-07-02  5:52 ` [PATCH ats_vtd v5 01/22] intel_iommu: fix FRCD construction macro CLEMENT MATHIEU--DRIF
2024-07-02 13:01   ` Yi Liu
2024-07-02 15:10     ` CLEMENT MATHIEU--DRIF
2024-07-02  5:52 ` [PATCH ats_vtd v5 02/22] intel_iommu: make types match CLEMENT MATHIEU--DRIF
2024-07-02 13:20   ` Yi Liu
2024-07-02  5:52 ` [PATCH ats_vtd v5 03/22] intel_iommu: return page walk level even when the translation fails CLEMENT MATHIEU--DRIF
2024-07-03 11:59   ` Yi Liu
2024-07-04  4:23     ` CLEMENT MATHIEU--DRIF
2024-07-02  5:52 ` [PATCH ats_vtd v5 05/22] memory: add permissions in IOMMUAccessFlags CLEMENT MATHIEU--DRIF
2024-07-02  5:52 ` [PATCH ats_vtd v5 04/22] intel_iommu: do not consider wait_desc as an invalid descriptor CLEMENT MATHIEU--DRIF
2024-07-02 13:33   ` Yi Liu
2024-07-02 15:29     ` CLEMENT MATHIEU--DRIF
2024-07-02 15:40       ` cmd
2024-07-03  7:29       ` Yi Liu
2024-07-03  8:28         ` cmd
2024-07-04  4:23         ` CLEMENT MATHIEU--DRIF
2024-07-02  5:52 ` [PATCH ats_vtd v5 06/22] pcie: add helper to declare PASID capability for a pcie device CLEMENT MATHIEU--DRIF
2024-07-03 12:04   ` Yi Liu [this message]
2024-07-04  4:25     ` CLEMENT MATHIEU--DRIF
2024-07-02  5:52 ` [PATCH ats_vtd v5 07/22] pcie: helper functions to check if PASID and ATS are enabled CLEMENT MATHIEU--DRIF
2024-07-02  5:52 ` [PATCH ats_vtd v5 08/22] intel_iommu: declare supported PASID size CLEMENT MATHIEU--DRIF
2024-07-02  5:52 ` [PATCH ats_vtd v5 09/22] pci: cache the bus mastering status in the device CLEMENT MATHIEU--DRIF
2024-07-02  5:52 ` [PATCH ats_vtd v5 10/22] pci: add IOMMU operations to get address spaces and memory regions with PASID CLEMENT MATHIEU--DRIF
2024-07-02  5:52 ` [PATCH ats_vtd v5 11/22] memory: store user data pointer in the IOMMU notifiers CLEMENT MATHIEU--DRIF
2024-07-02  5:52 ` [PATCH ats_vtd v5 12/22] pci: add a pci-level initialization function for iommu notifiers CLEMENT MATHIEU--DRIF
2024-07-02  5:52 ` [PATCH ats_vtd v5 13/22] intel_iommu: implement the get_address_space_pasid iommu operation CLEMENT MATHIEU--DRIF
2024-07-02  5:52 ` [PATCH ats_vtd v5 14/22] intel_iommu: implement the get_memory_region_pasid " CLEMENT MATHIEU--DRIF
2024-07-02  5:52 ` [PATCH ats_vtd v5 15/22] memory: Allow to store the PASID in IOMMUTLBEntry CLEMENT MATHIEU--DRIF
2024-07-02  5:52 ` [PATCH ats_vtd v5 16/22] intel_iommu: fill the PASID field when creating an instance of IOMMUTLBEntry CLEMENT MATHIEU--DRIF
2024-07-02  5:52 ` [PATCH ats_vtd v5 18/22] atc: add unit tests CLEMENT MATHIEU--DRIF
2024-07-02  5:52 ` [PATCH ats_vtd v5 17/22] atc: generic ATC that can be used by PCIe devices that support SVM CLEMENT MATHIEU--DRIF
2024-07-02  5:52 ` [PATCH ats_vtd v5 19/22] memory: add an API for ATS support CLEMENT MATHIEU--DRIF
2024-07-03 12:14   ` Yi Liu
2024-07-04  4:30     ` CLEMENT MATHIEU--DRIF
2024-07-04 12:52       ` Yi Liu
2024-07-02  5:52 ` [PATCH ats_vtd v5 20/22] pci: add a pci-level API for ATS CLEMENT MATHIEU--DRIF
2024-07-09 10:15   ` Minwoo Im
2024-07-09 11:58     ` CLEMENT MATHIEU--DRIF
2024-07-09 21:17       ` Minwoo Im
2024-07-10  5:17         ` CLEMENT MATHIEU--DRIF
2024-07-11  8:04           ` Minwoo Im
2024-07-11 19:00             ` CLEMENT MATHIEU--DRIF
2024-07-17 23:44               ` Minwoo Im
2024-07-18  7:46                 ` CLEMENT MATHIEU--DRIF
2024-07-02  5:52 ` [PATCH ats_vtd v5 21/22] intel_iommu: set the address mask even when a translation fails CLEMENT MATHIEU--DRIF
2024-07-02  5:52 ` [PATCH ats_vtd v5 22/22] intel_iommu: add support for ATS CLEMENT MATHIEU--DRIF
2024-07-02 12:16 ` [PATCH ats_vtd v5 00/22] ATS support for VT-d Michael S. Tsirkin
2024-07-02 15:09   ` CLEMENT MATHIEU--DRIF
2024-07-02 13:44 ` Yi Liu
2024-07-02 15:12   ` CLEMENT MATHIEU--DRIF
2024-07-03 12:32 ` Yi Liu
2024-07-04  4:36   ` CLEMENT MATHIEU--DRIF
2024-07-04  8:14     ` Yi Liu
  -- strict thread matches above, loose matches on Subject: below --
2024-06-03  5:59 CLEMENT MATHIEU--DRIF
2024-06-03  5:59 ` [PATCH ats_vtd v5 06/22] pcie: add helper to declare PASID capability for a pcie device CLEMENT MATHIEU--DRIF

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