Re: [PATCH v3] target/i386: Fix model number of Zhaoxin YongFeng vCPU template

[Ewan Hai <ewanhai-oc@zhaoxin.com>]

On 4/14/25 11:05 PM, Zhao Liu wrote:
> 
> On Mon, Apr 14, 2025 at 03:53:42AM -0400, Ewan Hai wrote:
>> Date: Mon, 14 Apr 2025 03:53:42 -0400
>> From: Ewan Hai <ewanhai-oc@zhaoxin.com>
>> Subject: [PATCH v3] target/i386: Fix model number of Zhaoxin YongFeng vCPU
>>   template
>> X-Mailer: git-send-email 2.34.1
>>
>> The model number was mistakenly set to 0x0b (11) in commit ff04bc1ac4.
>> The correct value is 0x5b. This mistake occurred because the extended
>> model bits in cpuid[eax=0x1].eax were overlooked, and only the base
>> model was used.
>>
>> Using the wrong model number can affect guest behavior. One known issue
>> is that vPMU (which relies on the model number) may fail to operate
>> correctly.
>>
>> This patch corrects the model field by introducing a new vCPU version.
>>
>> Fixes: ff04bc1ac4 ("target/i386: Introduce Zhaoxin Yongfeng CPU model")
>> Signed-off-by: Ewan Hai <ewanhai-oc@zhaoxin.com>
>> ---
>>   target/i386/cpu.c | 12 ++++++++++++
>>   1 file changed, 12 insertions(+)
> 
> Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
> 
> BTW, if you want to add more notes or explaination to strongly ask users
> to use v2, you can add a section "Preferred CPU models for Zhaoxin x86
> hosts" in docs/system/cpu-models-x86.rst.inc.

Thanks for the reminder and the review, Zhao. I'll send a v4 patch that includes 
a new section titled “Preferred CPU models for Zhaoxin x86 hosts” in 
docs/system/cpu-models-x86.rst.inc to strongly recommend using v2.