From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Mohamed Mediouni <mohamed@unpredictable.fr>, qemu-devel@nongnu.org
Cc: Mads Ynddal <mads@ynddal.dk>, Paolo Bonzini <pbonzini@redhat.com>,
Shannon Zhao <shannon.zhaosl@gmail.com>,
Phil Dennis-Jordan <phil@philjordan.eu>,
Igor Mammedov <imammedo@redhat.com>,
qemu-arm@nongnu.org, Alexander Graf <agraf@csgraf.de>,
Roman Bolshakov <rbolshakov@ddn.com>,
Peter Maydell <peter.maydell@linaro.org>,
"Michael S. Tsirkin" <mst@redhat.com>,
Ani Sinha <anisinha@redhat.com>,
Cameron Esfahani <dirty@apple.com>
Subject: Re: [PATCH v5 06/13] target/arm: hvf: pass through CNTHCTL_EL2 and MDCCINT_EL1
Date: Wed, 6 Aug 2025 13:20:46 +0200 [thread overview]
Message-ID: <d2e93df6-bbb4-427b-828e-b6f5466ae2be@linaro.org> (raw)
In-Reply-To: <20250728134114.77545-7-mohamed@unpredictable.fr>
On 28/7/25 15:41, Mohamed Mediouni wrote:
> HVF traps accesses to CNTHCTL_EL2. For nested guests, HVF traps accesses to MDCCINT_EL1.
> Pass through those accesses to the Hypervisor.framework library.
>
> Signed-off-by: Mohamed Mediouni <mohamed@unpredictable.fr>
> ---
> target/arm/hvf/hvf.c | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c
> index f14a3a3cbd..eefae3069f 100644
> --- a/target/arm/hvf/hvf.c
> +++ b/target/arm/hvf/hvf.c
> @@ -297,6 +297,10 @@ void hvf_arm_init_debug(void)
> #define SYSREG_DBGWVR15_EL1 SYSREG(2, 0, 0, 15, 6)
> #define SYSREG_DBGWCR15_EL1 SYSREG(2, 0, 0, 15, 7)
>
> +/* EL2 registers */
> +#define SYSREG_CNTHCTL_EL2 SYSREG(3, 4, 14, 1, 0)
> +#define SYSREG_MDCCINT_EL1 SYSREG(2, 0, 0, 2, 0)
> +
> #define WFX_IS_WFE (1 << 0)
>
> #define TMR_CTL_ENABLE (1 << 0)
> @@ -1372,6 +1376,12 @@ static int hvf_sysreg_read(CPUState *cpu, uint32_t reg, uint64_t *val)
> case SYSREG_OSDLR_EL1:
> /* Dummy register */
> return 0;
> + case SYSREG_CNTHCTL_EL2:
> + assert_hvf_ok(hv_vcpu_get_sys_reg(cpu->accel->fd, HV_SYS_REG_CNTHCTL_EL2, val));
> + return 0;
We'd like to remove the assert_hvf_ok() calls, so adding more isn't
really helping. Anyhow,
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
next prev parent reply other threads:[~2025-08-06 11:21 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-28 13:41 [PATCH v5 00/13] HVF: Add support for platform vGIC and nested virtualisation Mohamed Mediouni
2025-07-28 13:41 ` [PATCH v5 01/13] hvf: switch hvf_arm_get_host_cpu_features to not create a vCPU Mohamed Mediouni
2025-08-06 11:12 ` Philippe Mathieu-Daudé
2025-07-28 13:41 ` [PATCH v5 02/13] accel, hw/arm, include/system/hvf: infrastructure changes for HVF vGIC Mohamed Mediouni
2025-08-06 11:32 ` Philippe Mathieu-Daudé
2025-08-07 2:03 ` Mohamed Mediouni
2025-07-28 13:41 ` [PATCH v5 03/13] hw/intc: Add hvf vGIC interrupt controller support Mohamed Mediouni
2025-08-06 10:32 ` Philippe Mathieu-Daudé
2025-07-28 13:41 ` [PATCH v5 04/13] hw/arm, target/arm: nested virtualisation on HVF Mohamed Mediouni
2025-07-28 13:41 ` [PATCH v5 05/13] hvf: save/restore Apple GIC state Mohamed Mediouni
2025-07-28 13:41 ` [PATCH v5 06/13] target/arm: hvf: pass through CNTHCTL_EL2 and MDCCINT_EL1 Mohamed Mediouni
2025-08-06 11:20 ` Philippe Mathieu-Daudé [this message]
2025-08-11 10:08 ` Mads Ynddal
2025-08-11 10:22 ` Peter Maydell
2025-08-12 11:29 ` Mads Ynddal
2025-07-28 13:41 ` [PATCH v5 07/13] hw/arm: virt: add GICv2m for the case when ITS is not available Mohamed Mediouni
2025-07-28 13:41 ` [PATCH v5 08/13] hw/arm: virt: cleanly fail on attempt to use the platform vGIC together with ITS Mohamed Mediouni
2025-07-28 13:41 ` [PATCH v5 09/13] hvf: only call hvf_sync_vtimer() when running without the platform vGIC Mohamed Mediouni
2025-07-28 13:41 ` [PATCH v5 10/13] hvf: sync registers used at EL2 Mohamed Mediouni
2025-08-06 11:10 ` Philippe Mathieu-Daudé
2025-07-28 13:41 ` [PATCH v5 11/13] hvf: gate ARM_FEATURE_PMU register emulation behind not being " Mohamed Mediouni
2025-08-06 11:21 ` Philippe Mathieu-Daudé
2025-07-28 13:41 ` [PATCH v5 12/13] target/arm: hvf: instantiate GIC early Mohamed Mediouni
2025-07-28 13:41 ` [PATCH v5 13/13] target/arm: hvf: add asserts for code paths not leveraged when using the vGIC Mohamed Mediouni
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