From: Paolo Bonzini <pbonzini@redhat.com>
To: Eduardo Habkost <ehabkost@redhat.com>,
"Dr. David Alan Gilbert (git)" <dgilbert@redhat.com>
Cc: qemu-devel@nongnu.org, marcel@redhat.com, mst@redhat.com,
kraxel@redhat.com
Subject: Re: [Qemu-devel] [PATCH v4 2/5] x86: Allow physical address bits to be set
Date: Fri, 8 Jul 2016 21:24:47 +0200 [thread overview]
Message-ID: <d30b7fcc-8fe8-7181-0ba7-3f4a6eade6da@redhat.com> (raw)
In-Reply-To: <20160708185932.GO4131@thinpad.lan.raisama.net>
On 08/07/2016 20:59, Eduardo Habkost wrote:
> > + if (env->features[FEAT_1_EDX] & CPUID_PSE36) {
> > + cpu->phys_bits = 36;
> > + } else {
> > + cpu->phys_bits = 32;
>
> But TCG_PHYS_ADDR_BITS is still 36. Does this mean TCG
> reserved-bit handling is broken if pse36 is disabled?
This makes sense as a default, apparently if you don't have PSE36 but
you have phys_bits > 32, Windows complains:
commit 45fd08effd461f85d0480d3b8f85a07751fc55b3
Author: aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>
Date: Tue Oct 14 19:20:52 2008 +0000
target-i386: Add Core Duo Definition
This patch adds a CPU definition for the Core Duo CPU. I tried to
resemble the original as closely as possible and document what features
are missing still. This patch enables the use of a recent CPU definition
on 32 bit platforms.
It also fixes two issues that went along the line:
- invalid xlevel in core2duo spec
While looking though the CPUIDs again, I found that xlevel is actually 8.
- non-PSE36 support
The CoreDuo CPUID does not expose the PSE36 capability, but CPUID
0x80000008 is tied to 36 bits. This broke Windows XP installation for
me, so I just set it to 32 bits width when PSE36 is not available. The
original CPU also exposes 32 bit width in CPUID 0x80000008.
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5488 c046a42c-6fe2-441c-8c8c-71466251a162
As long as it's overridable I guess it's fine...
Paolo
next prev parent reply other threads:[~2016-07-08 19:24 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-08 15:01 [Qemu-devel] [PATCH v4 0/5] x86: Physical address limit patches Dr. David Alan Gilbert (git)
2016-07-08 15:01 ` [Qemu-devel] [PATCH v4 1/5] x86: Provide TCG_PHYS_ADDR_BITS Dr. David Alan Gilbert (git)
2016-07-08 18:44 ` Eduardo Habkost
2016-07-08 15:01 ` [Qemu-devel] [PATCH v4 2/5] x86: Allow physical address bits to be set Dr. David Alan Gilbert (git)
2016-07-08 18:59 ` Eduardo Habkost
2016-07-08 19:24 ` Paolo Bonzini [this message]
2016-07-08 19:25 ` Dr. David Alan Gilbert
2016-07-08 19:50 ` Eduardo Habkost
2016-07-08 23:36 ` Eduardo Habkost
2016-07-09 0:59 ` Richard Henderson
2016-07-09 2:36 ` Eduardo Habkost
2016-07-08 15:01 ` [Qemu-devel] [PATCH v4 3/5] x86: Mask mtrr mask based on CPU physical address limits Dr. David Alan Gilbert (git)
2016-07-08 15:01 ` [Qemu-devel] [PATCH v4 4/5] x86: fill high bits of mtrr mask Dr. David Alan Gilbert (git)
2016-07-08 23:07 ` Eduardo Habkost
2016-07-08 15:01 ` [Qemu-devel] [PATCH v4 5/5] x86: Set physical address bits based on host Dr. David Alan Gilbert (git)
2016-07-08 16:34 ` Paolo Bonzini
2016-07-08 23:16 ` Eduardo Habkost
2016-07-11 12:29 ` Dr. David Alan Gilbert
2016-07-11 13:01 ` Eduardo Habkost
2016-07-11 15:39 ` Dr. David Alan Gilbert
2016-07-11 18:42 ` Eduardo Habkost
2016-07-11 18:47 ` Dr. David Alan Gilbert
2016-07-09 0:15 ` [Qemu-devel] [PATCH v4 0/5] x86: Physical address limit patches Eduardo Habkost
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