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[173.198.77.218]) by smtp.gmail.com with ESMTPSA id g26sm14672pgb.45.2021.08.12.17.35.54 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 12 Aug 2021 17:35:56 -0700 (PDT) Subject: Re: [PATCH 12/19] target/ppc/pmu_book3s_helper.c: enable PMC1 counter negative EBB To: Daniel Henrique Barboza , David Gibson References: <20210809131057.1694145-1-danielhb413@gmail.com> <20210809131057.1694145-13-danielhb413@gmail.com> <6a10c0a7-1c4f-0d24-f2cc-12666e590739@gmail.com> <4df4dacf-ba9b-f86e-8510-7c084420e974@gmail.com> <47018114-2249-0fe9-cb87-0ac35ed1e49d@linaro.org> <7f9ee790-3f5a-6161-627b-0c4313a08bca@gmail.com> From: Richard Henderson Message-ID: Date: Thu, 12 Aug 2021 14:35:52 -1000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 MIME-Version: 1.0 In-Reply-To: <7f9ee790-3f5a-6161-627b-0c4313a08bca@gmail.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::629; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x629.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org, groug@kaod.org, qemu-ppc@nongnu.org, gustavo.romero@linaro.org, clg@kaod.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 8/12/21 11:24 AM, Daniel Henrique Barboza wrote: > +void helper_insns_inc(CPUPPCState *env) > +{ > +    env->pmu_insns_count++; > +} > + > +void helper_insns_dec(CPUPPCState *env) > +{ > +    env->pmu_insns_count--; > +} > diff --git a/target/ppc/translate.c b/target/ppc/translate.c > index 60f35360b7..c56c656694 100644 > --- a/target/ppc/translate.c > +++ b/target/ppc/translate.c > @@ -8689,6 +8689,7 @@ static void ppc_tr_tb_start(DisasContextBase *db, CPUState *cs) > >  static void ppc_tr_insn_start(DisasContextBase *dcbase, CPUState *cs) >  { > +    gen_helper_insns_inc(cpu_env); >      tcg_gen_insn_start(dcbase->pc_next); >  } > > @@ -8755,6 +8756,8 @@ static void ppc_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs) >          return; >      } > > +    gen_helper_insns_dec(cpu_env); > + >      /* Honor single stepping. */ >      sse = ctx->singlestep_enabled & (CPU_SINGLE_STEP | GDBSTUB_SINGLE_STEP); >      if (unlikely(sse)) { > > > And then I used 'env->pmu_insns_count' to update the instruction counters. And it's > working, with a slightly better performance than we have with the icount() > version. I'm not sure why it's working now since I tried something very similar > before and it didn't. Figures. Not sure why you're decrementing there. Also, how do you want to count retired instructions? Ones that merely start? E.g. including loads that fault? How about illegal instructions? Or does the instruction need to run to completion? Which of these you choose affects where you place the increment. It is of course extremely heavyweight to call a helper to perform a simple addition operation. You may also wish to look at target/hexagon, gen_exec_counters(), which is doing the same sort of thing. But not completely, since it loses count along dynamic exception paths (e.g. faulting load). That can be fixed as well, via restore_state_to_opc. r~