From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34229) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bAbl3-0007le-W2 for qemu-devel@nongnu.org; Wed, 08 Jun 2016 07:34:51 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bAbky-0001S7-HW for qemu-devel@nongnu.org; Wed, 08 Jun 2016 07:34:48 -0400 Received: from mail-wm0-x244.google.com ([2a00:1450:400c:c09::244]:34171) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bAbky-0001RZ-9k for qemu-devel@nongnu.org; Wed, 08 Jun 2016 07:34:44 -0400 Received: by mail-wm0-x244.google.com with SMTP id n184so2250812wmn.1 for ; Wed, 08 Jun 2016 04:34:44 -0700 (PDT) Sender: Paolo Bonzini References: <20160603060944.17373-1-haozhong.zhang@intel.com> <20160603060944.17373-2-haozhong.zhang@intel.com> <20160605154103.rrqlau2jfmc2ialj@hz-desktop> From: Paolo Bonzini Message-ID: Date: Wed, 8 Jun 2016 13:34:39 +0200 MIME-Version: 1.0 In-Reply-To: <20160605154103.rrqlau2jfmc2ialj@hz-desktop> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v3 1/2] target-i386: KVM: add basic Intel LMCE support List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Boris Petkov , qemu-devel@nongnu.org, Richard Henderson , Eduardo Habkost , Marcelo Tosatti , "Michael S . Tsirkin" , kvm@vger.kernel.org, Tony Luck , Andi Kleen , Ashok Raj On 05/06/2016 17:41, Haozhong Zhang wrote: > On 06/04/16 12:34, Boris Petkov wrote: >> Haozhong Zhang wrote: >> >>> This patch adds the support to inject SRAR and SRAO as LMCE, i.e. they >>> will be injected to only one VCPU rather than broadcast to all >>> VCPUs. As KVM reports LMCE support on Intel platforms, this features is >>> only available on Intel platforms. >>> >>> Signed-off-by: Ashok Raj >>> Signed-off-by: Haozhong Zhang >>> --- >>> Cc: Paolo Bonzini >>> Cc: Richard Henderson >>> Cc: Eduardo Habkost >>> Cc: Marcelo Tosatti >>> Cc: Boris Petkov >>> Cc: kvm@vger.kernel.org >>> Cc: Tony Luck >>> Cc: Andi Kleen >>> --- >>> target-i386/cpu.c | 26 ++++++++++++++++++++++++++ >>> target-i386/cpu.h | 13 ++++++++++++- >>> target-i386/kvm.c | 35 +++++++++++++++++++++++++++++++---- >>> 3 files changed, 69 insertions(+), 5 deletions(-) >> >> ... >> >>> @@ -1173,6 +1182,8 @@ struct X86CPU { >>> */ >>> bool enable_pmu; >>> >>> + bool enable_lmce; >> >> That struct would go fat pretty fast if it grows a bool per CPU feature. Perhaps a more clever, a-bit-per-featurebit scheme would be in order. > > OK, I'll use a 64-bit integer for current and future features. No, please keep this as is for now. It can be refactored later. Paolo