From: Paolo Bonzini <pbonzini@redhat.com>
To: Markus Armbruster <armbru@redhat.com>,
Peter Maydell <peter.maydell@linaro.org>
Cc: "qemu-riscv@nongnu.org" <qemu-riscv@nongnu.org>,
Jeff Cody <codyprime@gmail.com>,
"palmer@sifive.com" <palmer@sifive.com>,
"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
Alistair Francis <Alistair.Francis@wdc.com>,
Stefan Hajnoczi <stefanha@redhat.com>,
"bmeng.cn@gmail.com" <bmeng.cn@gmail.com>
Subject: Re: [Qemu-devel] [PULL 33/34] roms: Add OpenSBI version 0.3
Date: Tue, 2 Jul 2019 12:32:28 +0200 [thread overview]
Message-ID: <d5fb05ba-e313-b9db-9cfa-2c6f7c1b90f8@redhat.com> (raw)
In-Reply-To: <87a7dxqdl5.fsf@dusky.pond.sub.org>
On 02/07/19 06:12, Markus Armbruster wrote:
>> Yeah, if we're not building the apache-2.0 parts then I think
>> we're OK, and as you say there's the question of whether QEMU's
>> GPL affects what we ship as mere bios blobs to run as guest
>> code anyway. But it's sufficiently not a "really obviously ok"
>> that I'd like a second opinion; cc'd some people who might have
>> second opinions.
>
> You need an expert opinion.
>
> My non-expert opinion: we can't distribute anything that's not
> compatible with GPLv2
Guest code is not part of QEMU. We don't say that SeaBIOS, SLOF, etc.
are part of QEMU; it constitutes mere aggregation with the GPLv2 QEMU
sources, so it _is_ possible to distribute APSL2 guest code with QEMU.
IANAL, but I'm fairly sure about this.
However I agree that LICENSE needs to be updated, something like this:
diff --git a/LICENSE b/LICENSE
index 0e0b4b9553..81b9b3572d 100644
--- a/LICENSE
+++ b/LICENSE
@@ -1,13 +1,18 @@
-The following points clarify the QEMU license:
+The QEMU distribution includes both the QEMU emulator and
+various firmware files. These are separate programs that are
+distributed together for our users' convenience, and they have
+separate license.
-1) QEMU as a whole is released under the GNU General Public License,
-version 2.
+The following points clarify the license of the QEMU emulator:
-2) Parts of QEMU have specific licenses which are compatible with the
-GNU General Public License, version 2. Hence each source file contains
-its own licensing information. Source files with no licensing information
-are released under the GNU General Public License, version 2 or (at your
-option) any later version.
+1) The QEMU emulator as a whole is released under the GNU General
+Public License, version 2.
+
+2) Parts of the QEMU emulator have specific licenses which are compatible
+with the GNU General Public License, version 2. Hence each source file
+contains its own licensing information. Source files with no licensing
+information are released under the GNU General Public License, version
+2 or (at your option) any later version.
As of July 2013, contributions under version 2 of the GNU General Public
License (and no later version) are only accepted for the following files
Paolo
next prev parent reply other threads:[~2019-07-02 10:34 UTC|newest]
Thread overview: 57+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-27 15:19 [Qemu-devel] [PULL] RISC-V Patches for the 4.1 Soft Freeze, Part 2 Palmer Dabbelt
2019-06-27 15:19 ` [Qemu-devel] [PULL 01/34] target/riscv: Allow setting ISA extensions via CPU props Palmer Dabbelt
2019-06-27 15:19 ` [Qemu-devel] [PULL 02/34] sifive_prci: Read and write PRCI registers Palmer Dabbelt
2019-06-27 15:19 ` [Qemu-devel] [PULL 03/34] target/riscv: Fix PMP range boundary address bug Palmer Dabbelt
2019-06-27 15:19 ` [Qemu-devel] [PULL 04/34] target/riscv: Implement riscv_cpu_unassigned_access Palmer Dabbelt
2019-06-27 15:19 ` [Qemu-devel] [PULL 05/34] RISC-V: Only Check PMP if MMU translation succeeds Palmer Dabbelt
2019-06-27 15:19 ` [Qemu-devel] [PULL 06/34] RISC-V: Raise access fault exceptions on PMP violations Palmer Dabbelt
2019-06-27 15:19 ` [Qemu-devel] [PULL 07/34] RISC-V: Check for the effective memory privilege mode during PMP checks Palmer Dabbelt
2019-06-27 15:19 ` [Qemu-devel] [PULL 08/34] RISC-V: Check PMP during Page Table Walks Palmer Dabbelt
2019-06-27 15:19 ` [Qemu-devel] [PULL 09/34] RISC-V: Fix a PMP bug where it succeeds even if PMP entry is off Palmer Dabbelt
2019-06-27 15:19 ` [Qemu-devel] [PULL 10/34] RISC-V: Fix a PMP check with the correct access size Palmer Dabbelt
2019-06-27 17:44 ` [Qemu-devel] [Qemu-riscv] " Jonathan Behrens
2019-06-27 18:23 ` Richard Henderson
2019-07-08 12:46 ` Palmer Dabbelt
2019-06-27 15:19 ` [Qemu-devel] [PULL 11/34] riscv: virt: Correct pci "bus-range" encoding Palmer Dabbelt
2019-06-27 15:19 ` [Qemu-devel] [PULL 12/34] RISC-V: Fix a memory leak when realizing a sifive_e Palmer Dabbelt
2019-06-27 15:19 ` [Qemu-devel] [PULL 13/34] target/riscv: Restructure deprecatd CPUs Palmer Dabbelt
2019-06-27 15:19 ` [Qemu-devel] [PULL 14/34] target/riscv: Add the privledge spec version 1.11.0 Palmer Dabbelt
2019-06-27 15:19 ` [Qemu-devel] [PULL 15/34] target/riscv: Add the mcountinhibit CSR Palmer Dabbelt
2019-06-27 15:19 ` [Qemu-devel] [PULL 16/34] target/riscv: Set privledge spec 1.11.0 as default Palmer Dabbelt
2019-06-27 15:19 ` [Qemu-devel] [PULL 17/34] qemu-deprecated.texi: Deprecate the RISC-V privledge spec 1.09.1 Palmer Dabbelt
2019-06-27 15:19 ` [Qemu-devel] [PULL 18/34] target/riscv: Require either I or E base extension Palmer Dabbelt
2019-06-27 15:19 ` [Qemu-devel] [PULL 19/34] target/riscv: Remove user version information Palmer Dabbelt
2019-06-27 15:19 ` [Qemu-devel] [PULL 20/34] target/riscv: Add support for disabling/enabling Counters Palmer Dabbelt
2019-06-27 15:19 ` [Qemu-devel] [PULL 21/34] RISC-V: Add support for the Zifencei extension Palmer Dabbelt
2019-06-27 15:19 ` [Qemu-devel] [PULL 22/34] RISC-V: Add support for the Zicsr extension Palmer Dabbelt
2019-06-27 15:20 ` [Qemu-devel] [PULL 23/34] RISC-V: Clear load reservations on context switch and SC Palmer Dabbelt
2019-06-27 15:20 ` [Qemu-devel] [PULL 24/34] RISC-V: Update syscall list for 32-bit support Palmer Dabbelt
2019-06-27 15:20 ` [Qemu-devel] [PULL 25/34] riscv: virt: Add cpu-topology DT node Palmer Dabbelt
2019-06-27 15:20 ` [Qemu-devel] [PULL 26/34] disas/riscv: Disassemble reserved compressed encodings as illegal Palmer Dabbelt
2019-06-27 15:20 ` [Qemu-devel] [PULL 27/34] disas/riscv: Fix `rdinstreth` constraint Palmer Dabbelt
2019-06-27 15:20 ` [Qemu-devel] [PULL 28/34] riscv: sifive_u: Do not create hard-coded phandles in DT Palmer Dabbelt
2019-06-27 15:20 ` [Qemu-devel] [PULL 29/34] riscv: sifive_u: Update the plic hart config to support multicore Palmer Dabbelt
2019-06-27 15:20 ` [Qemu-devel] [PULL 30/34] hw/riscv: Split out the boot functions Palmer Dabbelt
2019-06-27 15:20 ` [Qemu-devel] [PULL 31/34] hw/riscv: Add support for loading a firmware Palmer Dabbelt
2019-06-27 15:20 ` [Qemu-devel] [PULL 32/34] hw/riscv: Extend the kernel loading support Palmer Dabbelt
2019-06-27 15:20 ` [Qemu-devel] [PULL 33/34] roms: Add OpenSBI version 0.3 Palmer Dabbelt
2019-06-28 9:46 ` Jonathan Cameron
2019-06-28 16:12 ` Alistair Francis
2019-06-28 17:10 ` Palmer Dabbelt
2019-07-01 12:40 ` Jonathan Cameron
2019-07-01 13:23 ` [Qemu-devel] [Qemu-riscv] " Anup Patel
2019-07-01 16:39 ` Alistair Francis
2019-07-01 16:54 ` [Qemu-devel] " Peter Maydell
2019-07-01 17:50 ` Alistair Francis
2019-07-01 18:01 ` Peter Maydell
2019-07-01 18:09 ` Alistair Francis
2019-07-01 18:13 ` Peter Maydell
2019-07-01 18:19 ` Alistair Francis
2019-07-02 7:02 ` [Qemu-devel] [Qemu-riscv] " Anup Patel
2019-07-02 4:12 ` [Qemu-devel] " Markus Armbruster
2019-07-02 10:32 ` Paolo Bonzini [this message]
2019-07-02 16:07 ` Alistair Francis
2019-07-04 16:00 ` Stefan Hajnoczi
2019-07-04 19:35 ` Alistair Francis
2019-06-27 15:20 ` [Qemu-devel] [PULL 34/34] hw/riscv: Load OpenSBI as the default firmware Palmer Dabbelt
-- strict thread matches above, loose matches on Subject: below --
2019-06-28 17:31 [Qemu-devel] [PULL] RISC-V Patches for the 4.1 Soft Freeze, Part 2 v2 Palmer Dabbelt
2019-06-28 17:32 ` [Qemu-devel] [PULL 33/34] roms: Add OpenSBI version 0.3 Palmer Dabbelt
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