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Thu, 12 Oct 2023 17:28:18 +0000 (GMT) Message-ID: Subject: Re: [PATCH 2/2] ppc/pnv: Connect I2C controller model to powernv9 chip From: Miles Glenn To: =?ISO-8859-1?Q?C=E9dric?= Le Goater , qemu-ppc@nongnu.org Cc: qemu-devel@nongnu.org, clg@kaod.org, npiggin@gmail.com, fbarrat@linux.ibm.com Date: Thu, 12 Oct 2023 12:28:18 -0500 In-Reply-To: <7c55e7b5-cff6-0f57-b3ff-9869a920f08a@redhat.com> References: <20231010171951.4165180-1-milesg@linux.vnet.ibm.com> <20231010171951.4165180-3-milesg@linux.vnet.ibm.com> <7c55e7b5-cff6-0f57-b3ff-9869a920f08a@redhat.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5 (3.28.5-18.el8) Mime-Version: 1.0 Content-Transfer-Encoding: 8bit X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: 1nR-NIJYzGVstQEcdvSePSDLkpV4rSKs X-Proofpoint-GUID: bSgA2Af3lkK4t0YcnsZ8TjDO7bwYUZdg X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-12_09,2023-10-12_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 malwarescore=0 suspectscore=0 mlxscore=0 clxscore=1015 phishscore=0 impostorscore=0 lowpriorityscore=0 adultscore=0 spamscore=0 priorityscore=1501 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2309180000 definitions=main-2310120145 Received-SPF: none client-ip=148.163.156.1; envelope-from=milesg@linux.vnet.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Tue, 2023-10-10 at 22:14 +0200, Cédric Le Goater wrote: > On 10/10/23 19:19, Glenn Miles wrote: > > From: Cédric Le Goater > > > > Wires up three I2C controller instances to the powernv9 chip > > XSCOM address space. > > > > Each controller instance is wired up to a single I2C bus of > > its own. No other I2C devices are connected to the buses > > at this time. > > > > Signed-off-by: Cédric Le Goater > > [milesg: Split wiring from addition of model itself] > > [milesg: Added new commit message] > > Signed-off-by: Glenn Miles > > --- > > hw/ppc/pnv.c | 26 ++++++++++++++++++++++++++ > > include/hw/ppc/pnv_chip.h | 4 ++++ > > 2 files changed, 30 insertions(+) > > > > diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c > > index eb54f93986..32b6d9889d 100644 > > --- a/hw/ppc/pnv.c > > +++ b/hw/ppc/pnv.c > > @@ -1438,6 +1438,10 @@ static void > > pnv_chip_power9_instance_init(Object *obj) > > object_initialize_child(obj, "pec[*]", &chip9->pecs[i], > > TYPE_PNV_PHB4_PEC); > > } > > + > > + for (i = 0; i < PNV9_CHIP_MAX_I2C; i++) { > > + object_initialize_child(obj, "i2c[*]", &chip9->i2c[i], > > TYPE_PNV_I2C); > > + } > > } > > > > static void pnv_chip_quad_realize_one(PnvChip *chip, PnvQuad *eq, > > @@ -1510,6 +1514,7 @@ static void > > pnv_chip_power9_realize(DeviceState *dev, Error **errp) > > PnvChip *chip = PNV_CHIP(dev); > > Pnv9Psi *psi9 = &chip9->psi; > > Error *local_err = NULL; > > + int i; > > > > /* XSCOM bridge is first */ > > pnv_xscom_realize(chip, PNV9_XSCOM_SIZE, &local_err); > > @@ -1613,6 +1618,27 @@ static void > > pnv_chip_power9_realize(DeviceState *dev, Error **errp) > > error_propagate(errp, local_err); > > return; > > } > > + > > + /* > > + * I2C > > + * TODO: The number of busses is specific to each platform > > Could the hardcoded values used in the properties below be > PnvChipClass > attributes instead ? > > Thanks, > > C. > Yes, I can do that. > > > + */ > > + for (i = 0; i < PNV9_CHIP_MAX_I2C; i++) { > > + Object *obj = OBJECT(&chip9->i2c[i]); > > + > > + object_property_set_int(obj, "engine", i + 1, > > &error_fatal); > > + object_property_set_int(obj, "num-busses", 1, > > &error_fatal); > > + object_property_set_link(obj, "chip", OBJECT(chip), > > &error_abort); > > + if (!qdev_realize(DEVICE(obj), NULL, errp)) { > > + return; > > + } > > + pnv_xscom_add_subregion(chip, PNV9_XSCOM_I2CM_BASE + > > + chip9->i2c[i].engine * > > PNV9_XSCOM_I2CM_SIZE, > > + &chip9->i2c[i].xscom_regs); > > + qdev_connect_gpio_out(DEVICE(&chip9->i2c[i]), 0, > > + qdev_get_gpio_in(DEVICE(&chip9- > > >psi), > > + PSIHB9_IRQ_SBE_I2C) > > ); > > + } > > } > > > > static uint32_t pnv_chip_power9_xscom_pcba(PnvChip *chip, > > uint64_t addr) > > diff --git a/include/hw/ppc/pnv_chip.h b/include/hw/ppc/pnv_chip.h > > index 53e1d921d7..3bbe2783c9 100644 > > --- a/include/hw/ppc/pnv_chip.h > > +++ b/include/hw/ppc/pnv_chip.h > > @@ -9,6 +9,7 @@ > > #include "hw/ppc/pnv_psi.h" > > #include "hw/ppc/pnv_sbe.h" > > #include "hw/ppc/pnv_xive.h" > > +#include "hw/ppc/pnv_i2c.h" > > #include "hw/sysbus.h" > > > > OBJECT_DECLARE_TYPE(PnvChip, PnvChipClass, > > @@ -86,6 +87,9 @@ struct Pnv9Chip { > > > > #define PNV9_CHIP_MAX_PEC 3 > > PnvPhb4PecState pecs[PNV9_CHIP_MAX_PEC]; > > + > > +#define PNV9_CHIP_MAX_I2C 3 > > + PnvI2C i2c[PNV9_CHIP_MAX_I2C]; > > }; > > > > /*