From: "Philippe Mathieu-Daudé" <philmd@redhat.com>
To: Roman Kapl <rka@sysgo.com>
Cc: qemu-devel@nongnu.org, Paolo Bonzini <pbonzini@redhat.com>,
Richard Henderson <richard.henderson@linaro.org>,
Eduardo Habkost <ehabkost@redhat.com>,
"Michael S. Tsirkin" <mst@redhat.com>
Subject: Re: [PATCH 1/1] amd_iommu: fix device entry invalidation
Date: Tue, 1 Jun 2021 16:27:02 +0200 [thread overview]
Message-ID: <d67b11e7-0e3a-f358-f0ea-99367ef26dbc@redhat.com> (raw)
In-Reply-To: <20210601141039.16104-1-rka@sysgo.com>
On 6/1/21 4:10 PM, Roman Kapl wrote:
> Since QEMU maintains TLB entries keyed by the device ID, there is no separate
> device entry cache. This means we need to invalidate all translations keyed by
> the device ID.
>
Fixes: d29a09ca684 ("hw/i386: Introduce AMD IOMMU") ?
> Signed-off-by: Roman Kapl <rka@sysgo.com>
> ---
> hw/i386/amd_iommu.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c
> index 2801dff97c..62d22b220b 100644
> --- a/hw/i386/amd_iommu.c
> +++ b/hw/i386/amd_iommu.c
> @@ -356,6 +356,7 @@ static void amdvi_update_iotlb(AMDVIState *s, uint16_t devid,
> }
>
> entry->domid = domid;
> + entry->devid = devid;
> entry->perms = to_cache.perm;
> entry->translated_addr = to_cache.translated_addr;
> entry->page_mask = to_cache.addr_mask;
> @@ -399,6 +400,8 @@ static void amdvi_inval_devtab_entry(AMDVIState *s, uint64_t *cmd)
> amdvi_log_illegalcom_error(s, extract64(cmd[0], 60, 4),
> s->cmdbuf + s->cmdbuf_head);
> }
> + g_hash_table_foreach_remove(s->iotlb, amdvi_iotlb_remove_by_devid,
> + &devid);
> trace_amdvi_devtab_inval(PCI_BUS_NUM(devid), PCI_SLOT(devid),
> PCI_FUNC(devid));
> }
>
prev parent reply other threads:[~2021-06-01 14:31 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-01 14:10 [PATCH 1/1] amd_iommu: fix device entry invalidation Roman Kapl
2021-06-01 14:27 ` Philippe Mathieu-Daudé [this message]
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