Re: [PATCH v3 0/5] Interrupt Remap support for emulated amd viommu

["Shukla, Santosh" <santosh.shukla@amd.com>]

Hi there,

Ping? Appreciate any further review comment or series is OK to pull, Please let me know.

Thank you!
Santosh

On 10/9/2024 11:35 AM, Shukla, Santosh wrote:
> 
> Ping?
> Gentle reminder.
> 
> Thanks,
> Santosh
> 
> On 9/27/2024 10:59 PM, Santosh Shukla wrote:
>> Series adds following feature support for emulated amd vIOMMU
>> 1) Pass Through(PT) mode
>> 2) Interrupt Remapping(IR) mode
>>
>> 1) PT mode
>> Introducing the shared 'nodma' memory region that can be aliased
>> by all the devices in the PT mode. Shared memory with aliasing
>> approach will help run VM faster when lot of devices attached to
>> VM.
>>
>> 2) IR mode
>> Shared IR memory region with aliasing approach proposed for the
>> reason mentioned in 1). Also add support to invalidate Interrupt
>> remaping table(IRT).
>>
>> Series based on e10cd93872c31332b002c933a798ab0bc51705a4
>>
>> Testing:
>> 1. nvme/fio testing for VM with > 255 vCPU with xtsup=on and x2apic
>> enabled
>> 2. Windows Server 2022 VM testing for > 255 vCPU.
>>
>> Change History:
>>
>> v3:
>> - Incorporated Alejandro's v2 nits comment.
>>
>> V2:
>> - https://lore.kernel.org/qemu-devel/20240916143116.169693-1-santosh.shukla@amd.com/
>>
>> V1:
>> - https://lore.kernel.org/all/20240904100257.184851-3-santosh.shukla@amd.com/T/
>>
>> Suravee Suthikulpanit (5):
>>   amd_iommu: Rename variable mmio to mr_mmio
>>   amd_iommu: Add support for pass though mode
>>   amd_iommu: Use shared memory region for Interrupt Remapping
>>   amd_iommu: Send notification when invalidate interrupt entry cache
>>   amd_iommu: Check APIC ID > 255 for XTSup
>>
>>  hw/i386/acpi-build.c |  4 +-
>>  hw/i386/amd_iommu.c  | 98 +++++++++++++++++++++++++++++++++++---------
>>  hw/i386/amd_iommu.h  |  5 ++-
>>  3 files changed, 85 insertions(+), 22 deletions(-)
>>