[PULL 0/3] loongarch-to-apply queue

[PULL 0/3] loongarch-to-apply queue

[Song Gao]

The following changes since commit f0007b7f03e2d7fc33e71c3a582f2364c51a226b:

  Merge tag 'pull-target-arm-20250916' of https://gitlab.com/pm215/qemu into staging (2025-09-17 11:10:55 -0700)

are available in the Git repository at:

  https://github.com/gaosong715/qemu.git tags/pull-loongarch-20250918

for you to fetch changes up to cb5ee0017fc9909916383634a3f13eae05e6fe5c:

  hw/loongarch/virt: Register reset interface with cpu plug callback (2025-09-18 17:39:57 +0800)

----------------------------------------------------------------
pull-loongarch-20250918

----------------------------------------------------------------
Bibo Mao (3):
      hw/loongarch/virt: Add BSP support with aux boot code
      hw/loongarch/virt: Remove unnecessay pre-boot setting with BSP
      hw/loongarch/virt: Register reset interface with cpu plug callback

 hw/loongarch/boot.c    | 71 ++++++++++++++++++++++++--------------------------
 hw/loongarch/virt.c    |  2 ++
 target/loongarch/cpu.h |  4 ---
 3 files changed, 36 insertions(+), 41 deletions(-)

[PULL 1/3] hw/loongarch/virt: Add BSP support with aux boot code

[Song Gao]

From: Bibo Mao <maobibo@loongson.cn>

If system boots directly from Linux kernel, BSP core jumps to kernel
entry of Linux kernel image and other APs jump to aux boot code. Instead
BSP and APs can all jump to aux boot code like UEFI bios.

With aux boot code, BSP core is judged from physical cpu id, whose
cpu id is 0. With BSP core, load data to register A0-A2 and PC.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-ID: <20250906070200.3749326-2-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 hw/loongarch/boot.c | 36 ++++++++++++++++++++++++++++++++++--
 1 file changed, 34 insertions(+), 2 deletions(-)

diff --git a/hw/loongarch/boot.c b/hw/loongarch/boot.c
index 14d6c52d4e..4962668e5a 100644
--- a/hw/loongarch/boot.c
+++ b/hw/loongarch/boot.c
@@ -35,13 +35,19 @@ struct loongarch_linux_hdr {
     uint32_t pe_header_offset;
 } QEMU_PACKED;
 
-static const unsigned int slave_boot_code[] = {
+static const unsigned int aux_boot_code[] = {
                   /* Configure reset ebase.                    */
     0x0400302c,   /* csrwr      $t0, LOONGARCH_CSR_EENTRY      */
 
                   /* Disable interrupt.                        */
     0x0380100c,   /* ori        $t0, $zero,0x4                 */
     0x04000180,   /* csrxchg    $zero, $t0, LOONGARCH_CSR_CRMD */
+    0x03400000,   /* nop                                       */
+
+    0x0400800c,   /* csrrd      $t0, LOONGARCH_CSR_CPUNUM      */
+    0x034ffd8c,   /* andi       $t0, $t0, 0x3ff                */
+    0x0015000d,   /* move       $t1, $zero                     */
+    0x5800718d,   /* beq        $t0, $t1, 112                  */
 
                   /* Clear mailbox.                            */
     0x1400002d,   /* lu12i.w    $t1, 1(0x1)                    */
@@ -81,6 +87,26 @@ static const unsigned int slave_boot_code[] = {
     0x06480dac,   /* iocsrrd.d  $t0, $t1                       */
     0x00150181,   /* move       $ra, $t0                       */
     0x4c000020,   /* jirl       $zero, $ra,0                   */
+                  /* BSP Core                                  */
+    0x03400000,   /* nop                                       */
+    0x1800000d,   /* pcaddi     $t1, 0                         */
+    0x28c0a1a4,   /* ld.d       $a0, $t1, 40                   */
+    0x1800000d,   /* pcaddi     $t1, 0                         */
+    0x28c0a1a5,   /* ld.d       $a1, $t1, 40                   */
+    0x1800000d,   /* pcaddi     $t1, 0                         */
+    0x28c0a1a6,   /* ld.d       $a2, $t1, 40                   */
+    0x1800000d,   /* pcaddi     $t1, 0                         */
+    0x28c0a1ac,   /* ld.d       $t0, $t1, 40                   */
+    0x00150181,   /* move       $ra, $t0                       */
+    0x4c000020,   /* jirl       $zero, $ra,0                   */
+    0x00000000,   /* .dword 0   A0                             */
+    0x00000000,
+    0x00000000,   /* .dword 0   A1                             */
+    0x00000000,
+    0x00000000,   /* .dword 0   A2                             */
+    0x00000000,
+    0x00000000,   /* .dword 0   PC                             */
+    0x00000000,
 };
 
 static inline void *guidcpy(void *dst, const void *src)
@@ -391,6 +417,7 @@ static void loongarch_direct_kernel_boot(MachineState *ms,
     int64_t kernel_addr = VIRT_FLASH0_BASE;
     LoongArchCPU *lacpu;
     CPUState *cs;
+    uint64_t *data;
 
     if (info->kernel_filename) {
         kernel_addr = load_kernel_info(info);
@@ -408,7 +435,12 @@ static void loongarch_direct_kernel_boot(MachineState *ms,
 
     /* Load slave boot code at pflash0 . */
     void *boot_code = g_malloc0(VIRT_FLASH0_SIZE);
-    memcpy(boot_code, &slave_boot_code, sizeof(slave_boot_code));
+    memcpy(boot_code, &aux_boot_code, sizeof(aux_boot_code));
+    data = (uint64_t *)(boot_code + sizeof(aux_boot_code));
+    *(data - 4) = cpu_to_le64(info->a0);
+    *(data - 3) = cpu_to_le64(info->a1);
+    *(data - 2) = cpu_to_le64(info->a2);
+    *(data - 1) = cpu_to_le64(kernel_addr);
     rom_add_blob_fixed("boot_code", boot_code, VIRT_FLASH0_SIZE, VIRT_FLASH0_BASE);
 
     CPU_FOREACH(cs) {
-- 
2.47.0

[PULL 2/3] hw/loongarch/virt: Remove unnecessay pre-boot setting with BSP

[Song Gao]

From: Bibo Mao <maobibo@loongson.cn>

With BSP core, it boots from aux boot code and loads data into register
A0-A2 and PC. Pre-boot setting is not unnecessary and can be removed.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-ID: <20250906070200.3749326-3-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 hw/loongarch/boot.c    | 22 ----------------------
 target/loongarch/cpu.h |  4 ----
 2 files changed, 26 deletions(-)

diff --git a/hw/loongarch/boot.c b/hw/loongarch/boot.c
index 4962668e5a..5799b4c75c 100644
--- a/hw/loongarch/boot.c
+++ b/hw/loongarch/boot.c
@@ -353,17 +353,8 @@ static int64_t load_kernel_info(struct loongarch_boot_info *info)
 static void reset_load_elf(void *opaque)
 {
     LoongArchCPU *cpu = opaque;
-    CPULoongArchState *env = &cpu->env;
 
     cpu_reset(CPU(cpu));
-    if (env->load_elf) {
-        if (cpu == LOONGARCH_CPU(first_cpu)) {
-            env->gpr[4] = env->boot_info->a0;
-            env->gpr[5] = env->boot_info->a1;
-            env->gpr[6] = env->boot_info->a2;
-        }
-        cpu_set_pc(CPU(cpu), env->elf_address);
-    }
 }
 
 static void fw_cfg_add_kernel_info(struct loongarch_boot_info *info,
@@ -415,8 +406,6 @@ static void loongarch_direct_kernel_boot(MachineState *ms,
 {
     void *p, *bp;
     int64_t kernel_addr = VIRT_FLASH0_BASE;
-    LoongArchCPU *lacpu;
-    CPUState *cs;
     uint64_t *data;
 
     if (info->kernel_filename) {
@@ -443,17 +432,6 @@ static void loongarch_direct_kernel_boot(MachineState *ms,
     *(data - 1) = cpu_to_le64(kernel_addr);
     rom_add_blob_fixed("boot_code", boot_code, VIRT_FLASH0_SIZE, VIRT_FLASH0_BASE);
 
-    CPU_FOREACH(cs) {
-        lacpu = LOONGARCH_CPU(cs);
-        lacpu->env.load_elf = true;
-        if (cs == first_cpu) {
-            lacpu->env.elf_address = kernel_addr;
-        } else {
-            lacpu->env.elf_address = VIRT_FLASH0_BASE;
-        }
-        lacpu->env.boot_info = info;
-    }
-
     g_free(boot_code);
     g_free(bp);
 }
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
index 7731f6acdc..c8b96f74dc 100644
--- a/target/loongarch/cpu.h
+++ b/target/loongarch/cpu.h
@@ -387,11 +387,7 @@ typedef struct CPUArchState {
 #endif
 
     AddressSpace *address_space_iocsr;
-    bool load_elf;
-    uint64_t elf_address;
     uint32_t mp_state;
-
-    struct loongarch_boot_info *boot_info;
 #endif
 } CPULoongArchState;
 
-- 
2.47.0

[PULL 3/3] hw/loongarch/virt: Register reset interface with cpu plug callback

[Song Gao]

From: Bibo Mao <maobibo@loongson.cn>

With cpu hotplug is implemented on LoongArch virt machine, reset
interface with hot-added CPU should be registered. Otherwise there
will be problem if system reboots after cpu is hot-added.

Now register reset interface with CPU plug callback, so that all
cold/hot added CPUs let their reset interface registered. And remove
reset interface with CPU unplug callback.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Tested-by: Song Gao <gaosong@loongson.cn>
Message-ID: <20250906070200.3749326-4-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 hw/loongarch/boot.c | 13 -------------
 hw/loongarch/virt.c |  2 ++
 2 files changed, 2 insertions(+), 13 deletions(-)

diff --git a/hw/loongarch/boot.c b/hw/loongarch/boot.c
index 5799b4c75c..a516415822 100644
--- a/hw/loongarch/boot.c
+++ b/hw/loongarch/boot.c
@@ -350,13 +350,6 @@ static int64_t load_kernel_info(struct loongarch_boot_info *info)
     return kernel_entry;
 }
 
-static void reset_load_elf(void *opaque)
-{
-    LoongArchCPU *cpu = opaque;
-
-    cpu_reset(CPU(cpu));
-}
-
 static void fw_cfg_add_kernel_info(struct loongarch_boot_info *info,
                                    FWCfgState *fw_cfg)
 {
@@ -439,12 +432,6 @@ static void loongarch_direct_kernel_boot(MachineState *ms,
 void loongarch_load_kernel(MachineState *ms, struct loongarch_boot_info *info)
 {
     LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(ms);
-    int i;
-
-    /* register reset function */
-    for (i = 0; i < ms->smp.cpus; i++) {
-        qemu_register_reset(reset_load_elf, LOONGARCH_CPU(qemu_get_cpu(i)));
-    }
 
     info->kernel_filename = ms->kernel_filename;
     info->kernel_cmdline = ms->kernel_cmdline;
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index 31215b7785..bd5cff1f1e 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -1014,6 +1014,7 @@ static void virt_cpu_unplug(HotplugHandler *hotplug_dev,
     /* Notify acpi ged CPU removed */
     hotplug_handler_unplug(HOTPLUG_HANDLER(lvms->acpi_ged), dev, &error_abort);
 
+    qemu_unregister_resettable(OBJECT(dev));
     cpu_slot = virt_find_cpu_slot(MACHINE(lvms), cpu->phy_id);
     cpu_slot->cpu = NULL;
 }
@@ -1038,6 +1039,7 @@ static void virt_cpu_plug(HotplugHandler *hotplug_dev,
                              &error_abort);
     }
 
+    qemu_register_resettable(OBJECT(dev));
     cpu_slot = virt_find_cpu_slot(MACHINE(lvms), cpu->phy_id);
     cpu_slot->cpu = CPU(dev);
 }
-- 
2.47.0

Re: [PULL 0/3] loongarch-to-apply queue

[Richard Henderson]

On 9/18/25 02:20, Song Gao wrote:
> The following changes since commit f0007b7f03e2d7fc33e71c3a582f2364c51a226b:
> 
>    Merge tag 'pull-target-arm-20250916' of https://gitlab.com/pm215/qemu into staging (2025-09-17 11:10:55 -0700)
> 
> are available in the Git repository at:
> 
>    https://github.com/gaosong715/qemu.git tags/pull-loongarch-20250918
> 
> for you to fetch changes up to cb5ee0017fc9909916383634a3f13eae05e6fe5c:
> 
>    hw/loongarch/virt: Register reset interface with cpu plug callback (2025-09-18 17:39:57 +0800)
> 
> ----------------------------------------------------------------
> pull-loongarch-20250918
> 
> ----------------------------------------------------------------
> Bibo Mao (3):
>        hw/loongarch/virt: Add BSP support with aux boot code
>        hw/loongarch/virt: Remove unnecessay pre-boot setting with BSP
>        hw/loongarch/virt: Register reset interface with cpu plug callback
> 
>   hw/loongarch/boot.c    | 71 ++++++++++++++++++++++++--------------------------
>   hw/loongarch/virt.c    |  2 ++
>   target/loongarch/cpu.h |  4 ---
>   3 files changed, 36 insertions(+), 41 deletions(-)
> 
> 


Applied, thanks.  Please update https://wiki.qemu.org/ChangeLog/10.2 as appropriate.

r~

[PULL 0/3] loongarch-to-apply queue

[Bibo Mao]

The following changes since commit 1dae461a913f9da88df05de6e2020d3134356f2e:

  Update version for v10.0.0-rc0 release (2025-03-18 10:18:14 -0400)

are available in the Git repository at:

  https://gitlab.com/bibo-mao/qemu.git tags/pull-loongarch-20250321

for you to fetch changes up to b8d5503a3ecf8bcf75e4960d04215f71dbfd5dd2:

  target/loongarch: fix bad shift in check_ps() (2025-03-21 11:31:56 +0800)

----------------------------------------------------------------
pull-loongarch-20250321 queue

----------------------------------------------------------------
Bibo Mao (1):
      docs/system: Add entry for LoongArch system

Song Gao (1):
      target/loongarch: fix bad shift in check_ps()

Yao Zi (1):
      host/include/loongarch64: Fix inline assembly compatibility with Clang

 docs/system/loongarch/virt.rst                     | 31 +++++++---------------
 docs/system/target-loongarch.rst                   | 19 +++++++++++++
 docs/system/targets.rst                            |  1 +
 host/include/loongarch64/host/atomic128-ldst.h.inc |  4 +--
 host/include/loongarch64/host/bufferiszero.c.inc   |  6 +++--
 .../loongarch64/host/load-extract-al16-al8.h.inc   |  2 +-
 target/loongarch/internals.h                       |  2 +-
 target/loongarch/tcg/csr_helper.c                  |  2 +-
 target/loongarch/tcg/tlb_helper.c                  | 10 +++----
 9 files changed, 44 insertions(+), 33 deletions(-)
 create mode 100644 docs/system/target-loongarch.rst

Re: [PULL 0/3] loongarch-to-apply queue

[Stefan Hajnoczi]

[-- Attachment #1: Type: text/plain, Size: 116 bytes --]

Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/10.0 for any user-visible changes.

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]

[PULL 0/3] loongarch-to-apply queue

[Song Gao]

The following changes since commit 23fa74974d8c96bc95cbecc0d4e2d90f984939f6:

  Merge tag 'pull-target-arm-20240718' of https://git.linaro.org/people/pmaydell/qemu-arm into staging (2024-07-19 07:02:17 +1000)

are available in the Git repository at:

  https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240719

for you to fetch changes up to 3ed016f525c8010e66be62d3ca6829eaa9b7cfb5:

  hw/loongarch: Modify flash block size to 256K (2024-07-19 10:40:04 +0800)

----------------------------------------------------------------
pull-loongarch-20240719

----------------------------------------------------------------
Song Gao (2):
      target/loongarch/gdbstub: Add vector registers support
      hw/loongarch: Remove unimplemented extioi INT_encode mode

Xianglai Li (1):
      hw/loongarch: Modify flash block size to 256K

 configs/targets/loongarch64-linux-user.mak |  2 +-
 configs/targets/loongarch64-softmmu.mak    |  2 +-
 gdb-xml/loongarch-lasx.xml                 | 60 ++++++++++++++++++++++++
 gdb-xml/loongarch-lsx.xml                  | 59 ++++++++++++++++++++++++
 include/hw/intc/loongarch_extioi.h         |  1 -
 include/hw/loongarch/virt.h                |  2 +-
 target/loongarch/gdbstub.c                 | 73 +++++++++++++++++++++++++++++-
 7 files changed, 193 insertions(+), 6 deletions(-)
 create mode 100644 gdb-xml/loongarch-lasx.xml
 create mode 100644 gdb-xml/loongarch-lsx.xml

Re: [PULL 0/3] loongarch-to-apply queue

[Richard Henderson]

On 7/19/24 12:26, Song Gao wrote:
>    Merge tag 'pull-target-arm-20240718' ofhttps://git.linaro.org/people/pmaydell/qemu-arm into staging (2024-07-19 07:02:17 +1000)
> 
> are available in the Git repository at:
> 
>    https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240719
> 
> for you to fetch changes up to 3ed016f525c8010e66be62d3ca6829eaa9b7cfb5:
> 
>    hw/loongarch: Modify flash block size to 256K (2024-07-19 10:40:04 +0800)
> 
> ----------------------------------------------------------------
> pull-loongarch-20240719

Applied, thanks.  Please update https://wiki.qemu.org/ChangeLog/9.1 as appropriate.

r~

[PULL 0/3] loongarch-to-apply queue

[Song Gao]

The following changes since commit 4e66a08546a2588a4667766a1edab9caccf24ce3:

  Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging (2024-05-07 09:26:30 -0700)

are available in the Git repository at:

  https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240509

for you to fetch changes up to 5872966db7abaa7f8753541b7a9f242df9752b50:

  target/loongarch: Put cpucfg operation before CSR register (2024-05-09 15:19:22 +0800)

----------------------------------------------------------------
pull-loongarch-20240509

----------------------------------------------------------------
Bibo Mao (3):
      hw/loongarch: Refine default numa id calculation
      target/loongarch: Add TCG macro in structure CPUArchState
      target/loongarch: Put cpucfg operation before CSR register

 hw/loongarch/virt.c           | 11 +++++------
 target/loongarch/cpu.c        |  7 +++++--
 target/loongarch/cpu.h        | 16 ++++++++++------
 target/loongarch/cpu_helper.c |  9 +++++++++
 target/loongarch/kvm/kvm.c    | 16 ++++++++--------
 target/loongarch/machine.c    | 30 +++++++++++++++++++++++++-----
 6 files changed, 62 insertions(+), 27 deletions(-)

Re: [PULL 0/3] loongarch-to-apply queue

[Richard Henderson]

On 5/9/24 10:06, Song Gao wrote:
> The following changes since commit 4e66a08546a2588a4667766a1edab9caccf24ce3:
> 
>    Merge tag 'for-upstream' ofhttps://gitlab.com/bonzini/qemu  into staging (2024-05-07 09:26:30 -0700)
> 
> are available in the Git repository at:
> 
>    https://gitlab.com/gaosong/qemu.git  tags/pull-loongarch-20240509
> 
> for you to fetch changes up to 5872966db7abaa7f8753541b7a9f242df9752b50:
> 
>    target/loongarch: Put cpucfg operation before CSR register (2024-05-09 15:19:22 +0800)
> 
> ----------------------------------------------------------------
> pull-loongarch-20240509

Applied, thanks.  Please update https://wiki.qemu.org/ChangeLog/9.1 as appropriate.


r~

[PULL 0/3] loongarch-to-apply queue

[Song Gao]

The following changes since commit d1852caab131ea898134fdcea8c14bc2ee75fbe9:

  Merge tag 'python-pull-request' of https://gitlab.com/jsnow/qemu into staging (2023-01-05 16:59:22 +0000)

are available in the Git repository at:

  https://gitlab.com/gaosong/qemu.git pull-loongarch-20230106

for you to fetch changes up to f4d10ce8aa545266a0b6df223a7f8ea2afca18b2:

  hw/intc/loongarch_pch: Change default irq number of pch irq controller (2023-01-06 14:12:43 +0800)

----------------------------------------------------------------

Add irq number property for loongarch pch interrupt controller

----------------------------------------------------------------
Tianrui Zhao (3):
      hw/intc/loongarch_pch_msi: add irq number property
      hw/intc/loongarch_pch_pic: add irq number property
      hw/intc/loongarch_pch: Change default irq number of pch irq controller

 hw/intc/loongarch_pch_msi.c         | 29 ++++++++++++++++++++++++++---
 hw/intc/loongarch_pch_pic.c         | 35 +++++++++++++++++++++++++++++++----
 hw/loongarch/virt.c                 | 19 ++++++++++++-------
 include/hw/intc/loongarch_pch_msi.h |  9 +++++----
 include/hw/intc/loongarch_pch_pic.h |  6 ++----
 include/hw/pci-host/ls7a.h          |  2 +-
 6 files changed, 77 insertions(+), 23 deletions(-)

Re: [PULL 0/3] loongarch-to-apply queue

[Peter Maydell]

On Fri, 6 Jan 2023 at 06:33, Song Gao <gaosong@loongson.cn> wrote:
>
> The following changes since commit d1852caab131ea898134fdcea8c14bc2ee75fbe9:
>
>   Merge tag 'python-pull-request' of https://gitlab.com/jsnow/qemu into staging (2023-01-05 16:59:22 +0000)
>
> are available in the Git repository at:
>
>   https://gitlab.com/gaosong/qemu.git pull-loongarch-20230106
>
> for you to fetch changes up to f4d10ce8aa545266a0b6df223a7f8ea2afca18b2:
>
>   hw/intc/loongarch_pch: Change default irq number of pch irq controller (2023-01-06 14:12:43 +0800)
>
> ----------------------------------------------------------------
>
> Add irq number property for loongarch pch interrupt controller
>
> ----------------------------------------------------------------


Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/8.0
for any user-visible changes.

-- PMM