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([2001:b07:6468:f312:b0e5:c632:a580:8b9a]) by smtp.gmail.com with ESMTPSA id y7sm3509416wrt.11.2020.06.30.05.33.43 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 30 Jun 2020 05:33:43 -0700 (PDT) Subject: Re: [PATCH v2 4/9] i386: hvf: Implement CPU kick To: Roman Bolshakov , qemu-devel@nongnu.org References: <20200630102824.77604-1-r.bolshakov@yadro.com> <20200630102824.77604-5-r.bolshakov@yadro.com> From: Paolo Bonzini Message-ID: Date: Tue, 30 Jun 2020 14:33:42 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.6.0 MIME-Version: 1.0 In-Reply-To: <20200630102824.77604-5-r.bolshakov@yadro.com> Content-Language: en-US Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=pbonzini@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=205.139.110.61; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/30 01:11:03 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -30 X-Spam_score: -3.1 X-Spam_bar: --- X-Spam_report: (-3.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , Claudio Fontana , Cameron Esfahani , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 30/06/20 12:28, Roman Bolshakov wrote: > @@ -966,6 +964,20 @@ int hvf_vcpu_exec(CPUState *cpu) > return ret; > } > > +void hvf_vcpu_kick(CPUState *cpu) > +{ > + X86CPU *x86_cpu = X86_CPU(cpu); > + CPUX86State *env = &x86_cpu->env; > + hv_return_t err; > + > + atomic_set(&env->hvf_deadline, 0); > + err = hv_vcpu_interrupt(&cpu->hvf_fd, 1); > + if (err) { > + fprintf(stderr, "qemu:%s error %#x\n", __func__, err); > + exit(1); > + } Can a signal interrupt hv_vcpu_run? If so you actually don't need hv_vcpu_interrupt at all. You can also require the preemption time, all processor that support HVF have it, but never set it by default. The deadline can be left at 0 all the time; instead, you toggle the bit in the pin-based controls. In the signal handler you do: if (atomic_xchg(&env->hvf_in_guest, false)) { wvmcs(cpu->hvf_fd, VMCS_PIN_BASED_CTLS, rvmcs(cpu->hvf_fd, VMCS_PIN_BASED_CTLS) | VMCS_PIN_BASED_CTLS_VMX_PREEMPT_TIMER); } In the main loop you do: atomic_set(&env->hvf_guest_mode, true); smp_mb(); hv_vcpu_run(...); atomic_set(&env->hvf_guest_mode, false); and in the preemption timer vmexit handler: wvmcs(cpu->hvf_fd, VMCS_PIN_BASED_CTLS, rvmcs(cpu->hvf_fd, VMCS_PIN_BASED_CTLS) & ~VMCS_PIN_BASED_CTLS_VMX_PREEMPT_TIMER); I'll leave out this patch in the meanwhile. Paolo > +} > + > bool hvf_allowed; > > static int hvf_accel_init(MachineState *ms) > diff --git a/target/i386/hvf/vmcs.h b/target/i386/hvf/vmcs.h > index 42de7ebc3a..6615365023 100644 > --- a/target/i386/hvf/vmcs.h > +++ b/target/i386/hvf/vmcs.h > @@ -349,6 +349,7 @@ > #define VMCS_PIN_BASED_CTLS_EXTINT (1 << 0) > #define VMCS_PIN_BASED_CTLS_NMI (1 << 3) > #define VMCS_PIN_BASED_CTLS_VNMI (1 << 5) > +#define VMCS_PIN_BASED_CTLS_VMX_PREEMPT_TIMER (1 << 6) > > #define VMCS_PRI_PROC_BASED_CTLS_INT_WINDOW_EXITING (1 << 2) > #define VMCS_PRI_PROC_BASED_CTLS_TSC_OFFSET (1 << 3) >