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From: Richard Henderson <richard.henderson@linaro.org>
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Date: Thu, 11 Jan 2018 06:37:50 -0800
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Subject: Re: [Qemu-devel] [PATCH v3 03/21] RISC-V CPU Core Definition
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To: Michael Clark <mjc@sifive.com>, qemu-devel@nongnu.org
Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>, Palmer Dabbelt <palmer@sifive.com>, Sagar Karandikar <sagark@eecs.berkeley.edu>, RISC-V Patches <patches@groups.riscv.org>

On 01/10/2018 06:21 PM, Michael Clark wrote:
> +static inline void cpu_get_tb_cpu_state(CPURISCVState *env, target_ulong *pc,
> +                                        target_ulong *cs_base, uint32_t *flags)
> +{
> +    *pc = env->pc;
> +    *cs_base = 0;
> +    *flags = 0; /* necessary to avoid compiler warning */
> +}

Actually, at minimum you have to put enough into flags to differentiate machine
vs supervisor vs user mode.  Otherwise you can wind up running a previously
translated block with the wrong permissions.

The patch I saw from Stefan O'Rear would do nicely.


r~