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[174.21.84.25]) by smtp.gmail.com with ESMTPSA id 125sm17027109pfu.7.2021.02.21.22.02.25 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 21 Feb 2021 22:02:26 -0800 (PST) Subject: Re: [RFC v1 24/38] target/arm: move aa64_va_parameter_tbi,tbid,tcma and arm_rebuild_hflags To: Claudio Fontana References: <20210221092449.7545-1-cfontana@suse.de> <20210221092449.7545-25-cfontana@suse.de> From: Richard Henderson Message-ID: Date: Sun, 21 Feb 2021 22:02:24 -0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20210221092449.7545-25-cfontana@suse.de> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::535; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x535.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 2/21/21 1:24 AM, Claudio Fontana wrote: > From: Claudio Fontana > > they are needed for KVM too, move them out of TCG helpers. > > Signed-off-by: Claudio Fontana > --- > target/arm/internals.h | 37 +++++ > target/arm/tcg/helper-tcg.h | 32 ----- > target/arm/cpu-common.c | 252 ++++++++++++++++++++++++++++++++++ > target/arm/tcg/helper.c | 264 +----------------------------------- > 4 files changed, 293 insertions(+), 292 deletions(-) > > diff --git a/target/arm/internals.h b/target/arm/internals.h > index 6589b63ebc..9eb5d7fd79 100644 > --- a/target/arm/internals.h > +++ b/target/arm/internals.h > @@ -1196,6 +1196,43 @@ static inline uint64_t useronly_maybe_clean_ptr(uint32_t desc, uint64_t ptr) > return ptr; > } > > +/* > + * Convert a possible stage1+2 MMU index into the appropriate > + * stage 1 MMU index > + */ > +static inline ARMMMUIdx stage_1_mmu_idx(ARMMMUIdx mmu_idx) > +{ > + switch (mmu_idx) { > + case ARMMMUIdx_SE10_0: > + return ARMMMUIdx_Stage1_SE0; > + case ARMMMUIdx_SE10_1: > + return ARMMMUIdx_Stage1_SE1; > + case ARMMMUIdx_SE10_1_PAN: > + return ARMMMUIdx_Stage1_SE1_PAN; > + case ARMMMUIdx_E10_0: > + return ARMMMUIdx_Stage1_E0; > + case ARMMMUIdx_E10_1: > + return ARMMMUIdx_Stage1_E1; > + case ARMMMUIdx_E10_1_PAN: > + return ARMMMUIdx_Stage1_E1_PAN; > + default: > + return mmu_idx; > + } > +} > + > +int aa64_va_parameter_tbi(uint64_t tcr, ARMMMUIdx mmu_idx); > +int aa64_va_parameter_tbid(uint64_t tcr, ARMMMUIdx mmu_idx); I can see these being needed for get-phys-addr -- and that probably answers my arm_mmu_idx_el question earlier too. > +uint32_t rebuild_hflags_a64(CPUARMState *env, int el, int fp_el, > + ARMMMUIdx mmu_idx); > +uint32_t rebuild_hflags_a32(CPUARMState *env, int fp_el, ARMMMUIdx mmu_idx); > +uint32_t rebuild_hflags_m32(CPUARMState *env, int fp_el, ARMMMUIdx mmu_idx); However these really really shouldn't be used for !tcg. I would even wrap CPUARMState::hflags in #ifdef CONFIG_TCG to enforce that. I think maybe the best option is if (tcg_enabled()) { rebuild_hflags(); } so that we don't spend the time on the rebuild for a regular build that has both tcg and kvm enabled, and the symbol gets compiled out when tcg is disabled. r~