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From: Paolo Bonzini <pbonzini@redhat.com>
To: Haozhong Zhang <haozhong.zhang@intel.com>, qemu-devel@nongnu.org
Cc: Richard Henderson <rth@twiddle.net>,
	Eduardo Habkost <ehabkost@redhat.com>,
	"Michael S . Tsirkin" <mst@redhat.com>,
	Marcelo Tosatti <mtosatti@redhat.com>,
	kvm@vger.kernel.org, Boris Petkov <bp@suse.de>,
	Tony Luck <tony.luck@intel.com>,
	Andi Kleen <andi.kleen@intel.com>,
	rkrcmar@redhat.com, Ashok Raj <ashok.raj@intel.com>,
	Laszlo Ersek <lersek@redhat.com>
Subject: Re: [Qemu-devel] [PATCH v4 3/3] i386: publish advised value of MSR_IA32_FEATURE_CONTROL via fw_cfg
Date: Thu, 16 Jun 2016 11:52:37 +0200	[thread overview]
Message-ID: <d7f0a64c-54aa-00ee-8ef5-663371019102@redhat.com> (raw)
In-Reply-To: <20160616060621.30422-4-haozhong.zhang@intel.com>



On 16/06/2016 08:06, Haozhong Zhang wrote:
> It's a prerequisite that certain bits of MSR_IA32_FEATURE_CONTROL should
> be set before some features (e.g. VMX and LMCE) can be used, which is
> usually done by the firmware. This patch adds a fw_cfg file
> "etc/msr_feature_control" which contains the advised value of
> MSR_IA32_FEATURE_CONTROL and can be used by guest firmware (e.g. SeaBIOS).
> 
> Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
> Signed-off-by: Haozhong Zhang <haozhong.zhang@intel.com>
> ---
>  hw/i386/pc.c      | 28 ++++++++++++++++++++++++++++
>  target-i386/cpu.h |  4 ++++
>  2 files changed, 32 insertions(+)
> 
> diff --git a/hw/i386/pc.c b/hw/i386/pc.c
> index 7198ed5..d8178a5 100644
> --- a/hw/i386/pc.c
> +++ b/hw/i386/pc.c
> @@ -1147,6 +1147,33 @@ void pc_cpus_init(PCMachineState *pcms)
>      smbios_set_cpuid(cpu->env.cpuid_version, cpu->env.features[FEAT_1_EDX]);
>  }
>  
> +static void pc_build_feature_control_file(PCMachineState *pcms)
> +{
> +    X86CPU *cpu = X86_CPU(pcms->possible_cpus->cpus[0].cpu);
> +    CPUX86State *env = &cpu->env;
> +    uint32_t unused, ecx, edx, feature_control_bits = 0;
> +    uint32_t *val;
> +
> +    cpu_x86_cpuid(env, 1, 0, &unused, &unused, &ecx, &edx);
> +    if (ecx & CPUID_EXT_VMX) {
> +        feature_control_bits |= FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX;
> +    }
> +
> +    if ((edx & (CPUID_EXT2_MCE | CPUID_EXT2_MCA)) ==
> +        (CPUID_EXT2_MCE | CPUID_EXT2_MCA) &&
> +        (env->mcg_cap & MCG_LMCE_P)) {
> +        feature_control_bits |= FEATURE_CONTROL_LMCE;
> +    }
> +
> +    if (!feature_control_bits) {
> +        return;
> +    }
> +
> +    val = g_malloc(sizeof(*val));
> +    *val = feature_control_bits | FEATURE_CONTROL_LOCKED;
> +    fw_cfg_add_file(pcms->fw_cfg, "etc/msr_feature_control", val, sizeof(*val));
> +}
> +
>  static
>  void pc_machine_done(Notifier *notifier, void *data)
>  {
> @@ -1174,6 +1201,7 @@ void pc_machine_done(Notifier *notifier, void *data)
>      acpi_setup();
>      if (pcms->fw_cfg) {
>          pc_build_smbios(pcms->fw_cfg);
> +        pc_build_feature_control_file(pcms);
>      }
>  }
>  
> diff --git a/target-i386/cpu.h b/target-i386/cpu.h
> index f0cb04f..5e07c7a 100644
> --- a/target-i386/cpu.h
> +++ b/target-i386/cpu.h
> @@ -332,6 +332,10 @@
>  #define MSR_TSC_ADJUST                  0x0000003b
>  #define MSR_IA32_TSCDEADLINE            0x6e0
>  
> +#define FEATURE_CONTROL_LOCKED                    (1<<0)
> +#define FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX (1<<2)
> +#define FEATURE_CONTROL_LMCE                      (1<<20)
> +
>  #define MSR_P6_PERFCTR0                 0xc1
>  
>  #define MSR_IA32_SMBASE                 0x9e
> 

Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>

Have you prepared a patch for SeaBIOS already?

Thanks,

Paolo

  reply	other threads:[~2016-06-16  9:52 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-16  6:06 [Qemu-devel] [PATCH v4 0/3] Add QEMU support for Intel local MCE Haozhong Zhang
2016-06-16  6:06 ` [Qemu-devel] [PATCH v4 1/3] target-i386: KVM: add basic Intel LMCE support Haozhong Zhang
2016-06-16  9:50   ` Paolo Bonzini
2016-06-16 10:16     ` Haozhong Zhang
2016-06-16 10:23       ` Paolo Bonzini
2016-06-16 10:34         ` Haozhong Zhang
2016-06-16 10:42           ` Paolo Bonzini
2016-06-16 18:05             ` Eduardo Habkost
2016-06-16 18:17               ` Paolo Bonzini
2016-06-16 19:37   ` Eduardo Habkost
2016-06-17  1:26     ` Haozhong Zhang
2016-06-17 16:20       ` Eduardo Habkost
2016-06-20  2:04         ` Haozhong Zhang
2016-06-16  6:06 ` [Qemu-devel] [PATCH v4 2/3] target-i386: add migration support for Intel LMCE Haozhong Zhang
2016-06-16  9:51   ` Paolo Bonzini
2016-06-16 10:29     ` Haozhong Zhang
2016-06-16 10:41       ` Paolo Bonzini
2016-06-16 10:55         ` Haozhong Zhang
2016-06-16 17:36           ` Eduardo Habkost
2016-06-16 17:40             ` Paolo Bonzini
2016-06-16 17:58               ` Eduardo Habkost
2016-06-17  2:01                 ` Haozhong Zhang
2016-06-17 17:20                   ` Eduardo Habkost
2016-06-17 17:26                     ` Paolo Bonzini
2016-06-20  2:11                     ` Haozhong Zhang
2016-06-20  6:58                       ` Paolo Bonzini
2016-06-20  7:26                         ` Haozhong Zhang
2016-06-16 19:53               ` Eduardo Habkost
2016-06-16  6:06 ` [Qemu-devel] [PATCH v4 3/3] i386: publish advised value of MSR_IA32_FEATURE_CONTROL via fw_cfg Haozhong Zhang
2016-06-16  9:52   ` Paolo Bonzini [this message]
2016-06-16 11:19     ` Haozhong Zhang
2016-06-17 17:31       ` Laszlo Ersek
2016-06-17 20:21         ` Raj, Ashok
2016-06-17 20:48           ` Laszlo Ersek
2016-06-17 20:55             ` Raj, Ashok
2016-06-17 21:30               ` Laszlo Ersek
2016-06-20  3:09           ` Haozhong Zhang
2016-06-20  6:56             ` Paolo Bonzini
2016-06-20  7:20               ` Haozhong Zhang
2016-06-22 10:18         ` Haozhong Zhang
2016-06-22 15:51           ` Laszlo Ersek

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