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From: Helge Deller <deller@gmx.de>
To: Richard Henderson <richard.henderson@linaro.org>, qemu-devel@nongnu.org
Cc: svens@stackframe.org
Subject: Re: [PATCH v2 7/7] target/hppa: Fix EIRR, EIEM versus icount
Date: Sat, 23 Mar 2024 22:00:25 +0100	[thread overview]
Message-ID: <d819d5cb-8e9c-4b9f-a6b4-c7f2bd6ca680@gmx.de> (raw)
In-Reply-To: <20240323172954.1041480-8-richard.henderson@linaro.org>

On 3/23/24 18:29, Richard Henderson wrote:
> Call translator_io_start before write to EIRR.
> Move evaluation of EIRR vs EIEM to hppa_cpu_exec_interrupt.
> Exit TB after write to EIEM, but otherwise use a straight store.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

Reviewed-by: Helge Deller <deller@gmx.de>
Tested-by: Helge Deller <deller@gmx.de>

Thanks!
Helge


> ---
>   target/hppa/helper.h     |  1 -
>   target/hppa/int_helper.c | 14 ++++----------
>   target/hppa/translate.c  | 10 +++++++---
>   3 files changed, 11 insertions(+), 14 deletions(-)
>
> diff --git a/target/hppa/helper.h b/target/hppa/helper.h
> index 1bdbcd8f98..8fd7ba65d8 100644
> --- a/target/hppa/helper.h
> +++ b/target/hppa/helper.h
> @@ -91,7 +91,6 @@ DEF_HELPER_1(rfi, void, env)
>   DEF_HELPER_1(rfi_r, void, env)
>   DEF_HELPER_FLAGS_2(write_interval_timer, TCG_CALL_NO_RWG, void, env, tl)
>   DEF_HELPER_FLAGS_2(write_eirr, TCG_CALL_NO_RWG, void, env, tl)
> -DEF_HELPER_FLAGS_2(write_eiem, TCG_CALL_NO_RWG, void, env, tl)
>   DEF_HELPER_FLAGS_2(swap_system_mask, TCG_CALL_NO_RWG, tl, env, tl)
>   DEF_HELPER_FLAGS_3(itlba_pa11, TCG_CALL_NO_RWG, void, env, tl, tl)
>   DEF_HELPER_FLAGS_3(itlbp_pa11, TCG_CALL_NO_RWG, void, env, tl, tl)
> diff --git a/target/hppa/int_helper.c b/target/hppa/int_helper.c
> index efe638b36e..90437a92cd 100644
> --- a/target/hppa/int_helper.c
> +++ b/target/hppa/int_helper.c
> @@ -28,7 +28,7 @@
>   static void eval_interrupt(HPPACPU *cpu)
>   {
>       CPUState *cs = CPU(cpu);
> -    if (cpu->env.cr[CR_EIRR] & cpu->env.cr[CR_EIEM]) {
> +    if (cpu->env.cr[CR_EIRR]) {
>           cpu_interrupt(cs, CPU_INTERRUPT_HARD);
>       } else {
>           cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
> @@ -89,14 +89,6 @@ void HELPER(write_eirr)(CPUHPPAState *env, target_ulong val)
>       bql_unlock();
>   }
>
> -void HELPER(write_eiem)(CPUHPPAState *env, target_ulong val)
> -{
> -    env->cr[CR_EIEM] = val;
> -    bql_lock();
> -    eval_interrupt(env_archcpu(env));
> -    bql_unlock();
> -}
> -
>   void hppa_cpu_do_interrupt(CPUState *cs)
>   {
>       HPPACPU *cpu = HPPA_CPU(cs);
> @@ -280,7 +272,9 @@ bool hppa_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
>       }
>
>       /* If interrupts are requested and enabled, raise them.  */
> -    if ((env->psw & PSW_I) && (interrupt_request & CPU_INTERRUPT_HARD)) {
> +    if ((interrupt_request & CPU_INTERRUPT_HARD)
> +        && (env->psw & PSW_I)
> +        && (env->cr[CR_EIRR] & env->cr[CR_EIEM])) {
>           cs->exception_index = EXCP_EXT_INTERRUPT;
>           hppa_cpu_do_interrupt(cs);
>           return true;
> diff --git a/target/hppa/translate.c b/target/hppa/translate.c
> index 5b8c1b06c3..46b2d6508d 100644
> --- a/target/hppa/translate.c
> +++ b/target/hppa/translate.c
> @@ -2166,10 +2166,10 @@ static bool trans_mtctl(DisasContext *ctx, arg_mtctl *a)
>           gen_helper_write_interval_timer(tcg_env, reg);
>           break;
>       case CR_EIRR:
> +        /* Helper modifies interrupt lines and is therefore IO. */
> +        translator_io_start(&ctx->base);
>           gen_helper_write_eirr(tcg_env, reg);
> -        break;
> -    case CR_EIEM:
> -        gen_helper_write_eiem(tcg_env, reg);
> +        /* Exit to re-evaluate interrupts in the main loop. */
>           ctx->base.is_jmp = DISAS_IAQ_N_STALE_EXIT;
>           break;
>
> @@ -2195,6 +2195,10 @@ static bool trans_mtctl(DisasContext *ctx, arg_mtctl *a)
>   #endif
>           break;
>
> +    case CR_EIEM:
> +        /* Exit to re-evaluate interrupts in the main loop. */
> +        ctx->base.is_jmp = DISAS_IAQ_N_STALE_EXIT;
> +        /* FALLTHRU */
>       default:
>           tcg_gen_st_i64(reg, tcg_env, offsetof(CPUHPPAState, cr[ctl]));
>           break;



      reply	other threads:[~2024-03-23 21:01 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-23 17:29 [PATCH for-9.0 v2 0/7] target/hppa: more small fixes Richard Henderson
2024-03-23 17:29 ` [PATCH v2 1/7] target/hppa: Fix BE,L set of sr0 Richard Henderson
2024-03-23 20:53   ` Helge Deller
2024-03-23 17:29 ` [PATCH v2 2/7] target/hppa: Fix B,GATE for wide mode Richard Henderson
2024-03-23 17:29 ` [PATCH v2 3/7] target/hppa: Handle unit conditions " Richard Henderson
2024-03-23 17:29 ` [PATCH v2 4/7] target/hppa: Fix ADD/SUB trap on overflow for narrow mode Richard Henderson
2024-03-23 17:29 ` [PATCH v2 5/7] target/hppa: Mark interval timer write as io Richard Henderson
2024-03-23 20:58   ` Helge Deller
2024-03-23 17:29 ` [PATCH v2 6/7] target/hppa: Tidy read of interval timer Richard Henderson
2024-03-23 20:58   ` Helge Deller
2024-03-23 17:29 ` [PATCH v2 7/7] target/hppa: Fix EIRR, EIEM versus icount Richard Henderson
2024-03-23 21:00   ` Helge Deller [this message]

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