From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:38462) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SR0Q4-0006M8-A0 for qemu-devel@nongnu.org; Sun, 06 May 2012 08:18:33 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SR0Q1-00083e-II for qemu-devel@nongnu.org; Sun, 06 May 2012 08:18:31 -0400 Received: from router-304.cs.umd.edu ([128.8.127.145]:4106 helo=bakedbeans.cs.umd.edu) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SR0Q1-0007vf-EU for qemu-devel@nongnu.org; Sun, 06 May 2012 08:18:29 -0400 Received: from newman.cs.umd.edu (newman.cs.umd.edu [172.24.0.4]) by bakedbeans.cs.umd.edu (Postfix) with ESMTPS id D068914089B for ; Sun, 6 May 2012 08:18:25 -0400 (EDT) Received: from webmail.cs.umd.edu (localhost [127.0.0.1]) by newman.cs.umd.edu (8.13.1/8.14.1) with ESMTP id q46CIAC6010067 for ; Sun, 6 May 2012 08:18:10 -0400 Message-ID: Date: Sun, 6 May 2012 08:18:10 -0400 From: jims@cs.umd.edu MIME-Version: 1.0 Content-Type: text/plain;charset=iso-8859-1 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] DMA Pointer for SSD Simulation List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org I am working on an SSD simulation to plug into the MARSSx86 simulation environment (http://marss86.org/~marss86/index.php/Home). MARSSx86 uses QEMU as an emulation for an x86_64 system and PTLSim for timing the pipeline. My lab has further extended this system to use our DRAMSim2 simulator to simulate the main memory (https://wiki.umd.edu/DRAMSim2/index.php?title=3DMain_Page). I have integrated our SSD simulator into marss. The SSD simulator models the host interface and the SSD internals. This works by delaying the IRQ for the IDE (in qemu/hw/ide/core.c:ide_dma_cb()) based on the operation o= f the SSD model. I now want to capture the timing of the DMA for the SSD as it would happen in a real system. To do this, I'd like to send read transactions to DRAMSim2 before a write operation to the SSD and write transactions to DRAMSim2 after a read operation to the SSD. The reason I'= m emailing is that I've made a few assumptions about how the IDE code in QEMU works and I'd like to confirm that I'm doing things correctly. One problem I'm having is that I cannot figure out what the actual pointe= r is for the DMA operation in the guest physical memory. I have printed out the s->sg.sg->base and s->sg.sg->len in ide_dma_cb(), but it seems to be garbage a lot of the time. I'm getting base=3D0 or base as something very large and out of my memory bounds (e.g. 139880767148024). Sometimes it does seem to be a valid location in memory though. Why is this sometimes seemingly invalid? Or am I using the wrong variable to the DMA pointer into the guest physical memory? Also, the s->sg.sg->len is often not matching the io_buffer_size. I'm not 100% sure if it should, but since I'm using io_buffer_size to determine the number of transactions to send to DRAMSim2 per IRQ (with io_buffer_size / 64) and the number of sectors to write to the disk per IRQ, I'd like to know if I'm doing things correctly or not. Lastly, I'm using the sector_num (multiplied by 512 to get a byte address= ) in ide_dma_cb() as the base address to the SSD. Is this correct? If you'd like to review the code, it is available on Github (https://github.com/jimstevens2001/marss.dramsim/tree/ssdsim). The disk access/DMA information is extracted from qemu/hw/ide/core.c and the interaction with our SSD model is implemented in ptlsim/sim/ptlsim.cpp. Thanks, Jim Stevens University of Maryland, College Park