From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45832) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bQ7gO-0000HU-0S for qemu-devel@nongnu.org; Thu, 21 Jul 2016 02:42:09 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bQ7gK-0004FJ-2u for qemu-devel@nongnu.org; Thu, 21 Jul 2016 02:42:07 -0400 Sender: Richard Henderson References: <1468861517-2508-1-git-send-email-nikunj@linux.vnet.ibm.com> <1468861517-2508-10-git-send-email-nikunj@linux.vnet.ibm.com> From: Richard Henderson Message-ID: Date: Thu, 21 Jul 2016 12:11:56 +0530 MIME-Version: 1.0 In-Reply-To: <1468861517-2508-10-git-send-email-nikunj@linux.vnet.ibm.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [RFC v1 09/13] target-ppc: add cmpeqb instruction List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Nikunj A Dadhania , qemu-ppc@nongnu.org, david@gibson.dropbear.id.au Cc: Sandipan Das , Swapnil Bokade , qemu-devel@nongnu.org, aneesh.kumar@linux.vnet.ibm.com On 07/18/2016 10:35 PM, Nikunj A Dadhania wrote: > + tcg_gen_andi_tl(src1, cpu_gpr[rA(ctx->opcode)], 0xFF); > + for (i = 0; i < 64; i += 8) { > + tcg_gen_shri_tl(t0, arg1, i); > + tcg_gen_andi_tl(t0, t0, 0xFF); > + tcg_gen_brcond_tl(TCG_COND_EQ, src1, t0, l1); > + } > + tcg_gen_movi_i32(cpu_crf[crfD(ctx->opcode)], 0); > + tcg_gen_br(l2); > + gen_set_label(l1); > + /* Set match bit, i.e. CRF_GT */ > + tcg_gen_movi_i32(cpu_crf[crfD(ctx->opcode)], 1 << CRF_GT); Ew. This can be done much better as http://graphics.stanford.edu/~seander/bithacks.html#ZeroInWord Which still might be best done in a helper, because of the constants involved (tcg is not nearly so good as gcc in building full 64-bit constants). C.f. target-alpha/int_helper.c, helper_cmpbe0 (which computes different information than cmpeqb, but is still helpful as an example). r~