* [PULL 00/23] Misc single binary patches for 2025-10-29
@ 2025-10-29 21:39 Philippe Mathieu-Daudé
2025-10-29 21:39 ` [PULL 01/23] hw/arm: Register TYPE_TARGET_ARM/AARCH64_MACHINE QOM interfaces Philippe Mathieu-Daudé
` (23 more replies)
0 siblings, 24 replies; 26+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-10-29 21:39 UTC (permalink / raw)
To: qemu-devel; +Cc: qemu-arm
The following changes since commit e090e0312dc9030d94e38e3d98a88718d3561e4e:
Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into staging (2025-10-29 10:44:15 +0100)
are available in the Git repository at:
https://github.com/philmd/qemu.git tags/single-binary-20251029
for you to fetch changes up to e5c542fa16b0a7d47070692481db301736a0ac7b:
hw/riscv: Replace target_ulong uses (2025-10-29 19:16:24 +0100)
----------------------------------------------------------------
Various patches related to single binary work:
- Make hw/arm/ common by adding a QOM type to machines to
tag in which binary (32 or 64-bit) they can be used.
Convert the Virt and SBSA-Ref machines.
- Build Xen files once
----------------------------------------------------------------
Anton Johansson (1):
hw/riscv: Replace target_ulong uses
Philippe Mathieu-Daudé (22):
hw/arm: Register TYPE_TARGET_ARM/AARCH64_MACHINE QOM interfaces
hw/core: Allow ARM/Aarch64 binaries to use the 'none' machine
hw/arm: Add DEFINE_MACHINE_ARM() / DEFINE_MACHINE_AARCH64() macros
hw/arm: Filter machine types for qemu-system-arm/aarch64 binaries
meson: Prepare to accept per-binary TargetInfo structure
implementation
config/target: Implement per-binary TargetInfo structure (ARM,
AARCH64)
hw/arm/virt: Register valid CPU types dynamically
hw/arm/virt: Check accelerator availability at runtime
qemu/target_info: Add target_arm() helper
qemu/target_info: Add target_aarch64() helper
qemu/target_info: Add target_base_arm() helper
hw/arm/virt: Replace TARGET_AARCH64 -> target_aarch64()
hw/arm/virt: Get default CPU type at runtime
hw/arm/sbsa-ref: Include missing 'cpu.h' header
hw/arm/sbsa-ref: Build only once
hw/arm/virt-acpi-build: Include missing 'cpu.h' header
hw/arm/virt-acpi-build: Build only once
hw/arm/virt: Build only once
hw/arm/meson: Move Xen files to arm_common_ss[]
hw/xen: Use BITS_PER_BYTE & MAKE_64BIT_MASK() in req_size_bits()
hw/xen: Replace target_ulong by agnostic target_long_bits()
hw/xen: Build only once
MAINTAINERS | 1 +
meson.build | 10 ++++-
include/hw/arm/machines-qom.h | 46 +++++++++++++++++++
include/qemu/target-info.h | 21 +++++++++
configs/targets/aarch64-softmmu.c | 26 +++++++++++
configs/targets/arm-softmmu.c | 26 +++++++++++
hw/arm/aspeed.c | 27 ++++++++++-
hw/arm/aspeed_ast27x0-fc.c | 2 +
hw/arm/b-l475e-iot01a.c | 2 +
hw/arm/bananapi_m2u.c | 3 +-
hw/arm/collie.c | 2 +
hw/arm/cubieboard.c | 3 +-
hw/arm/digic_boards.c | 3 +-
hw/arm/exynos4_boards.c | 3 ++
hw/arm/fby35.c | 2 +
hw/arm/highbank.c | 3 ++
hw/arm/imx25_pdk.c | 3 +-
hw/arm/imx8mp-evk.c | 4 +-
hw/arm/integratorcp.c | 3 +-
hw/arm/kzm.c | 3 +-
hw/arm/mcimx6ul-evk.c | 4 +-
hw/arm/mcimx7d-sabre.c | 4 +-
hw/arm/microbit.c | 2 +
hw/arm/mps2-tz.c | 5 +++
hw/arm/mps2.c | 5 +++
hw/arm/mps3r.c | 2 +
hw/arm/msf2-som.c | 3 +-
hw/arm/musca.c | 3 ++
hw/arm/musicpal.c | 3 +-
hw/arm/netduino2.c | 3 +-
hw/arm/netduinoplus2.c | 3 +-
hw/arm/npcm7xx_boards.c | 6 +++
hw/arm/npcm8xx_boards.c | 2 +
hw/arm/olimex-stm32-h405.c | 3 +-
hw/arm/omap_sx1.c | 3 ++
hw/arm/orangepi.c | 3 +-
hw/arm/raspi.c | 6 +++
hw/arm/raspi4b.c | 2 +
hw/arm/realview.c | 5 +++
hw/arm/sabrelite.c | 3 +-
hw/arm/sbsa-ref.c | 3 ++
hw/arm/stellaris.c | 3 ++
hw/arm/stm32vldiscovery.c | 3 +-
hw/arm/versatilepb.c | 3 ++
hw/arm/vexpress.c | 3 ++
hw/arm/virt-acpi-build.c | 1 +
hw/arm/virt.c | 74 ++++++++++++++++++-------------
hw/arm/xilinx_zynq.c | 2 +
hw/arm/xlnx-versal-virt.c | 3 ++
hw/arm/xlnx-zcu102.c | 2 +
hw/core/null-machine.c | 6 ++-
hw/riscv/riscv-iommu.c | 6 ++-
hw/riscv/riscv_hart.c | 2 +-
hw/xen/xen-hvm-common.c | 9 ++--
target-info-qom.c | 24 ++++++++++
target-info.c | 21 +++++++++
target/arm/machine.c | 18 ++++++++
configs/targets/meson.build | 5 +++
hw/arm/meson.build | 8 ++--
hw/xen/meson.build | 22 ++++-----
60 files changed, 406 insertions(+), 75 deletions(-)
create mode 100644 include/hw/arm/machines-qom.h
create mode 100644 configs/targets/aarch64-softmmu.c
create mode 100644 configs/targets/arm-softmmu.c
create mode 100644 target-info-qom.c
create mode 100644 configs/targets/meson.build
--
2.51.0
^ permalink raw reply [flat|nested] 26+ messages in thread* [PULL 01/23] hw/arm: Register TYPE_TARGET_ARM/AARCH64_MACHINE QOM interfaces 2025-10-29 21:39 [PULL 00/23] Misc single binary patches for 2025-10-29 Philippe Mathieu-Daudé @ 2025-10-29 21:39 ` Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 02/23] hw/core: Allow ARM/Aarch64 binaries to use the 'none' machine Philippe Mathieu-Daudé ` (22 subsequent siblings) 23 siblings, 0 replies; 26+ messages in thread From: Philippe Mathieu-Daudé @ 2025-10-29 21:39 UTC (permalink / raw) To: qemu-devel; +Cc: qemu-arm Define the TYPE_TARGET_ARM_MACHINE and TYPE_TARGET_AARCH64_MACHINE QOM interface names to allow machines to implement them. Register these interfaces in common code in target_info-qom.c used by all binaries because QOM interfaces must be registered before being checked (see next commit with the 'none' machine). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20251021205741.57109-2-philmd@linaro.org> --- meson.build | 1 + include/hw/arm/machines-qom.h | 18 ++++++++++++++++++ target-info-qom.c | 24 ++++++++++++++++++++++++ 3 files changed, 43 insertions(+) create mode 100644 include/hw/arm/machines-qom.h create mode 100644 target-info-qom.c diff --git a/meson.build b/meson.build index 8ad37c992b1..de95da32699 100644 --- a/meson.build +++ b/meson.build @@ -3911,6 +3911,7 @@ common_ss.add(pagevary) specific_ss.add(files('page-vary-target.c')) common_ss.add(files('target-info.c')) +system_ss.add(files('target-info-qom.c')) specific_ss.add(files('target-info-stub.c')) subdir('backends') diff --git a/include/hw/arm/machines-qom.h b/include/hw/arm/machines-qom.h new file mode 100644 index 00000000000..a17225f5f92 --- /dev/null +++ b/include/hw/arm/machines-qom.h @@ -0,0 +1,18 @@ +/* + * QOM type definitions for ARM / Aarch64 machines + * + * Copyright (c) Linaro + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#ifndef HW_ARM_MACHINES_QOM_H +#define HW_ARM_MACHINES_QOM_H + +#define TYPE_TARGET_ARM_MACHINE \ + "target-info-arm-machine" + +#define TYPE_TARGET_AARCH64_MACHINE \ + "target-info-aarch64-machine" + +#endif diff --git a/target-info-qom.c b/target-info-qom.c new file mode 100644 index 00000000000..7fd58d24818 --- /dev/null +++ b/target-info-qom.c @@ -0,0 +1,24 @@ +/* + * QEMU binary/target API (QOM types) + * + * Copyright (c) Linaro + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qom/object.h" +#include "hw/arm/machines-qom.h" + +static const TypeInfo target_info_types[] = { + { + .name = TYPE_TARGET_ARM_MACHINE, + .parent = TYPE_INTERFACE, + }, + { + .name = TYPE_TARGET_AARCH64_MACHINE, + .parent = TYPE_INTERFACE, + }, +}; + +DEFINE_TYPES(target_info_types) -- 2.51.0 ^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PULL 02/23] hw/core: Allow ARM/Aarch64 binaries to use the 'none' machine 2025-10-29 21:39 [PULL 00/23] Misc single binary patches for 2025-10-29 Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 01/23] hw/arm: Register TYPE_TARGET_ARM/AARCH64_MACHINE QOM interfaces Philippe Mathieu-Daudé @ 2025-10-29 21:39 ` Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 03/23] hw/arm: Add DEFINE_MACHINE_ARM() / DEFINE_MACHINE_AARCH64() macros Philippe Mathieu-Daudé ` (21 subsequent siblings) 23 siblings, 0 replies; 26+ messages in thread From: Philippe Mathieu-Daudé @ 2025-10-29 21:39 UTC (permalink / raw) To: qemu-devel; +Cc: qemu-arm When we'll start to use target_machine_typename() to filter machines for the ARM/Aarch64 binaries, the 'none' machine would be filtered. Register the proper interfaces to keep it available. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Acked-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20251021205741.57109-3-philmd@linaro.org> --- hw/core/null-machine.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/hw/core/null-machine.c b/hw/core/null-machine.c index a6e477a2d88..67b769bd3e0 100644 --- a/hw/core/null-machine.c +++ b/hw/core/null-machine.c @@ -16,6 +16,7 @@ #include "hw/boards.h" #include "system/address-spaces.h" #include "hw/core/cpu.h" +#include "hw/arm/machines-qom.h" static void machine_none_init(MachineState *mch) { @@ -55,4 +56,7 @@ static void machine_none_machine_init(MachineClass *mc) mc->no_cdrom = 1; } -DEFINE_MACHINE("none", machine_none_machine_init) +DEFINE_MACHINE_WITH_INTERFACES("none", machine_none_machine_init, + { TYPE_TARGET_AARCH64_MACHINE }, + { TYPE_TARGET_ARM_MACHINE }, + { }) -- 2.51.0 ^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PULL 03/23] hw/arm: Add DEFINE_MACHINE_ARM() / DEFINE_MACHINE_AARCH64() macros 2025-10-29 21:39 [PULL 00/23] Misc single binary patches for 2025-10-29 Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 01/23] hw/arm: Register TYPE_TARGET_ARM/AARCH64_MACHINE QOM interfaces Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 02/23] hw/core: Allow ARM/Aarch64 binaries to use the 'none' machine Philippe Mathieu-Daudé @ 2025-10-29 21:39 ` Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 04/23] hw/arm: Filter machine types for qemu-system-arm/aarch64 binaries Philippe Mathieu-Daudé ` (20 subsequent siblings) 23 siblings, 0 replies; 26+ messages in thread From: Philippe Mathieu-Daudé @ 2025-10-29 21:39 UTC (permalink / raw) To: qemu-devel; +Cc: qemu-arm A machine defined with the DEFINE_MACHINE_ARM() macro will be available in both qemu-system-arm and qemu-system-aarch64 binaries. One defined with DEFINE_MACHINE_AARCH64() will only be available in the qemu-system-aarch64 binary. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Acked-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20251021205741.57109-4-philmd@linaro.org> --- include/hw/arm/machines-qom.h | 28 ++++++++++++++++++++++++++++ target/arm/machine.c | 18 ++++++++++++++++++ 2 files changed, 46 insertions(+) diff --git a/include/hw/arm/machines-qom.h b/include/hw/arm/machines-qom.h index a17225f5f92..3f64d5eb024 100644 --- a/include/hw/arm/machines-qom.h +++ b/include/hw/arm/machines-qom.h @@ -9,10 +9,38 @@ #ifndef HW_ARM_MACHINES_QOM_H #define HW_ARM_MACHINES_QOM_H +#include "hw/boards.h" + #define TYPE_TARGET_ARM_MACHINE \ "target-info-arm-machine" #define TYPE_TARGET_AARCH64_MACHINE \ "target-info-aarch64-machine" +/* + * A machine filtered with arm_machine_interfaces[] or + * arm_aarch64_machine_interfaces[] will be available + * in both qemu-system-arm and qemu-system-aarch64 binaries. + * + * One filtered with aarch64_machine_interfaces[] will only + * be available in the qemu-system-aarch64 binary. + */ +extern const InterfaceInfo arm_machine_interfaces[]; +extern const InterfaceInfo arm_aarch64_machine_interfaces[]; +extern const InterfaceInfo aarch64_machine_interfaces[]; + +/* + * A machine defined with the DEFINE_MACHINE_ARM() macro will be + * available in both qemu-system-arm and qemu-system-aarch64 binaries. + * + * One defined with DEFINE_MACHINE_AARCH64() will only be available in + * the qemu-system-aarch64 binary. + */ +#define DEFINE_MACHINE_ARM(namestr, machine_initfn) \ + DEFINE_MACHINE_WITH_INTERFACE_ARRAY(namestr, machine_initfn, \ + arm_machine_interfaces) +#define DEFINE_MACHINE_AARCH64(namestr, machine_initfn) \ + DEFINE_MACHINE_WITH_INTERFACE_ARRAY(namestr, machine_initfn, \ + aarch64_machine_interfaces) + #endif diff --git a/target/arm/machine.c b/target/arm/machine.c index 44a0cf844b0..0befdb0b28a 100644 --- a/target/arm/machine.c +++ b/target/arm/machine.c @@ -9,6 +9,7 @@ #include "migration/qemu-file-types.h" #include "migration/vmstate.h" #include "target/arm/gtimer.h" +#include "hw/arm/machines-qom.h" static bool vfp_needed(void *opaque) { @@ -1212,3 +1213,20 @@ const VMStateDescription vmstate_arm_cpu = { NULL } }; + +const InterfaceInfo arm_machine_interfaces[] = { + { TYPE_TARGET_ARM_MACHINE }, + { TYPE_TARGET_AARCH64_MACHINE }, + { } +}; + +const InterfaceInfo arm_aarch64_machine_interfaces[] = { + { TYPE_TARGET_ARM_MACHINE }, + { TYPE_TARGET_AARCH64_MACHINE }, + { } +}; + +const InterfaceInfo aarch64_machine_interfaces[] = { + { TYPE_TARGET_AARCH64_MACHINE }, + { } +}; -- 2.51.0 ^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PULL 04/23] hw/arm: Filter machine types for qemu-system-arm/aarch64 binaries 2025-10-29 21:39 [PULL 00/23] Misc single binary patches for 2025-10-29 Philippe Mathieu-Daudé ` (2 preceding siblings ...) 2025-10-29 21:39 ` [PULL 03/23] hw/arm: Add DEFINE_MACHINE_ARM() / DEFINE_MACHINE_AARCH64() macros Philippe Mathieu-Daudé @ 2025-10-29 21:39 ` Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 05/23] meson: Prepare to accept per-binary TargetInfo structure implementation Philippe Mathieu-Daudé ` (19 subsequent siblings) 23 siblings, 0 replies; 26+ messages in thread From: Philippe Mathieu-Daudé @ 2025-10-29 21:39 UTC (permalink / raw) To: qemu-devel; +Cc: qemu-arm Register machines to be able to run with the qemu-system-arm and qemu-system-aarch64 binaries, except few machines which are only available on the qemu-system-aarch64 binary: $ git grep TARGET_AARCH64 hw/arm/meson.build hw/arm/meson.build:31:arm_common_ss.add(when: ['CONFIG_RASPI', 'TARGET_AARCH64'], if_true: files('bcm2838.c', 'raspi4b.c')) hw/arm/meson.build:50:arm_common_ss.add(when: ['CONFIG_ASPEED_SOC', 'TARGET_AARCH64'], if_true: files('aspeed_ast27x0.c')) $ git grep -W AARCH64 hw/arm/Kconfig hw/arm/Kconfig=185=config SBSA_REF hw/arm/Kconfig-186- bool hw/arm/Kconfig-187- default y hw/arm/Kconfig:188: depends on TCG && AARCH64 -- hw/arm/Kconfig=413=config XLNX_ZYNQMP_ARM hw/arm/Kconfig-414- bool hw/arm/Kconfig-415- default y if PIXMAN hw/arm/Kconfig:416: depends on TCG && AARCH64 -- hw/arm/Kconfig=435=config XLNX_VERSAL hw/arm/Kconfig-436- bool hw/arm/Kconfig-437- default y hw/arm/Kconfig:438: depends on TCG && AARCH64 -- hw/arm/Kconfig=475=config NPCM8XX hw/arm/Kconfig-476- bool hw/arm/Kconfig-477- default y hw/arm/Kconfig:478: depends on TCG && AARCH64 -- hw/arm/Kconfig=605=config FSL_IMX8MP_EVK hw/arm/Kconfig-606- bool hw/arm/Kconfig-607- default y hw/arm/Kconfig:608: depends on TCG && AARCH64 $ git grep -wW TARGET_AARCH64 hw/arm | fgrep -4 MACHINE_TYPE_NAME ... hw/arm/aspeed.c:1939:#ifdef TARGET_AARCH64 hw/arm/aspeed.c-1940- }, { hw/arm/aspeed.c-1941- .name = MACHINE_TYPE_NAME("ast2700a0-evb"), hw/arm/aspeed.c-1949- .name = MACHINE_TYPE_NAME("ast2700a1-evb"), hw/arm/raspi.c:420:#ifdef TARGET_AARCH64 hw/arm/raspi.c-421- }, { hw/arm/raspi.c-422- .name = MACHINE_TYPE_NAME("raspi3ap"), hw/arm/raspi.c-429- }, { hw/arm/raspi.c-430- .name = MACHINE_TYPE_NAME("raspi3b"), This can be verified as: $ diff -u0 <(qemu-system-arm -M help) <(qemu-system-aarch64 -M help) @@ -1,0 +2,3 @@ +xlnx-versal-virt AMD Versal Virtual development board (alias of amd-versal-virt) +amd-versal-virt AMD Versal Virtual development board +amd-versal2-virt AMD Versal Gen 2 Virtual development board @@ -4,0 +8,5 @@ +ast2700a0-evb Aspeed AST2700 A0 EVB (Cortex-A35) +ast2700-evb Aspeed AST2700 A1 EVB (Cortex-A35) (alias of ast2700a1-evb) +ast2700a1-evb Aspeed AST2700 A1 EVB (Cortex-A35) +ast2700fc ast2700 full core support (alias of ast2700fc) +ast2700fc ast2700 full core support @@ -20,0 +29 @@ +imx8mp-evk NXP i.MX 8M Plus EVK Board @@ -47,0 +57 @@ +npcm845-evb Nuvoton NPCM845 Evaluation Board (Cortex-A35) @@ -60,0 +71,3 @@ +raspi3ap Raspberry Pi 3A+ (revision 1.0) +raspi3b Raspberry Pi 3B (revision 1.2) +raspi4b Raspberry Pi 4B (revision 1.5) @@ -66,0 +80 @@ +sbsa-ref QEMU 'SBSA Reference' ARM Virtual Machine @@ -99,0 +114 @@ +xlnx-zcu102 Xilinx ZynqMP ZCU102 board with 4xA53s and 2xR5Fs based on the value of smp Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Acked-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20251021205741.57109-5-philmd@linaro.org> --- hw/arm/aspeed.c | 27 ++++++++++++++++++++++++++- hw/arm/aspeed_ast27x0-fc.c | 2 ++ hw/arm/b-l475e-iot01a.c | 2 ++ hw/arm/bananapi_m2u.c | 3 ++- hw/arm/collie.c | 2 ++ hw/arm/cubieboard.c | 3 ++- hw/arm/digic_boards.c | 3 ++- hw/arm/exynos4_boards.c | 3 +++ hw/arm/fby35.c | 2 ++ hw/arm/highbank.c | 3 +++ hw/arm/imx25_pdk.c | 3 ++- hw/arm/imx8mp-evk.c | 4 +++- hw/arm/integratorcp.c | 3 ++- hw/arm/kzm.c | 3 ++- hw/arm/mcimx6ul-evk.c | 4 +++- hw/arm/mcimx7d-sabre.c | 4 +++- hw/arm/microbit.c | 2 ++ hw/arm/mps2-tz.c | 5 +++++ hw/arm/mps2.c | 5 +++++ hw/arm/mps3r.c | 2 ++ hw/arm/msf2-som.c | 3 ++- hw/arm/musca.c | 3 +++ hw/arm/musicpal.c | 3 ++- hw/arm/netduino2.c | 3 ++- hw/arm/netduinoplus2.c | 3 ++- hw/arm/npcm7xx_boards.c | 6 ++++++ hw/arm/npcm8xx_boards.c | 2 ++ hw/arm/olimex-stm32-h405.c | 3 ++- hw/arm/omap_sx1.c | 3 +++ hw/arm/orangepi.c | 3 ++- hw/arm/raspi.c | 6 ++++++ hw/arm/raspi4b.c | 2 ++ hw/arm/realview.c | 5 +++++ hw/arm/sabrelite.c | 3 ++- hw/arm/sbsa-ref.c | 2 ++ hw/arm/stellaris.c | 3 +++ hw/arm/stm32vldiscovery.c | 3 ++- hw/arm/versatilepb.c | 3 +++ hw/arm/vexpress.c | 3 +++ hw/arm/virt.c | 2 ++ hw/arm/xilinx_zynq.c | 2 ++ hw/arm/xlnx-versal-virt.c | 3 +++ hw/arm/xlnx-zcu102.c | 2 ++ 43 files changed, 138 insertions(+), 18 deletions(-) diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index 1bc9e534ba4..ecc7272e67c 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -15,6 +15,7 @@ #include "hw/arm/aspeed.h" #include "hw/arm/aspeed_soc.h" #include "hw/arm/aspeed_eeprom.h" +#include "hw/arm/machines-qom.h" #include "hw/block/flash.h" #include "hw/i2c/i2c_mux_pca954x.h" #include "hw/i2c/smbus_eeprom.h" @@ -1967,99 +1968,123 @@ static const TypeInfo aspeed_machine_types[] = { .name = MACHINE_TYPE_NAME("palmetto-bmc"), .parent = TYPE_ASPEED_MACHINE, .class_init = aspeed_machine_palmetto_class_init, + .interfaces = arm_machine_interfaces, }, { .name = MACHINE_TYPE_NAME("supermicrox11-bmc"), .parent = TYPE_ASPEED_MACHINE, .class_init = aspeed_machine_supermicrox11_bmc_class_init, + .interfaces = arm_machine_interfaces, }, { .name = MACHINE_TYPE_NAME("supermicro-x11spi-bmc"), .parent = TYPE_ASPEED_MACHINE, .class_init = aspeed_machine_supermicro_x11spi_bmc_class_init, + .interfaces = arm_machine_interfaces, }, { .name = MACHINE_TYPE_NAME("ast2500-evb"), .parent = TYPE_ASPEED_MACHINE, .class_init = aspeed_machine_ast2500_evb_class_init, + .interfaces = arm_machine_interfaces, }, { .name = MACHINE_TYPE_NAME("romulus-bmc"), .parent = TYPE_ASPEED_MACHINE, .class_init = aspeed_machine_romulus_class_init, + .interfaces = arm_machine_interfaces, }, { .name = MACHINE_TYPE_NAME("sonorapass-bmc"), .parent = TYPE_ASPEED_MACHINE, .class_init = aspeed_machine_sonorapass_class_init, + .interfaces = arm_machine_interfaces, }, { .name = MACHINE_TYPE_NAME("witherspoon-bmc"), .parent = TYPE_ASPEED_MACHINE, .class_init = aspeed_machine_witherspoon_class_init, + .interfaces = arm_machine_interfaces, }, { .name = MACHINE_TYPE_NAME("ast2600-evb"), .parent = TYPE_ASPEED_MACHINE, .class_init = aspeed_machine_ast2600_evb_class_init, + .interfaces = arm_machine_interfaces, }, { .name = MACHINE_TYPE_NAME("yosemitev2-bmc"), .parent = TYPE_ASPEED_MACHINE, .class_init = aspeed_machine_yosemitev2_class_init, + .interfaces = arm_machine_interfaces, }, { .name = MACHINE_TYPE_NAME("tiogapass-bmc"), .parent = TYPE_ASPEED_MACHINE, .class_init = aspeed_machine_tiogapass_class_init, + .interfaces = arm_machine_interfaces, }, { .name = MACHINE_TYPE_NAME("g220a-bmc"), .parent = TYPE_ASPEED_MACHINE, .class_init = aspeed_machine_g220a_class_init, + .interfaces = arm_machine_interfaces, }, { .name = MACHINE_TYPE_NAME("qcom-dc-scm-v1-bmc"), .parent = TYPE_ASPEED_MACHINE, .class_init = aspeed_machine_qcom_dc_scm_v1_class_init, + .interfaces = arm_machine_interfaces, }, { .name = MACHINE_TYPE_NAME("qcom-firework-bmc"), .parent = TYPE_ASPEED_MACHINE, .class_init = aspeed_machine_qcom_firework_class_init, + .interfaces = arm_machine_interfaces, }, { .name = MACHINE_TYPE_NAME("fp5280g2-bmc"), .parent = TYPE_ASPEED_MACHINE, .class_init = aspeed_machine_fp5280g2_class_init, + .interfaces = arm_machine_interfaces, }, { .name = MACHINE_TYPE_NAME("quanta-q71l-bmc"), .parent = TYPE_ASPEED_MACHINE, .class_init = aspeed_machine_quanta_q71l_class_init, + .interfaces = arm_machine_interfaces, }, { .name = MACHINE_TYPE_NAME("rainier-bmc"), .parent = TYPE_ASPEED_MACHINE, .class_init = aspeed_machine_rainier_class_init, + .interfaces = arm_machine_interfaces, }, { .name = MACHINE_TYPE_NAME("fuji-bmc"), .parent = TYPE_ASPEED_MACHINE, .class_init = aspeed_machine_fuji_class_init, + .interfaces = arm_machine_interfaces, }, { .name = MACHINE_TYPE_NAME("bletchley-bmc"), .parent = TYPE_ASPEED_MACHINE, .class_init = aspeed_machine_bletchley_class_init, + .interfaces = arm_machine_interfaces, }, { .name = MACHINE_TYPE_NAME("gb200nvl-bmc"), .parent = TYPE_ASPEED_MACHINE, .class_init = aspeed_machine_gb200nvl_class_init, + .interfaces = arm_machine_interfaces, }, { .name = MACHINE_TYPE_NAME("catalina-bmc"), .parent = TYPE_ASPEED_MACHINE, .class_init = aspeed_machine_catalina_class_init, + .interfaces = arm_machine_interfaces, }, { .name = MACHINE_TYPE_NAME("fby35-bmc"), .parent = MACHINE_TYPE_NAME("ast2600-evb"), .class_init = aspeed_machine_fby35_class_init, + .interfaces = arm_machine_interfaces, }, { .name = MACHINE_TYPE_NAME("ast1030-evb"), .parent = TYPE_ASPEED_MACHINE, .class_init = aspeed_minibmc_machine_ast1030_evb_class_init, + .interfaces = arm_machine_interfaces, #ifdef TARGET_AARCH64 }, { .name = MACHINE_TYPE_NAME("ast2700a0-evb"), .parent = TYPE_ASPEED_MACHINE, .class_init = aspeed_machine_ast2700a0_evb_class_init, - }, { + .interfaces = aarch64_machine_interfaces, + }, { .name = MACHINE_TYPE_NAME("ast2700a1-evb"), .parent = TYPE_ASPEED_MACHINE, .class_init = aspeed_machine_ast2700a1_evb_class_init, + .interfaces = aarch64_machine_interfaces, #endif }, { .name = TYPE_ASPEED_MACHINE, diff --git a/hw/arm/aspeed_ast27x0-fc.c b/hw/arm/aspeed_ast27x0-fc.c index 580ac5f7a12..b96ef3f97ab 100644 --- a/hw/arm/aspeed_ast27x0-fc.c +++ b/hw/arm/aspeed_ast27x0-fc.c @@ -22,6 +22,7 @@ #include "hw/arm/boot.h" #include "hw/block/flash.h" #include "hw/arm/aspeed_coprocessor.h" +#include "hw/arm/machines-qom.h" #define TYPE_AST2700A1FC MACHINE_TYPE_NAME("ast2700fc") OBJECT_DECLARE_SIMPLE_TYPE(Ast2700FCState, AST2700A1FC); @@ -220,6 +221,7 @@ static const TypeInfo ast2700fc_types[] = { .parent = TYPE_MACHINE, .class_init = ast2700fc_class_init, .instance_size = sizeof(Ast2700FCState), + .interfaces = aarch64_machine_interfaces, }, }; diff --git a/hw/arm/b-l475e-iot01a.c b/hw/arm/b-l475e-iot01a.c index 34ed2e0851b..f1fbc774e52 100644 --- a/hw/arm/b-l475e-iot01a.c +++ b/hw/arm/b-l475e-iot01a.c @@ -29,6 +29,7 @@ #include "qemu/error-report.h" #include "hw/arm/boot.h" #include "hw/core/split-irq.h" +#include "hw/arm/machines-qom.h" #include "hw/arm/stm32l4x5_soc.h" #include "hw/gpio/stm32l4x5_gpio.h" #include "hw/display/dm163.h" @@ -131,6 +132,7 @@ static const TypeInfo bl475e_machine_type[] = { .parent = TYPE_MACHINE, .instance_size = sizeof(Bl475eMachineState), .class_init = bl475e_machine_init, + .interfaces = arm_machine_interfaces, } }; diff --git a/hw/arm/bananapi_m2u.c b/hw/arm/bananapi_m2u.c index b750a575f72..b5070b46666 100644 --- a/hw/arm/bananapi_m2u.c +++ b/hw/arm/bananapi_m2u.c @@ -27,6 +27,7 @@ #include "hw/qdev-properties.h" #include "hw/arm/allwinner-r40.h" #include "hw/arm/boot.h" +#include "hw/arm/machines-qom.h" static struct arm_boot_info bpim2u_binfo; @@ -144,4 +145,4 @@ static void bpim2u_machine_init(MachineClass *mc) mc->auto_create_sdcard = true; } -DEFINE_MACHINE("bpim2u", bpim2u_machine_init) +DEFINE_MACHINE_ARM("bpim2u-pdk", bpim2u_machine_init) diff --git a/hw/arm/collie.c b/hw/arm/collie.c index 93bb190f1f9..5a80b7a2238 100644 --- a/hw/arm/collie.c +++ b/hw/arm/collie.c @@ -15,6 +15,7 @@ #include "hw/boards.h" #include "strongarm.h" #include "hw/arm/boot.h" +#include "hw/arm/machines-qom.h" #include "hw/block/flash.h" #include "system/address-spaces.h" #include "qom/object.h" @@ -86,6 +87,7 @@ static const TypeInfo collie_machine_typeinfo = { .parent = TYPE_MACHINE, .class_init = collie_machine_class_init, .instance_size = sizeof(CollieMachineState), + .interfaces = arm_machine_interfaces, }; static void collie_machine_register_types(void) diff --git a/hw/arm/cubieboard.c b/hw/arm/cubieboard.c index d665d4edd97..aa51c0a7034 100644 --- a/hw/arm/cubieboard.c +++ b/hw/arm/cubieboard.c @@ -22,6 +22,7 @@ #include "hw/qdev-properties.h" #include "hw/arm/allwinner-a10.h" #include "hw/arm/boot.h" +#include "hw/arm/machines-qom.h" #include "hw/i2c/i2c.h" static struct arm_boot_info cubieboard_binfo = { @@ -125,4 +126,4 @@ static void cubieboard_machine_init(MachineClass *mc) mc->auto_create_sdcard = true; } -DEFINE_MACHINE("cubieboard", cubieboard_machine_init) +DEFINE_MACHINE_ARM("cubieboard", cubieboard_machine_init) diff --git a/hw/arm/digic_boards.c b/hw/arm/digic_boards.c index de56991baca..23b596d0c81 100644 --- a/hw/arm/digic_boards.c +++ b/hw/arm/digic_boards.c @@ -29,6 +29,7 @@ #include "hw/boards.h" #include "qemu/error-report.h" #include "hw/arm/digic.h" +#include "hw/arm/machines-qom.h" #include "hw/block/flash.h" #include "hw/loader.h" #include "system/qtest.h" @@ -145,4 +146,4 @@ static void canon_a1100_machine_init(MachineClass *mc) mc->default_ram_id = "ram"; } -DEFINE_MACHINE("canon-a1100", canon_a1100_machine_init) +DEFINE_MACHINE_ARM("canon-a1100", canon_a1100_machine_init) diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c index 73049741312..89f0e944632 100644 --- a/hw/arm/exynos4_boards.c +++ b/hw/arm/exynos4_boards.c @@ -28,6 +28,7 @@ #include "hw/sysbus.h" #include "net/net.h" #include "hw/arm/boot.h" +#include "hw/arm/machines-qom.h" #include "system/address-spaces.h" #include "hw/arm/exynos4210.h" #include "hw/net/lan9118.h" @@ -172,6 +173,7 @@ static const TypeInfo nuri_type = { .name = MACHINE_TYPE_NAME("nuri"), .parent = TYPE_MACHINE, .class_init = nuri_class_init, + .interfaces = arm_machine_interfaces, }; static void smdkc210_class_init(ObjectClass *oc, const void *data) @@ -192,6 +194,7 @@ static const TypeInfo smdkc210_type = { .name = MACHINE_TYPE_NAME("smdkc210"), .parent = TYPE_MACHINE, .class_init = smdkc210_class_init, + .interfaces = arm_machine_interfaces, }; static void exynos4_machines_init(void) diff --git a/hw/arm/fby35.c b/hw/arm/fby35.c index 5a94c847d36..70d3a99d79e 100644 --- a/hw/arm/fby35.c +++ b/hw/arm/fby35.c @@ -14,6 +14,7 @@ #include "hw/qdev-clock.h" #include "hw/arm/aspeed_soc.h" #include "hw/arm/boot.h" +#include "hw/arm/machines-qom.h" #define TYPE_FBY35 MACHINE_TYPE_NAME("fby35") OBJECT_DECLARE_SIMPLE_TYPE(Fby35State, FBY35); @@ -194,6 +195,7 @@ static const TypeInfo fby35_types[] = { .class_init = fby35_class_init, .instance_size = sizeof(Fby35State), .instance_init = fby35_instance_init, + .interfaces = arm_machine_interfaces, }, }; diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c index ff987467a99..bd60ab26898 100644 --- a/hw/arm/highbank.c +++ b/hw/arm/highbank.c @@ -23,6 +23,7 @@ #include "hw/sysbus.h" #include "migration/vmstate.h" #include "hw/arm/boot.h" +#include "hw/arm/machines-qom.h" #include "hw/loader.h" #include "net/net.h" #include "system/runstate.h" @@ -365,6 +366,7 @@ static const TypeInfo highbank_type = { .name = MACHINE_TYPE_NAME("highbank"), .parent = TYPE_MACHINE, .class_init = highbank_class_init, + .interfaces = arm_machine_interfaces, }; static void midway_class_init(ObjectClass *oc, const void *data) @@ -390,6 +392,7 @@ static const TypeInfo midway_type = { .name = MACHINE_TYPE_NAME("midway"), .parent = TYPE_MACHINE, .class_init = midway_class_init, + .interfaces = arm_machine_interfaces, }; static void calxeda_machines_init(void) diff --git a/hw/arm/imx25_pdk.c b/hw/arm/imx25_pdk.c index e95ea5e4e18..71a46062032 100644 --- a/hw/arm/imx25_pdk.c +++ b/hw/arm/imx25_pdk.c @@ -28,6 +28,7 @@ #include "hw/qdev-properties.h" #include "hw/arm/fsl-imx25.h" #include "hw/arm/boot.h" +#include "hw/arm/machines-qom.h" #include "hw/boards.h" #include "qemu/error-report.h" #include "system/qtest.h" @@ -150,4 +151,4 @@ static void imx25_pdk_machine_init(MachineClass *mc) mc->auto_create_sdcard = true; } -DEFINE_MACHINE("imx25-pdk", imx25_pdk_machine_init) +DEFINE_MACHINE_ARM("imx25-pdk", imx25_pdk_machine_init) diff --git a/hw/arm/imx8mp-evk.c b/hw/arm/imx8mp-evk.c index b3082fa60d8..a40443fb0a7 100644 --- a/hw/arm/imx8mp-evk.c +++ b/hw/arm/imx8mp-evk.c @@ -10,6 +10,7 @@ #include "system/address-spaces.h" #include "hw/arm/boot.h" #include "hw/arm/fsl-imx8mp.h" +#include "hw/arm/machines-qom.h" #include "hw/boards.h" #include "hw/qdev-properties.h" #include "system/qtest.h" @@ -100,4 +101,5 @@ static void imx8mp_evk_machine_init(MachineClass *mc) mc->max_cpus = FSL_IMX8MP_NUM_CPUS; mc->default_ram_id = "imx8mp-evk.ram"; } -DEFINE_MACHINE("imx8mp-evk", imx8mp_evk_machine_init) + +DEFINE_MACHINE_AARCH64("imx8mp", imx8mp_evk_machine_init) diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c index b1d8fbd470a..031380aada2 100644 --- a/hw/arm/integratorcp.c +++ b/hw/arm/integratorcp.c @@ -13,6 +13,7 @@ #include "migration/vmstate.h" #include "hw/boards.h" #include "hw/arm/boot.h" +#include "hw/arm/machines-qom.h" #include "hw/misc/arm_integrator_debug.h" #include "hw/net/smc91c111.h" #include "net/net.h" @@ -693,7 +694,7 @@ static void integratorcp_machine_init(MachineClass *mc) machine_add_audiodev_property(mc); } -DEFINE_MACHINE("integratorcp", integratorcp_machine_init) +DEFINE_MACHINE_ARM("integratorcp", integratorcp_machine_init) static const Property core_properties[] = { DEFINE_PROP_UINT32("memsz", IntegratorCMState, memsz, 0), diff --git a/hw/arm/kzm.c b/hw/arm/kzm.c index 362c1454099..b446dc15470 100644 --- a/hw/arm/kzm.c +++ b/hw/arm/kzm.c @@ -17,6 +17,7 @@ #include "qapi/error.h" #include "hw/arm/fsl-imx31.h" #include "hw/arm/boot.h" +#include "hw/arm/machines-qom.h" #include "hw/boards.h" #include "qemu/error-report.h" #include "system/address-spaces.h" @@ -139,4 +140,4 @@ static void kzm_machine_init(MachineClass *mc) mc->default_ram_id = "kzm.ram"; } -DEFINE_MACHINE("kzm", kzm_machine_init) +DEFINE_MACHINE_ARM("kzm", kzm_machine_init) diff --git a/hw/arm/mcimx6ul-evk.c b/hw/arm/mcimx6ul-evk.c index 86982cb0772..f47a265650e 100644 --- a/hw/arm/mcimx6ul-evk.c +++ b/hw/arm/mcimx6ul-evk.c @@ -14,6 +14,7 @@ #include "qapi/error.h" #include "hw/arm/fsl-imx6ul.h" #include "hw/arm/boot.h" +#include "hw/arm/machines-qom.h" #include "hw/boards.h" #include "hw/qdev-properties.h" #include "qemu/error-report.h" @@ -76,4 +77,5 @@ static void mcimx6ul_evk_machine_init(MachineClass *mc) mc->default_ram_id = "mcimx6ul-evk.ram"; mc->auto_create_sdcard = true; } -DEFINE_MACHINE("mcimx6ul-evk", mcimx6ul_evk_machine_init) + +DEFINE_MACHINE_ARM("mcimx6ul-evk", mcimx6ul_evk_machine_init) diff --git a/hw/arm/mcimx7d-sabre.c b/hw/arm/mcimx7d-sabre.c index 33119610113..fc8f35c5810 100644 --- a/hw/arm/mcimx7d-sabre.c +++ b/hw/arm/mcimx7d-sabre.c @@ -16,6 +16,7 @@ #include "qapi/error.h" #include "hw/arm/fsl-imx7.h" #include "hw/arm/boot.h" +#include "hw/arm/machines-qom.h" #include "hw/boards.h" #include "hw/qdev-properties.h" #include "qemu/error-report.h" @@ -76,4 +77,5 @@ static void mcimx7d_sabre_machine_init(MachineClass *mc) mc->default_ram_id = "mcimx7d-sabre.ram"; mc->auto_create_sdcard = true; } -DEFINE_MACHINE("mcimx7d-sabre", mcimx7d_sabre_machine_init) + +DEFINE_MACHINE_ARM("mcimx7d-sabre", mcimx7d_sabre_machine_init) diff --git a/hw/arm/microbit.c b/hw/arm/microbit.c index 525443fdb97..0f3161fd931 100644 --- a/hw/arm/microbit.c +++ b/hw/arm/microbit.c @@ -12,6 +12,7 @@ #include "qapi/error.h" #include "hw/boards.h" #include "hw/arm/boot.h" +#include "hw/arm/machines-qom.h" #include "system/system.h" #include "system/address-spaces.h" @@ -74,6 +75,7 @@ static const TypeInfo microbit_info = { .parent = TYPE_MACHINE, .instance_size = sizeof(MicrobitMachineState), .class_init = microbit_machine_class_init, + .interfaces = arm_machine_interfaces, }; static void microbit_machine_init(void) diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c index 5dd87cc0281..55dd68c57e1 100644 --- a/hw/arm/mps2-tz.c +++ b/hw/arm/mps2-tz.c @@ -52,6 +52,7 @@ #include "qemu/error-report.h" #include "hw/arm/boot.h" #include "hw/arm/armv7m.h" +#include "hw/arm/machines-qom.h" #include "hw/or-irq.h" #include "hw/boards.h" #include "system/address-spaces.h" @@ -1463,24 +1464,28 @@ static const TypeInfo mps2tz_an505_info = { .name = TYPE_MPS2TZ_AN505_MACHINE, .parent = TYPE_MPS2TZ_MACHINE, .class_init = mps2tz_an505_class_init, + .interfaces = arm_machine_interfaces, }; static const TypeInfo mps2tz_an521_info = { .name = TYPE_MPS2TZ_AN521_MACHINE, .parent = TYPE_MPS2TZ_MACHINE, .class_init = mps2tz_an521_class_init, + .interfaces = arm_machine_interfaces, }; static const TypeInfo mps3tz_an524_info = { .name = TYPE_MPS3TZ_AN524_MACHINE, .parent = TYPE_MPS2TZ_MACHINE, .class_init = mps3tz_an524_class_init, + .interfaces = arm_machine_interfaces, }; static const TypeInfo mps3tz_an547_info = { .name = TYPE_MPS3TZ_AN547_MACHINE, .parent = TYPE_MPS2TZ_MACHINE, .class_init = mps3tz_an547_class_init, + .interfaces = arm_machine_interfaces, }; static void mps2tz_machine_init(void) diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c index bd378e360b0..fa4b200577f 100644 --- a/hw/arm/mps2.c +++ b/hw/arm/mps2.c @@ -31,6 +31,7 @@ #include "qemu/error-report.h" #include "hw/arm/boot.h" #include "hw/arm/armv7m.h" +#include "hw/arm/machines-qom.h" #include "hw/or-irq.h" #include "hw/boards.h" #include "system/address-spaces.h" @@ -567,24 +568,28 @@ static const TypeInfo mps2_an385_info = { .name = TYPE_MPS2_AN385_MACHINE, .parent = TYPE_MPS2_MACHINE, .class_init = mps2_an385_class_init, + .interfaces = arm_machine_interfaces, }; static const TypeInfo mps2_an386_info = { .name = TYPE_MPS2_AN386_MACHINE, .parent = TYPE_MPS2_MACHINE, .class_init = mps2_an386_class_init, + .interfaces = arm_machine_interfaces, }; static const TypeInfo mps2_an500_info = { .name = TYPE_MPS2_AN500_MACHINE, .parent = TYPE_MPS2_MACHINE, .class_init = mps2_an500_class_init, + .interfaces = arm_machine_interfaces, }; static const TypeInfo mps2_an511_info = { .name = TYPE_MPS2_AN511_MACHINE, .parent = TYPE_MPS2_MACHINE, .class_init = mps2_an511_class_init, + .interfaces = arm_machine_interfaces, }; static void mps2_machine_init(void) diff --git a/hw/arm/mps3r.c b/hw/arm/mps3r.c index 48c73acc62e..fcb8777cafd 100644 --- a/hw/arm/mps3r.c +++ b/hw/arm/mps3r.c @@ -37,6 +37,7 @@ #include "hw/qdev-properties.h" #include "hw/arm/boot.h" #include "hw/arm/bsa.h" +#include "hw/arm/machines-qom.h" #include "hw/char/cmsdk-apb-uart.h" #include "hw/i2c/arm_sbcon_i2c.h" #include "hw/intc/arm_gicv3.h" @@ -634,6 +635,7 @@ static const TypeInfo mps3r_machine_types[] = { .name = TYPE_MPS3R_AN536_MACHINE, .parent = TYPE_MPS3R_MACHINE, .class_init = mps3r_an536_class_init, + .interfaces = arm_machine_interfaces, }, }; diff --git a/hw/arm/msf2-som.c b/hw/arm/msf2-som.c index 29c76c68605..c26feccb15b 100644 --- a/hw/arm/msf2-som.c +++ b/hw/arm/msf2-som.c @@ -32,6 +32,7 @@ #include "hw/boards.h" #include "hw/qdev-properties.h" #include "hw/arm/boot.h" +#include "hw/arm/machines-qom.h" #include "hw/qdev-clock.h" #include "system/address-spaces.h" #include "hw/arm/msf2-soc.h" @@ -108,4 +109,4 @@ static void emcraft_sf2_machine_init(MachineClass *mc) mc->valid_cpu_types = valid_cpu_types; } -DEFINE_MACHINE("emcraft-sf2", emcraft_sf2_machine_init) +DEFINE_MACHINE_ARM("emcraft-sf2", emcraft_sf2_machine_init) diff --git a/hw/arm/musca.c b/hw/arm/musca.c index 250b3b5bf84..a3494c96bf4 100644 --- a/hw/arm/musca.c +++ b/hw/arm/musca.c @@ -26,6 +26,7 @@ #include "system/system.h" #include "hw/arm/boot.h" #include "hw/arm/armsse.h" +#include "hw/arm/machines-qom.h" #include "hw/boards.h" #include "hw/char/pl011.h" #include "hw/core/split-irq.h" @@ -657,12 +658,14 @@ static const TypeInfo musca_a_info = { .name = TYPE_MUSCA_A_MACHINE, .parent = TYPE_MUSCA_MACHINE, .class_init = musca_a_class_init, + .interfaces = arm_machine_interfaces, }; static const TypeInfo musca_b1_info = { .name = TYPE_MUSCA_B1_MACHINE, .parent = TYPE_MUSCA_MACHINE, .class_init = musca_b1_class_init, + .interfaces = arm_machine_interfaces, }; static void musca_machine_init(void) diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c index 329b162eb20..1ae7cbd95c8 100644 --- a/hw/arm/musicpal.c +++ b/hw/arm/musicpal.c @@ -15,6 +15,7 @@ #include "hw/sysbus.h" #include "migration/vmstate.h" #include "hw/arm/boot.h" +#include "hw/arm/machines-qom.h" #include "net/net.h" #include "system/system.h" #include "hw/boards.h" @@ -1346,7 +1347,7 @@ static void musicpal_machine_init(MachineClass *mc) machine_add_audiodev_property(mc); } -DEFINE_MACHINE("musicpal", musicpal_machine_init) +DEFINE_MACHINE_ARM("musicpal", musicpal_machine_init) static void mv88w8618_wlan_class_init(ObjectClass *klass, const void *data) { diff --git a/hw/arm/netduino2.c b/hw/arm/netduino2.c index df793c77fe1..bce0d6f87a9 100644 --- a/hw/arm/netduino2.c +++ b/hw/arm/netduino2.c @@ -30,6 +30,7 @@ #include "qemu/error-report.h" #include "hw/arm/stm32f205_soc.h" #include "hw/arm/boot.h" +#include "hw/arm/machines-qom.h" /* Main SYSCLK frequency in Hz (120MHz) */ #define SYSCLK_FRQ 120000000ULL @@ -65,4 +66,4 @@ static void netduino2_machine_init(MachineClass *mc) mc->ignore_memory_transaction_failures = true; } -DEFINE_MACHINE("netduino2", netduino2_machine_init) +DEFINE_MACHINE_ARM("netduino2", netduino2_machine_init) diff --git a/hw/arm/netduinoplus2.c b/hw/arm/netduinoplus2.c index 81b6334cf72..8594081fe47 100644 --- a/hw/arm/netduinoplus2.c +++ b/hw/arm/netduinoplus2.c @@ -30,6 +30,7 @@ #include "qemu/error-report.h" #include "hw/arm/stm32f405_soc.h" #include "hw/arm/boot.h" +#include "hw/arm/machines-qom.h" /* Main SYSCLK frequency in Hz (168MHz) */ #define SYSCLK_FRQ 168000000ULL @@ -65,4 +66,4 @@ static void netduinoplus2_machine_init(MachineClass *mc) mc->valid_cpu_types = valid_cpu_types; } -DEFINE_MACHINE("netduinoplus2", netduinoplus2_machine_init) +DEFINE_MACHINE_ARM("netduinoplus2", netduinoplus2_machine_init) diff --git a/hw/arm/npcm7xx_boards.c b/hw/arm/npcm7xx_boards.c index 465a0e5acec..c1e100b1e48 100644 --- a/hw/arm/npcm7xx_boards.c +++ b/hw/arm/npcm7xx_boards.c @@ -17,6 +17,7 @@ #include "qemu/osdep.h" #include "hw/arm/npcm7xx.h" +#include "hw/arm/machines-qom.h" #include "hw/core/cpu.h" #include "hw/i2c/i2c_mux_pca954x.h" #include "hw/i2c/smbus_eeprom.h" @@ -549,22 +550,27 @@ static const TypeInfo npcm7xx_machine_types[] = { .name = MACHINE_TYPE_NAME("npcm750-evb"), .parent = TYPE_NPCM7XX_MACHINE, .class_init = npcm750_evb_machine_class_init, + .interfaces = arm_machine_interfaces, }, { .name = MACHINE_TYPE_NAME("quanta-gsj"), .parent = TYPE_NPCM7XX_MACHINE, .class_init = gsj_machine_class_init, + .interfaces = arm_machine_interfaces, }, { .name = MACHINE_TYPE_NAME("quanta-gbs-bmc"), .parent = TYPE_NPCM7XX_MACHINE, .class_init = gbs_bmc_machine_class_init, + .interfaces = arm_machine_interfaces, }, { .name = MACHINE_TYPE_NAME("kudo-bmc"), .parent = TYPE_NPCM7XX_MACHINE, .class_init = kudo_bmc_machine_class_init, + .interfaces = arm_machine_interfaces, }, { .name = MACHINE_TYPE_NAME("mori-bmc"), .parent = TYPE_NPCM7XX_MACHINE, .class_init = mori_bmc_machine_class_init, + .interfaces = arm_machine_interfaces, }, }; diff --git a/hw/arm/npcm8xx_boards.c b/hw/arm/npcm8xx_boards.c index 3bf3e1f8f16..b179eadef53 100644 --- a/hw/arm/npcm8xx_boards.c +++ b/hw/arm/npcm8xx_boards.c @@ -19,6 +19,7 @@ #include "chardev/char.h" #include "hw/boards.h" #include "hw/arm/npcm8xx.h" +#include "hw/arm/machines-qom.h" #include "hw/core/cpu.h" #include "hw/loader.h" #include "hw/qdev-core.h" @@ -248,6 +249,7 @@ static const TypeInfo npcm8xx_machine_types[] = { .name = MACHINE_TYPE_NAME("npcm845-evb"), .parent = TYPE_NPCM8XX_MACHINE, .class_init = npcm845_evb_machine_class_init, + .interfaces = aarch64_machine_interfaces, }, }; diff --git a/hw/arm/olimex-stm32-h405.c b/hw/arm/olimex-stm32-h405.c index 1f15620f9fd..c5f60383335 100644 --- a/hw/arm/olimex-stm32-h405.c +++ b/hw/arm/olimex-stm32-h405.c @@ -31,6 +31,7 @@ #include "qemu/error-report.h" #include "hw/arm/stm32f405_soc.h" #include "hw/arm/boot.h" +#include "hw/arm/machines-qom.h" /* olimex-stm32-h405 implementation is derived from netduinoplus2 */ @@ -71,4 +72,4 @@ static void olimex_stm32_h405_machine_init(MachineClass *mc) mc->default_ram_size = 0; } -DEFINE_MACHINE("olimex-stm32-h405", olimex_stm32_h405_machine_init) +DEFINE_MACHINE_ARM("olimex-stm32-h405", olimex_stm32_h405_machine_init) diff --git a/hw/arm/omap_sx1.c b/hw/arm/omap_sx1.c index 5d4a31b7aed..730525be2dc 100644 --- a/hw/arm/omap_sx1.c +++ b/hw/arm/omap_sx1.c @@ -32,6 +32,7 @@ #include "hw/arm/omap.h" #include "hw/boards.h" #include "hw/arm/boot.h" +#include "hw/arm/machines-qom.h" #include "hw/block/flash.h" #include "system/qtest.h" #include "system/address-spaces.h" @@ -219,6 +220,7 @@ static const TypeInfo sx1_machine_v2_type = { .name = MACHINE_TYPE_NAME("sx1"), .parent = TYPE_MACHINE, .class_init = sx1_machine_v2_class_init, + .interfaces = arm_machine_interfaces, }; static void sx1_machine_v1_class_init(ObjectClass *oc, const void *data) @@ -238,6 +240,7 @@ static const TypeInfo sx1_machine_v1_type = { .name = MACHINE_TYPE_NAME("sx1-v1"), .parent = TYPE_MACHINE, .class_init = sx1_machine_v1_class_init, + .interfaces = arm_machine_interfaces, }; static void sx1_machine_init(void) diff --git a/hw/arm/orangepi.c b/hw/arm/orangepi.c index e0956880d11..3e237e78fa1 100644 --- a/hw/arm/orangepi.c +++ b/hw/arm/orangepi.c @@ -26,6 +26,7 @@ #include "hw/qdev-properties.h" #include "hw/arm/allwinner-h3.h" #include "hw/arm/boot.h" +#include "hw/arm/machines-qom.h" static struct arm_boot_info orangepi_binfo; @@ -124,4 +125,4 @@ static void orangepi_machine_init(MachineClass *mc) mc->auto_create_sdcard = true; } -DEFINE_MACHINE("orangepi-pc", orangepi_machine_init) +DEFINE_MACHINE_ARM("orangepi-pc", orangepi_machine_init) diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c index fbf3e09c030..81d2fa1b67d 100644 --- a/hw/arm/raspi.c +++ b/hw/arm/raspi.c @@ -25,6 +25,7 @@ #include "hw/boards.h" #include "hw/loader.h" #include "hw/arm/boot.h" +#include "hw/arm/machines-qom.h" #include "qom/object.h" #define TYPE_RASPI_MACHINE MACHINE_TYPE_NAME("raspi-common") @@ -394,23 +395,28 @@ static const TypeInfo raspi_machine_types[] = { .name = MACHINE_TYPE_NAME("raspi0"), .parent = TYPE_RASPI_MACHINE, .class_init = raspi0_machine_class_init, + .interfaces = arm_machine_interfaces, }, { .name = MACHINE_TYPE_NAME("raspi1ap"), .parent = TYPE_RASPI_MACHINE, .class_init = raspi1ap_machine_class_init, + .interfaces = arm_machine_interfaces, }, { .name = MACHINE_TYPE_NAME("raspi2b"), .parent = TYPE_RASPI_MACHINE, .class_init = raspi2b_machine_class_init, + .interfaces = arm_machine_interfaces, #ifdef TARGET_AARCH64 }, { .name = MACHINE_TYPE_NAME("raspi3ap"), .parent = TYPE_RASPI_MACHINE, .class_init = raspi3ap_machine_class_init, + .interfaces = aarch64_machine_interfaces, }, { .name = MACHINE_TYPE_NAME("raspi3b"), .parent = TYPE_RASPI_MACHINE, .class_init = raspi3b_machine_class_init, + .interfaces = aarch64_machine_interfaces, #endif }, { .name = TYPE_RASPI_MACHINE, diff --git a/hw/arm/raspi4b.c b/hw/arm/raspi4b.c index 4df951a0d82..0422ae0f00b 100644 --- a/hw/arm/raspi4b.c +++ b/hw/arm/raspi4b.c @@ -11,6 +11,7 @@ #include "qemu/cutils.h" #include "qapi/error.h" #include "qapi/visitor.h" +#include "hw/arm/machines-qom.h" #include "hw/arm/raspi_platform.h" #include "hw/display/bcm2835_fb.h" #include "hw/registerfields.h" @@ -123,6 +124,7 @@ static const TypeInfo raspi4b_machine_type = { .parent = TYPE_RASPI_BASE_MACHINE, .instance_size = sizeof(Raspi4bMachineState), .class_init = raspi4b_machine_class_init, + .interfaces = aarch64_machine_interfaces, }; static void raspi4b_machine_register_type(void) diff --git a/hw/arm/realview.c b/hw/arm/realview.c index 5c9050490b4..b940cbf2c11 100644 --- a/hw/arm/realview.c +++ b/hw/arm/realview.c @@ -13,6 +13,7 @@ #include "hw/sysbus.h" #include "hw/arm/boot.h" #include "hw/arm/primecell.h" +#include "hw/arm/machines-qom.h" #include "hw/core/split-irq.h" #include "hw/net/lan9118.h" #include "hw/net/smc91c111.h" @@ -431,6 +432,7 @@ static const TypeInfo realview_eb_type = { .name = MACHINE_TYPE_NAME("realview-eb"), .parent = TYPE_MACHINE, .class_init = realview_eb_class_init, + .interfaces = arm_machine_interfaces, }; static void realview_eb_mpcore_class_init(ObjectClass *oc, const void *data) @@ -452,6 +454,7 @@ static const TypeInfo realview_eb_mpcore_type = { .name = MACHINE_TYPE_NAME("realview-eb-mpcore"), .parent = TYPE_MACHINE, .class_init = realview_eb_mpcore_class_init, + .interfaces = arm_machine_interfaces, }; static void realview_pb_a8_class_init(ObjectClass *oc, const void *data) @@ -471,6 +474,7 @@ static const TypeInfo realview_pb_a8_type = { .name = MACHINE_TYPE_NAME("realview-pb-a8"), .parent = TYPE_MACHINE, .class_init = realview_pb_a8_class_init, + .interfaces = arm_machine_interfaces, }; static void realview_pbx_a9_class_init(ObjectClass *oc, const void *data) @@ -491,6 +495,7 @@ static const TypeInfo realview_pbx_a9_type = { .name = MACHINE_TYPE_NAME("realview-pbx-a9"), .parent = TYPE_MACHINE, .class_init = realview_pbx_a9_class_init, + .interfaces = arm_machine_interfaces, }; static void realview_machine_init(void) diff --git a/hw/arm/sabrelite.c b/hw/arm/sabrelite.c index df60d47c6fd..5b4ab7d77a5 100644 --- a/hw/arm/sabrelite.c +++ b/hw/arm/sabrelite.c @@ -14,6 +14,7 @@ #include "qapi/error.h" #include "hw/arm/fsl-imx6.h" #include "hw/arm/boot.h" +#include "hw/arm/machines-qom.h" #include "hw/boards.h" #include "hw/qdev-properties.h" #include "qemu/error-report.h" @@ -113,4 +114,4 @@ static void sabrelite_machine_init(MachineClass *mc) mc->auto_create_sdcard = true; } -DEFINE_MACHINE("sabrelite", sabrelite_machine_init) +DEFINE_MACHINE_ARM("sabrelite", sabrelite_machine_init) diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index 15c1ff4b140..cf6e6eb208a 100644 --- a/hw/arm/sbsa-ref.c +++ b/hw/arm/sbsa-ref.c @@ -35,6 +35,7 @@ #include "hw/arm/bsa.h" #include "hw/arm/fdt.h" #include "hw/arm/smmuv3.h" +#include "hw/arm/machines-qom.h" #include "hw/block/flash.h" #include "hw/boards.h" #include "hw/ide/ide-bus.h" @@ -922,6 +923,7 @@ static const TypeInfo sbsa_ref_info = { .instance_init = sbsa_ref_instance_init, .class_init = sbsa_ref_class_init, .instance_size = sizeof(SBSAMachineState), + .interfaces = aarch64_machine_interfaces, }; static void sbsa_ref_machine_init(void) diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c index 031ea3a24e7..8113bbd5d8b 100644 --- a/hw/arm/stellaris.c +++ b/hw/arm/stellaris.c @@ -15,6 +15,7 @@ #include "hw/sd/sd.h" #include "hw/ssi/ssi.h" #include "hw/arm/boot.h" +#include "hw/arm/machines-qom.h" #include "qemu/timer.h" #include "hw/i2c/i2c.h" #include "net/net.h" @@ -1427,6 +1428,7 @@ static const TypeInfo lm3s811evb_type = { .name = MACHINE_TYPE_NAME("lm3s811evb"), .parent = TYPE_MACHINE, .class_init = lm3s811evb_class_init, + .interfaces = arm_machine_interfaces, }; /* @@ -1448,6 +1450,7 @@ static const TypeInfo lm3s6965evb_type = { .name = MACHINE_TYPE_NAME("lm3s6965evb"), .parent = TYPE_MACHINE, .class_init = lm3s6965evb_class_init, + .interfaces = arm_machine_interfaces, }; static void stellaris_machine_init(void) diff --git a/hw/arm/stm32vldiscovery.c b/hw/arm/stm32vldiscovery.c index e6c1f5b8d7d..c11029f8bd4 100644 --- a/hw/arm/stm32vldiscovery.c +++ b/hw/arm/stm32vldiscovery.c @@ -31,6 +31,7 @@ #include "qemu/error-report.h" #include "hw/arm/stm32f100_soc.h" #include "hw/arm/boot.h" +#include "hw/arm/machines-qom.h" /* stm32vldiscovery implementation is derived from netduinoplus2 */ @@ -68,4 +69,4 @@ static void stm32vldiscovery_machine_init(MachineClass *mc) mc->valid_cpu_types = valid_cpu_types; } -DEFINE_MACHINE("stm32vldiscovery", stm32vldiscovery_machine_init) +DEFINE_MACHINE_ARM("stm32vldiscovery", stm32vldiscovery_machine_init) diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c index 5cf1a70d10d..6fc1e62789e 100644 --- a/hw/arm/versatilepb.c +++ b/hw/arm/versatilepb.c @@ -12,6 +12,7 @@ #include "hw/sysbus.h" #include "migration/vmstate.h" #include "hw/arm/boot.h" +#include "hw/arm/machines-qom.h" #include "hw/net/smc91c111.h" #include "net/net.h" #include "system/system.h" @@ -431,6 +432,7 @@ static const TypeInfo versatilepb_type = { .name = MACHINE_TYPE_NAME("versatilepb"), .parent = TYPE_MACHINE, .class_init = versatilepb_class_init, + .interfaces = arm_machine_interfaces, }; static void versatileab_class_init(ObjectClass *oc, const void *data) @@ -452,6 +454,7 @@ static const TypeInfo versatileab_type = { .name = MACHINE_TYPE_NAME("versatileab"), .parent = TYPE_MACHINE, .class_init = versatileab_class_init, + .interfaces = arm_machine_interfaces, }; static void versatile_machine_init(void) diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c index 60cd375fe75..f30923a658c 100644 --- a/hw/arm/vexpress.c +++ b/hw/arm/vexpress.c @@ -27,6 +27,7 @@ #include "hw/sysbus.h" #include "hw/arm/boot.h" #include "hw/arm/primecell.h" +#include "hw/arm/machines-qom.h" #include "hw/net/lan9118.h" #include "hw/i2c/i2c.h" #include "net/net.h" @@ -850,6 +851,7 @@ static const TypeInfo vexpress_a9_info = { .parent = TYPE_VEXPRESS_MACHINE, .class_init = vexpress_a9_class_init, .instance_init = vexpress_a9_instance_init, + .interfaces = arm_machine_interfaces, }; static const TypeInfo vexpress_a15_info = { @@ -857,6 +859,7 @@ static const TypeInfo vexpress_a15_info = { .parent = TYPE_VEXPRESS_MACHINE, .class_init = vexpress_a15_class_init, .instance_init = vexpress_a15_instance_init, + .interfaces = arm_machine_interfaces, }; static void vexpress_machine_init(void) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 175023897a7..20e3f1094cb 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -37,6 +37,7 @@ #include "hw/arm/boot.h" #include "hw/arm/primecell.h" #include "hw/arm/virt.h" +#include "hw/arm/machines-qom.h" #include "hw/block/flash.h" #include "hw/display/ramfb.h" #include "net/net.h" @@ -127,6 +128,7 @@ static void arm_virt_compat_set(MachineClass *mc) .name = MACHINE_VER_TYPE_NAME("virt", __VA_ARGS__), \ .parent = TYPE_VIRT_MACHINE, \ .class_init = MACHINE_VER_SYM(class_init, virt, __VA_ARGS__), \ + .interfaces = arm_aarch64_machine_interfaces, \ }; \ static void MACHINE_VER_SYM(register, virt, __VA_ARGS__)(void) \ { \ diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index 0372cd0ac46..c82edd3bed1 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -20,6 +20,7 @@ #include "qapi/error.h" #include "hw/sysbus.h" #include "hw/arm/boot.h" +#include "hw/arm/machines-qom.h" #include "net/net.h" #include "system/system.h" #include "hw/boards.h" @@ -480,6 +481,7 @@ static const TypeInfo zynq_machine_type = { .parent = TYPE_MACHINE, .class_init = zynq_machine_class_init, .instance_size = sizeof(ZynqMachineState), + .interfaces = arm_machine_interfaces, }; static void zynq_machine_register_types(void) diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c index 149b448546e..5e05521a572 100644 --- a/hw/arm/xlnx-versal-virt.c +++ b/hw/arm/xlnx-versal-virt.c @@ -21,6 +21,7 @@ #include "hw/arm/fdt.h" #include "hw/arm/xlnx-versal.h" #include "hw/arm/boot.h" +#include "hw/arm/machines-qom.h" #include "qom/object.h" #include "target/arm/cpu.h" @@ -401,12 +402,14 @@ static const TypeInfo versal_virt_machine_init_typeinfo = { .name = TYPE_XLNX_VERSAL_VIRT_MACHINE, .parent = TYPE_XLNX_VERSAL_VIRT_BASE_MACHINE, .class_init = versal_virt_machine_class_init, + .interfaces = aarch64_machine_interfaces, }; static const TypeInfo versal2_virt_machine_init_typeinfo = { .name = TYPE_XLNX_VERSAL2_VIRT_MACHINE, .parent = TYPE_XLNX_VERSAL_VIRT_BASE_MACHINE, .class_init = versal2_virt_machine_class_init, + .interfaces = aarch64_machine_interfaces, }; static void versal_virt_machine_init_register_types(void) diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c index 14b6641a713..330f375f63a 100644 --- a/hw/arm/xlnx-zcu102.c +++ b/hw/arm/xlnx-zcu102.c @@ -19,6 +19,7 @@ #include "qapi/error.h" #include "hw/arm/xlnx-zynqmp.h" #include "hw/arm/boot.h" +#include "hw/arm/machines-qom.h" #include "hw/boards.h" #include "qemu/error-report.h" #include "qemu/log.h" @@ -303,6 +304,7 @@ static const TypeInfo xlnx_zcu102_machine_init_typeinfo = { .class_init = xlnx_zcu102_machine_class_init, .instance_init = xlnx_zcu102_machine_instance_init, .instance_size = sizeof(XlnxZCU102), + .interfaces = aarch64_machine_interfaces, }; static void xlnx_zcu102_machine_init_register_types(void) -- 2.51.0 ^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PULL 05/23] meson: Prepare to accept per-binary TargetInfo structure implementation 2025-10-29 21:39 [PULL 00/23] Misc single binary patches for 2025-10-29 Philippe Mathieu-Daudé ` (3 preceding siblings ...) 2025-10-29 21:39 ` [PULL 04/23] hw/arm: Filter machine types for qemu-system-arm/aarch64 binaries Philippe Mathieu-Daudé @ 2025-10-29 21:39 ` Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 06/23] config/target: Implement per-binary TargetInfo structure (ARM, AARCH64) Philippe Mathieu-Daudé ` (18 subsequent siblings) 23 siblings, 0 replies; 26+ messages in thread From: Philippe Mathieu-Daudé @ 2025-10-29 21:39 UTC (permalink / raw) To: qemu-devel; +Cc: qemu-arm If a file defining the binary TargetInfo structure is available, link with it. Otherwise keep using the stub. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20251021205741.57109-6-philmd@linaro.org> --- MAINTAINERS | 1 + meson.build | 9 ++++++++- configs/targets/meson.build | 4 ++++ 3 files changed, 13 insertions(+), 1 deletion(-) create mode 100644 configs/targets/meson.build diff --git a/MAINTAINERS b/MAINTAINERS index 64491c800c2..c7faa5672a4 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2007,6 +2007,7 @@ M: Philippe Mathieu-Daudé <philmd@linaro.org> S: Supported F: include/qemu/target-info*.h F: target-info*.c +F: configs/targets/*.c Xtensa Machines --------------- diff --git a/meson.build b/meson.build index de95da32699..df876c72f06 100644 --- a/meson.build +++ b/meson.build @@ -3312,6 +3312,7 @@ config_devices_h = {} config_target_h = {} config_target_mak = {} config_base_arch_mak = {} +config_target_info = {} disassemblers = { 'alpha' : ['CONFIG_ALPHA_DIS'], @@ -3912,9 +3913,9 @@ specific_ss.add(files('page-vary-target.c')) common_ss.add(files('target-info.c')) system_ss.add(files('target-info-qom.c')) -specific_ss.add(files('target-info-stub.c')) subdir('backends') +subdir('configs/targets') subdir('disas') subdir('migration') subdir('monitor') @@ -4365,6 +4366,12 @@ foreach target : target_dirs arch_srcs += gdbstub_xml endif + if target in config_target_info + arch_srcs += config_target_info[target] + else + arch_srcs += files('target-info-stub.c') + endif + t = target_arch[target_base_arch].apply(config_target, strict: false) arch_srcs += t.sources() arch_deps += t.dependencies() diff --git a/configs/targets/meson.build b/configs/targets/meson.build new file mode 100644 index 00000000000..a9f6b24ec01 --- /dev/null +++ b/configs/targets/meson.build @@ -0,0 +1,4 @@ +foreach target : [ + ] + config_target_info += {target : files(target + '.c')} +endforeach -- 2.51.0 ^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PULL 06/23] config/target: Implement per-binary TargetInfo structure (ARM, AARCH64) 2025-10-29 21:39 [PULL 00/23] Misc single binary patches for 2025-10-29 Philippe Mathieu-Daudé ` (4 preceding siblings ...) 2025-10-29 21:39 ` [PULL 05/23] meson: Prepare to accept per-binary TargetInfo structure implementation Philippe Mathieu-Daudé @ 2025-10-29 21:39 ` Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 07/23] hw/arm/virt: Register valid CPU types dynamically Philippe Mathieu-Daudé ` (17 subsequent siblings) 23 siblings, 0 replies; 26+ messages in thread From: Philippe Mathieu-Daudé @ 2025-10-29 21:39 UTC (permalink / raw) To: qemu-devel; +Cc: qemu-arm Implement the TargetInfo structure for qemu-system-arm and qemu-system-aarch64 binaries. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20251021205741.57109-7-philmd@linaro.org> --- configs/targets/aarch64-softmmu.c | 26 ++++++++++++++++++++++++++ configs/targets/arm-softmmu.c | 26 ++++++++++++++++++++++++++ configs/targets/meson.build | 1 + 3 files changed, 53 insertions(+) create mode 100644 configs/targets/aarch64-softmmu.c create mode 100644 configs/targets/arm-softmmu.c diff --git a/configs/targets/aarch64-softmmu.c b/configs/targets/aarch64-softmmu.c new file mode 100644 index 00000000000..4e1e2f64da1 --- /dev/null +++ b/configs/targets/aarch64-softmmu.c @@ -0,0 +1,26 @@ +/* + * QEMU binary/target API (qemu-system-aarch64) + * + * Copyright (c) Linaro + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qemu/target-info-impl.h" +#include "hw/arm/machines-qom.h" +#include "target/arm/cpu-qom.h" + +static const TargetInfo target_info_aarch64_system = { + .target_name = "aarch64", + .target_arch = SYS_EMU_TARGET_AARCH64, + .long_bits = 64, + .cpu_type = TYPE_ARM_CPU, + .machine_typename = TYPE_TARGET_AARCH64_MACHINE, + .endianness = ENDIAN_MODE_LITTLE, +}; + +const TargetInfo *target_info(void) +{ + return &target_info_aarch64_system; +} diff --git a/configs/targets/arm-softmmu.c b/configs/targets/arm-softmmu.c new file mode 100644 index 00000000000..9b3fdd2854a --- /dev/null +++ b/configs/targets/arm-softmmu.c @@ -0,0 +1,26 @@ +/* + * QEMU binary/target API (qemu-system-arm) + * + * Copyright (c) Linaro + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qemu/target-info-impl.h" +#include "hw/arm/machines-qom.h" +#include "target/arm/cpu-qom.h" + +static const TargetInfo target_info_arm_system = { + .target_name = "arm", + .target_arch = SYS_EMU_TARGET_ARM, + .long_bits = 32, + .cpu_type = TYPE_ARM_CPU, + .machine_typename = TYPE_TARGET_ARM_MACHINE, + .endianness = ENDIAN_MODE_LITTLE, +}; + +const TargetInfo *target_info(void) +{ + return &target_info_arm_system; +} diff --git a/configs/targets/meson.build b/configs/targets/meson.build index a9f6b24ec01..cca2514eb51 100644 --- a/configs/targets/meson.build +++ b/configs/targets/meson.build @@ -1,4 +1,5 @@ foreach target : [ + 'arm-softmmu', 'aarch64-softmmu', ] config_target_info += {target : files(target + '.c')} endforeach -- 2.51.0 ^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PULL 07/23] hw/arm/virt: Register valid CPU types dynamically 2025-10-29 21:39 [PULL 00/23] Misc single binary patches for 2025-10-29 Philippe Mathieu-Daudé ` (5 preceding siblings ...) 2025-10-29 21:39 ` [PULL 06/23] config/target: Implement per-binary TargetInfo structure (ARM, AARCH64) Philippe Mathieu-Daudé @ 2025-10-29 21:39 ` Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 08/23] hw/arm/virt: Check accelerator availability at runtime Philippe Mathieu-Daudé ` (16 subsequent siblings) 23 siblings, 0 replies; 26+ messages in thread From: Philippe Mathieu-Daudé @ 2025-10-29 21:39 UTC (permalink / raw) To: qemu-devel; +Cc: qemu-arm Replace the static array returned as MachineClass::valid_cpu_types[] by a runtime one generated by MachineClass::get_valid_cpu_types() once the machine is created (its options being processed). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Acked-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20251021211135.61179-1-philmd@linaro.org> --- hw/arm/virt.c | 59 ++++++++++++++++++++++++++++----------------------- 1 file changed, 32 insertions(+), 27 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 20e3f1094cb..e19da6fd901 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -3256,36 +3256,41 @@ static int virt_hvf_get_physical_address_range(MachineState *ms) return requested_ipa_size; } +static GPtrArray *virt_get_valid_cpu_types(const MachineState *ms) +{ + GPtrArray *vct = g_ptr_array_new_with_free_func(g_free); + +#ifdef CONFIG_TCG + g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a7"))); + g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a15"))); +#ifdef TARGET_AARCH64 + g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a35"))); + g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a55"))); + g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a72"))); + g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a76"))); + g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a710"))); + g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("a64fx"))); + g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("neoverse-n1"))); + g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("neoverse-v1"))); + g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("neoverse-n2"))); +#endif /* TARGET_AARCH64 */ +#endif /* CONFIG_TCG */ +#ifdef TARGET_AARCH64 + g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a53"))); + g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a57"))); +#if defined(CONFIG_KVM) || defined(CONFIG_HVF) + g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("host"))); +#endif /* CONFIG_KVM || CONFIG_HVF */ +#endif /* TARGET_AARCH64 */ + g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("max"))); + + return vct; +} + static void virt_machine_class_init(ObjectClass *oc, const void *data) { MachineClass *mc = MACHINE_CLASS(oc); HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc); - static const char * const valid_cpu_types[] = { -#ifdef CONFIG_TCG - ARM_CPU_TYPE_NAME("cortex-a7"), - ARM_CPU_TYPE_NAME("cortex-a15"), -#ifdef TARGET_AARCH64 - ARM_CPU_TYPE_NAME("cortex-a35"), - ARM_CPU_TYPE_NAME("cortex-a55"), - ARM_CPU_TYPE_NAME("cortex-a72"), - ARM_CPU_TYPE_NAME("cortex-a76"), - ARM_CPU_TYPE_NAME("cortex-a710"), - ARM_CPU_TYPE_NAME("a64fx"), - ARM_CPU_TYPE_NAME("neoverse-n1"), - ARM_CPU_TYPE_NAME("neoverse-v1"), - ARM_CPU_TYPE_NAME("neoverse-n2"), -#endif /* TARGET_AARCH64 */ -#endif /* CONFIG_TCG */ -#ifdef TARGET_AARCH64 - ARM_CPU_TYPE_NAME("cortex-a53"), - ARM_CPU_TYPE_NAME("cortex-a57"), -#if defined(CONFIG_KVM) || defined(CONFIG_HVF) - ARM_CPU_TYPE_NAME("host"), -#endif /* CONFIG_KVM || CONFIG_HVF */ -#endif /* TARGET_AARCH64 */ - ARM_CPU_TYPE_NAME("max"), - NULL - }; mc->init = machvirt_init; /* Start with max_cpus set to 512, which is the maximum supported by KVM. @@ -3311,7 +3316,7 @@ static void virt_machine_class_init(ObjectClass *oc, const void *data) #else mc->default_cpu_type = ARM_CPU_TYPE_NAME("max"); #endif - mc->valid_cpu_types = valid_cpu_types; + mc->get_valid_cpu_types = virt_get_valid_cpu_types; mc->get_default_cpu_node_id = virt_get_default_cpu_node_id; mc->kvm_type = virt_kvm_type; mc->hvf_get_physical_address_range = virt_hvf_get_physical_address_range; -- 2.51.0 ^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PULL 08/23] hw/arm/virt: Check accelerator availability at runtime 2025-10-29 21:39 [PULL 00/23] Misc single binary patches for 2025-10-29 Philippe Mathieu-Daudé ` (6 preceding siblings ...) 2025-10-29 21:39 ` [PULL 07/23] hw/arm/virt: Register valid CPU types dynamically Philippe Mathieu-Daudé @ 2025-10-29 21:39 ` Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 09/23] qemu/target_info: Add target_arm() helper Philippe Mathieu-Daudé ` (15 subsequent siblings) 23 siblings, 0 replies; 26+ messages in thread From: Philippe Mathieu-Daudé @ 2025-10-29 21:39 UTC (permalink / raw) To: qemu-devel; +Cc: qemu-arm It is not possible to call accelerator runtime helpers when QOM types are registered, because they depend on the parsing of the '-accel FOO' command line option, which happens after main(). Now than get_valid_cpu_types() is called after accelerator initializations, it is safe to call the accelerator helpers: main + configure_accelerators + qmp_x_exit_preconfig + qemu_init_board + machine_run_board_init + is_cpu_type_supported Replace compile-time check on CONFIG_{ACCEL} by runtime check on {accel}_enabled() helpers. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Acked-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20251021210840.60112-1-philmd@linaro.org> --- hw/arm/virt.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index e19da6fd901..d3809754460 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -3260,7 +3260,7 @@ static GPtrArray *virt_get_valid_cpu_types(const MachineState *ms) { GPtrArray *vct = g_ptr_array_new_with_free_func(g_free); -#ifdef CONFIG_TCG + if (tcg_enabled()) { g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a7"))); g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a15"))); #ifdef TARGET_AARCH64 @@ -3274,13 +3274,13 @@ static GPtrArray *virt_get_valid_cpu_types(const MachineState *ms) g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("neoverse-v1"))); g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("neoverse-n2"))); #endif /* TARGET_AARCH64 */ -#endif /* CONFIG_TCG */ + } #ifdef TARGET_AARCH64 g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a53"))); g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a57"))); -#if defined(CONFIG_KVM) || defined(CONFIG_HVF) + if (kvm_enabled() || hvf_enabled()) { g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("host"))); -#endif /* CONFIG_KVM || CONFIG_HVF */ + } #endif /* TARGET_AARCH64 */ g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("max"))); -- 2.51.0 ^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PULL 09/23] qemu/target_info: Add target_arm() helper 2025-10-29 21:39 [PULL 00/23] Misc single binary patches for 2025-10-29 Philippe Mathieu-Daudé ` (7 preceding siblings ...) 2025-10-29 21:39 ` [PULL 08/23] hw/arm/virt: Check accelerator availability at runtime Philippe Mathieu-Daudé @ 2025-10-29 21:39 ` Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 10/23] qemu/target_info: Add target_aarch64() helper Philippe Mathieu-Daudé ` (14 subsequent siblings) 23 siblings, 0 replies; 26+ messages in thread From: Philippe Mathieu-Daudé @ 2025-10-29 21:39 UTC (permalink / raw) To: qemu-devel; +Cc: qemu-arm Add a helper to distinct whether the binary is targetting ARM (32-bit only) or not. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Acked-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20251021210144.58108-1-philmd@linaro.org> --- include/qemu/target-info.h | 7 +++++++ target-info.c | 5 +++++ 2 files changed, 12 insertions(+) diff --git a/include/qemu/target-info.h b/include/qemu/target-info.h index abcf25db6fa..984fba3f42d 100644 --- a/include/qemu/target-info.h +++ b/include/qemu/target-info.h @@ -50,4 +50,11 @@ const char *target_cpu_type(void); */ bool target_big_endian(void); +/** + * target_arm: + * + * Returns whether the target architecture is ARM (32-bit, not Aarch64). + */ +bool target_arm(void); + #endif diff --git a/target-info.c b/target-info.c index 3110ab32f75..40716bf4051 100644 --- a/target-info.c +++ b/target-info.c @@ -52,3 +52,8 @@ bool target_big_endian(void) { return target_endian_mode() == ENDIAN_MODE_BIG; } + +bool target_arm(void) +{ + return target_arch() == SYS_EMU_TARGET_ARM; +} -- 2.51.0 ^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PULL 10/23] qemu/target_info: Add target_aarch64() helper 2025-10-29 21:39 [PULL 00/23] Misc single binary patches for 2025-10-29 Philippe Mathieu-Daudé ` (8 preceding siblings ...) 2025-10-29 21:39 ` [PULL 09/23] qemu/target_info: Add target_arm() helper Philippe Mathieu-Daudé @ 2025-10-29 21:39 ` Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 11/23] qemu/target_info: Add target_base_arm() helper Philippe Mathieu-Daudé ` (13 subsequent siblings) 23 siblings, 0 replies; 26+ messages in thread From: Philippe Mathieu-Daudé @ 2025-10-29 21:39 UTC (permalink / raw) To: qemu-devel; +Cc: qemu-arm Add a helper to distinct whether the binary is targetting Aarch64 or not. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Acked-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20251021210144.58108-2-philmd@linaro.org> --- include/qemu/target-info.h | 7 +++++++ target-info.c | 5 +++++ 2 files changed, 12 insertions(+) diff --git a/include/qemu/target-info.h b/include/qemu/target-info.h index 984fba3f42d..e8fbdf19d53 100644 --- a/include/qemu/target-info.h +++ b/include/qemu/target-info.h @@ -57,4 +57,11 @@ bool target_big_endian(void); */ bool target_arm(void); +/** + * target_aarch64: + * + * Returns whether the target architecture is Aarch64. + */ +bool target_aarch64(void); + #endif diff --git a/target-info.c b/target-info.c index 40716bf4051..e567cb4c40a 100644 --- a/target-info.c +++ b/target-info.c @@ -57,3 +57,8 @@ bool target_arm(void) { return target_arch() == SYS_EMU_TARGET_ARM; } + +bool target_aarch64(void) +{ + return target_arch() == SYS_EMU_TARGET_AARCH64; +} -- 2.51.0 ^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PULL 11/23] qemu/target_info: Add target_base_arm() helper 2025-10-29 21:39 [PULL 00/23] Misc single binary patches for 2025-10-29 Philippe Mathieu-Daudé ` (9 preceding siblings ...) 2025-10-29 21:39 ` [PULL 10/23] qemu/target_info: Add target_aarch64() helper Philippe Mathieu-Daudé @ 2025-10-29 21:39 ` Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 12/23] hw/arm/virt: Replace TARGET_AARCH64 -> target_aarch64() Philippe Mathieu-Daudé ` (12 subsequent siblings) 23 siblings, 0 replies; 26+ messages in thread From: Philippe Mathieu-Daudé @ 2025-10-29 21:39 UTC (permalink / raw) To: qemu-devel; +Cc: qemu-arm Add a helper to check whether the target base architecture is ARM (either 32-bit or 64-bit). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Acked-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20251021210144.58108-3-philmd@linaro.org> --- include/qemu/target-info.h | 7 +++++++ target-info.c | 11 +++++++++++ 2 files changed, 18 insertions(+) diff --git a/include/qemu/target-info.h b/include/qemu/target-info.h index e8fbdf19d53..62359622232 100644 --- a/include/qemu/target-info.h +++ b/include/qemu/target-info.h @@ -50,6 +50,13 @@ const char *target_cpu_type(void); */ bool target_big_endian(void); +/** + * target_base_arm: + * + * Returns whether the target architecture is ARM or Aarch64. + */ +bool target_base_arm(void); + /** * target_arm: * diff --git a/target-info.c b/target-info.c index e567cb4c40a..24696ff4111 100644 --- a/target-info.c +++ b/target-info.c @@ -53,6 +53,17 @@ bool target_big_endian(void) return target_endian_mode() == ENDIAN_MODE_BIG; } +bool target_base_arm(void) +{ + switch (target_arch()) { + case SYS_EMU_TARGET_ARM: + case SYS_EMU_TARGET_AARCH64: + return true; + default: + return false; + } +} + bool target_arm(void) { return target_arch() == SYS_EMU_TARGET_ARM; -- 2.51.0 ^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PULL 12/23] hw/arm/virt: Replace TARGET_AARCH64 -> target_aarch64() 2025-10-29 21:39 [PULL 00/23] Misc single binary patches for 2025-10-29 Philippe Mathieu-Daudé ` (10 preceding siblings ...) 2025-10-29 21:39 ` [PULL 11/23] qemu/target_info: Add target_base_arm() helper Philippe Mathieu-Daudé @ 2025-10-29 21:39 ` Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 13/23] hw/arm/virt: Get default CPU type at runtime Philippe Mathieu-Daudé ` (11 subsequent siblings) 23 siblings, 0 replies; 26+ messages in thread From: Philippe Mathieu-Daudé @ 2025-10-29 21:39 UTC (permalink / raw) To: qemu-devel; +Cc: qemu-arm Replace the target-specific TARGET_AARCH64 definition by a call to the generic target_aarch64() helper. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Acked-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20251021210144.58108-4-philmd@linaro.org> --- hw/arm/virt.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index d3809754460..dda8edb2745 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -32,6 +32,7 @@ #include "qemu/datadir.h" #include "qemu/units.h" #include "qemu/option.h" +#include "qemu/target-info.h" #include "monitor/qdev.h" #include "hw/sysbus.h" #include "hw/arm/boot.h" @@ -3263,7 +3264,8 @@ static GPtrArray *virt_get_valid_cpu_types(const MachineState *ms) if (tcg_enabled()) { g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a7"))); g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a15"))); -#ifdef TARGET_AARCH64 + } + if (tcg_enabled() && target_aarch64()) { g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a35"))); g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a55"))); g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a72"))); @@ -3273,15 +3275,14 @@ static GPtrArray *virt_get_valid_cpu_types(const MachineState *ms) g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("neoverse-n1"))); g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("neoverse-v1"))); g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("neoverse-n2"))); -#endif /* TARGET_AARCH64 */ } -#ifdef TARGET_AARCH64 + if (target_aarch64()) { g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a53"))); g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a57"))); if (kvm_enabled() || hvf_enabled()) { g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("host"))); } -#endif /* TARGET_AARCH64 */ + } g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("max"))); return vct; -- 2.51.0 ^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PULL 13/23] hw/arm/virt: Get default CPU type at runtime 2025-10-29 21:39 [PULL 00/23] Misc single binary patches for 2025-10-29 Philippe Mathieu-Daudé ` (11 preceding siblings ...) 2025-10-29 21:39 ` [PULL 12/23] hw/arm/virt: Replace TARGET_AARCH64 -> target_aarch64() Philippe Mathieu-Daudé @ 2025-10-29 21:39 ` Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 14/23] hw/arm/sbsa-ref: Include missing 'cpu.h' header Philippe Mathieu-Daudé ` (10 subsequent siblings) 23 siblings, 0 replies; 26+ messages in thread From: Philippe Mathieu-Daudé @ 2025-10-29 21:39 UTC (permalink / raw) To: qemu-devel; +Cc: qemu-arm Prefer MachineClass::get_default_cpu_type() over MachineClass::default_cpu_type to get CPU type, evaluating TCG availability at runtime calling tcg_enabled(). It's worth noting that this is a behavior change: - Previously only ./configure --disable-tcg --enable-kvm ./qemu-system-aarch64 -M virt -accel kvm would default to 'max' and ./configure --enable-tcg --enable-kvm ./qemu-system-aarch64 -M virt -accel kvm would default to 'cortex-a15'. - Afterward, -accel kvm will always default to 'max'. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Zhang Chen <zhangckid@gmail.com> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Acked-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20251021210144.58108-5-philmd@linaro.org> --- hw/arm/virt.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index dda8edb2745..d07cfe16512 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -3257,6 +3257,12 @@ static int virt_hvf_get_physical_address_range(MachineState *ms) return requested_ipa_size; } +static const char *virt_get_default_cpu_type(const MachineState *ms) +{ + return tcg_enabled() ? ARM_CPU_TYPE_NAME("cortex-a15") + : ARM_CPU_TYPE_NAME("max"); +} + static GPtrArray *virt_get_valid_cpu_types(const MachineState *ms) { GPtrArray *vct = g_ptr_array_new_with_free_func(g_free); @@ -3312,11 +3318,7 @@ static void virt_machine_class_init(ObjectClass *oc, const void *data) mc->minimum_page_bits = 12; mc->possible_cpu_arch_ids = virt_possible_cpu_arch_ids; mc->cpu_index_to_instance_props = virt_cpu_index_to_props; -#ifdef CONFIG_TCG - mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a15"); -#else - mc->default_cpu_type = ARM_CPU_TYPE_NAME("max"); -#endif + mc->get_default_cpu_type = virt_get_default_cpu_type; mc->get_valid_cpu_types = virt_get_valid_cpu_types; mc->get_default_cpu_node_id = virt_get_default_cpu_node_id; mc->kvm_type = virt_kvm_type; -- 2.51.0 ^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PULL 14/23] hw/arm/sbsa-ref: Include missing 'cpu.h' header 2025-10-29 21:39 [PULL 00/23] Misc single binary patches for 2025-10-29 Philippe Mathieu-Daudé ` (12 preceding siblings ...) 2025-10-29 21:39 ` [PULL 13/23] hw/arm/virt: Get default CPU type at runtime Philippe Mathieu-Daudé @ 2025-10-29 21:39 ` Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 15/23] hw/arm/sbsa-ref: Build only once Philippe Mathieu-Daudé ` (9 subsequent siblings) 23 siblings, 0 replies; 26+ messages in thread From: Philippe Mathieu-Daudé @ 2025-10-29 21:39 UTC (permalink / raw) To: qemu-devel; +Cc: qemu-arm "cpu.h" is indirectly pulled in by another header. Include it explicitly in order to avoid when changing default CPPFLAGS path: hw/arm/sbsa-ref.c:162:25: error: use of undeclared identifier 'ARM_DEFAULT_CPUS_PER_CLUSTER' 162 | uint8_t clustersz = ARM_DEFAULT_CPUS_PER_CLUSTER; | ^ hw/arm/sbsa-ref.c:163:12: error: call to undeclared function 'arm_build_mp_affinity' 163 | return arm_build_mp_affinity(idx, clustersz); | ^ hw/arm/sbsa-ref.c:746:25: error: use of undeclared identifier 'QEMU_PSCI_CONDUIT_DISABLED' 746 | sms->psci_conduit = QEMU_PSCI_CONDUIT_DISABLED; | ^ Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Acked-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20251021210144.58108-6-philmd@linaro.org> --- hw/arm/sbsa-ref.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index cf6e6eb208a..2205500a8da 100644 --- a/hw/arm/sbsa-ref.c +++ b/hw/arm/sbsa-ref.c @@ -52,6 +52,7 @@ #include "net/net.h" #include "qobject/qlist.h" #include "qom/object.h" +#include "target/arm/cpu.h" #include "target/arm/cpu-qom.h" #include "target/arm/gtimer.h" -- 2.51.0 ^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PULL 15/23] hw/arm/sbsa-ref: Build only once 2025-10-29 21:39 [PULL 00/23] Misc single binary patches for 2025-10-29 Philippe Mathieu-Daudé ` (13 preceding siblings ...) 2025-10-29 21:39 ` [PULL 14/23] hw/arm/sbsa-ref: Include missing 'cpu.h' header Philippe Mathieu-Daudé @ 2025-10-29 21:39 ` Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 16/23] hw/arm/virt-acpi-build: Include missing 'cpu.h' header Philippe Mathieu-Daudé ` (8 subsequent siblings) 23 siblings, 0 replies; 26+ messages in thread From: Philippe Mathieu-Daudé @ 2025-10-29 21:39 UTC (permalink / raw) To: qemu-devel; +Cc: qemu-arm Since previous commit allowed the use of accelerator definitions in common code, we can now move sbsa-ref.c to arm_common_ss[]. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Acked-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20251021210144.58108-7-philmd@linaro.org> --- hw/arm/meson.build | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/arm/meson.build b/hw/arm/meson.build index b88b5b06d7e..531a635936a 100644 --- a/hw/arm/meson.build +++ b/hw/arm/meson.build @@ -14,7 +14,7 @@ arm_common_ss.add(when: 'CONFIG_OLIMEX_STM32_H405', if_true: files('olimex-stm32 arm_common_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx.c', 'npcm7xx_boards.c')) arm_common_ss.add(when: 'CONFIG_NPCM8XX', if_true: files('npcm8xx.c', 'npcm8xx_boards.c')) arm_common_ss.add(when: 'CONFIG_REALVIEW', if_true: files('realview.c')) -arm_ss.add(when: 'CONFIG_SBSA_REF', if_true: files('sbsa-ref.c')) +arm_common_ss.add(when: 'CONFIG_SBSA_REF', if_true: files('sbsa-ref.c')) arm_common_ss.add(when: 'CONFIG_STELLARIS', if_true: files('stellaris.c')) arm_common_ss.add(when: 'CONFIG_STM32VLDISCOVERY', if_true: files('stm32vldiscovery.c')) arm_common_ss.add(when: 'CONFIG_ZYNQ', if_true: files('xilinx_zynq.c')) -- 2.51.0 ^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PULL 16/23] hw/arm/virt-acpi-build: Include missing 'cpu.h' header 2025-10-29 21:39 [PULL 00/23] Misc single binary patches for 2025-10-29 Philippe Mathieu-Daudé ` (14 preceding siblings ...) 2025-10-29 21:39 ` [PULL 15/23] hw/arm/sbsa-ref: Build only once Philippe Mathieu-Daudé @ 2025-10-29 21:39 ` Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 17/23] hw/arm/virt-acpi-build: Build only once Philippe Mathieu-Daudé ` (7 subsequent siblings) 23 siblings, 0 replies; 26+ messages in thread From: Philippe Mathieu-Daudé @ 2025-10-29 21:39 UTC (permalink / raw) To: qemu-devel; +Cc: qemu-arm "cpu.h" is indirectly pulled in by another header. Include it explicitly in order to avoid when changing default CPPFLAGS path: hw/arm/virt-acpi-build.c:903:34: error: call to undeclared function 'arm_feature'; 903 | uint32_t pmu_interrupt = arm_feature(&armcpu->env, ARM_FEATURE_PMU) ? | ^ hw/arm/virt-acpi-build.c:903:53: error: incomplete definition of type 'ARMCPU' (aka 'struct ArchCPU') 903 | uint32_t pmu_interrupt = arm_feature(&armcpu->env, ARM_FEATURE_PMU) ? | ~~~~~~^ include/qemu/typedefs.h:30:16: note: forward declaration of 'struct ArchCPU' 30 | typedef struct ArchCPU ArchCPU; | ^ hw/arm/virt-acpi-build.c:903:60: error: use of undeclared identifier 'ARM_FEATURE_PMU' 903 | uint32_t pmu_interrupt = arm_feature(&armcpu->env, ARM_FEATURE_PMU) ? | ^ hw/arm/virt-acpi-build.c:993:10: error: use of undeclared identifier 'QEMU_PSCI_CONDUIT_DISABLED' 993 | case QEMU_PSCI_CONDUIT_DISABLED: | ^ hw/arm/virt-acpi-build.c:996:10: error: use of undeclared identifier 'QEMU_PSCI_CONDUIT_HVC' 996 | case QEMU_PSCI_CONDUIT_HVC: | ^ hw/arm/virt-acpi-build.c:1000:10: error: use of undeclared identifier 'QEMU_PSCI_CONDUIT_SMC' 1000 | case QEMU_PSCI_CONDUIT_SMC: | ^ Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Acked-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20251021210144.58108-8-philmd@linaro.org> --- hw/arm/virt-acpi-build.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 8bb6b605154..200e2a1da70 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -62,6 +62,7 @@ #include "hw/acpi/ghes.h" #include "hw/acpi/viot.h" #include "hw/virtio/virtio-acpi.h" +#include "target/arm/cpu.h" #include "target/arm/multiprocessing.h" #define ARM_SPI_BASE 32 -- 2.51.0 ^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PULL 17/23] hw/arm/virt-acpi-build: Build only once 2025-10-29 21:39 [PULL 00/23] Misc single binary patches for 2025-10-29 Philippe Mathieu-Daudé ` (15 preceding siblings ...) 2025-10-29 21:39 ` [PULL 16/23] hw/arm/virt-acpi-build: Include missing 'cpu.h' header Philippe Mathieu-Daudé @ 2025-10-29 21:39 ` Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 18/23] hw/arm/virt: " Philippe Mathieu-Daudé ` (6 subsequent siblings) 23 siblings, 0 replies; 26+ messages in thread From: Philippe Mathieu-Daudé @ 2025-10-29 21:39 UTC (permalink / raw) To: qemu-devel; +Cc: qemu-arm Previous commits removed the target-specificities, we can now move virt-acpi-build.c to arm_common_ss[]. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Acked-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20251021210144.58108-9-philmd@linaro.org> --- hw/arm/meson.build | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/arm/meson.build b/hw/arm/meson.build index 531a635936a..df4c1be3b3b 100644 --- a/hw/arm/meson.build +++ b/hw/arm/meson.build @@ -1,7 +1,7 @@ arm_ss = ss.source_set() arm_common_ss = ss.source_set() arm_ss.add(when: 'CONFIG_ARM_VIRT', if_true: files('virt.c')) -arm_ss.add(when: 'CONFIG_ACPI', if_true: files('virt-acpi-build.c')) +arm_common_ss.add(when: 'CONFIG_ACPI', if_true: files('virt-acpi-build.c')) arm_common_ss.add(when: 'CONFIG_DIGIC', if_true: files('digic_boards.c')) arm_common_ss.add(when: 'CONFIG_EMCRAFT_SF2', if_true: files('msf2-som.c')) arm_common_ss.add(when: 'CONFIG_HIGHBANK', if_true: files('highbank.c')) -- 2.51.0 ^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PULL 18/23] hw/arm/virt: Build only once 2025-10-29 21:39 [PULL 00/23] Misc single binary patches for 2025-10-29 Philippe Mathieu-Daudé ` (16 preceding siblings ...) 2025-10-29 21:39 ` [PULL 17/23] hw/arm/virt-acpi-build: Build only once Philippe Mathieu-Daudé @ 2025-10-29 21:39 ` Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 19/23] hw/arm/meson: Move Xen files to arm_common_ss[] Philippe Mathieu-Daudé ` (5 subsequent siblings) 23 siblings, 0 replies; 26+ messages in thread From: Philippe Mathieu-Daudé @ 2025-10-29 21:39 UTC (permalink / raw) To: qemu-devel; +Cc: qemu-arm Previous commits removed the TARGET_AARCH64 uses in virt.c, we can now move it to arm_common_ss[] and build it once. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Acked-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20251021210934.60483-1-philmd@linaro.org> --- hw/arm/meson.build | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/arm/meson.build b/hw/arm/meson.build index df4c1be3b3b..9fbbbc9a6fe 100644 --- a/hw/arm/meson.build +++ b/hw/arm/meson.build @@ -1,6 +1,6 @@ arm_ss = ss.source_set() arm_common_ss = ss.source_set() -arm_ss.add(when: 'CONFIG_ARM_VIRT', if_true: files('virt.c')) +arm_common_ss.add(when: 'CONFIG_ARM_VIRT', if_true: files('virt.c')) arm_common_ss.add(when: 'CONFIG_ACPI', if_true: files('virt-acpi-build.c')) arm_common_ss.add(when: 'CONFIG_DIGIC', if_true: files('digic_boards.c')) arm_common_ss.add(when: 'CONFIG_EMCRAFT_SF2', if_true: files('msf2-som.c')) -- 2.51.0 ^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PULL 19/23] hw/arm/meson: Move Xen files to arm_common_ss[] 2025-10-29 21:39 [PULL 00/23] Misc single binary patches for 2025-10-29 Philippe Mathieu-Daudé ` (17 preceding siblings ...) 2025-10-29 21:39 ` [PULL 18/23] hw/arm/virt: " Philippe Mathieu-Daudé @ 2025-10-29 21:39 ` Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 20/23] hw/xen: Use BITS_PER_BYTE & MAKE_64BIT_MASK() in req_size_bits() Philippe Mathieu-Daudé ` (4 subsequent siblings) 23 siblings, 0 replies; 26+ messages in thread From: Philippe Mathieu-Daudé @ 2025-10-29 21:39 UTC (permalink / raw) To: qemu-devel; +Cc: qemu-arm Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Acked-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20251021210655.59278-1-philmd@linaro.org> --- hw/arm/meson.build | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/arm/meson.build b/hw/arm/meson.build index 9fbbbc9a6fe..61c66ee2d0b 100644 --- a/hw/arm/meson.build +++ b/hw/arm/meson.build @@ -65,7 +65,7 @@ arm_common_ss.add(when: 'CONFIG_FSL_IMX8MP_EVK', if_true: files('imx8mp-evk.c')) arm_common_ss.add(when: 'CONFIG_ARM_SMMUV3', if_true: files('smmuv3.c')) arm_common_ss.add(when: 'CONFIG_FSL_IMX6UL', if_true: files('fsl-imx6ul.c', 'mcimx6ul-evk.c')) arm_common_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_soc.c')) -arm_ss.add(when: 'CONFIG_XEN', if_true: files( +arm_common_ss.add(when: 'CONFIG_XEN', if_true: files( 'xen-stubs.c', 'xen-pvh.c', )) -- 2.51.0 ^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PULL 20/23] hw/xen: Use BITS_PER_BYTE & MAKE_64BIT_MASK() in req_size_bits() 2025-10-29 21:39 [PULL 00/23] Misc single binary patches for 2025-10-29 Philippe Mathieu-Daudé ` (18 preceding siblings ...) 2025-10-29 21:39 ` [PULL 19/23] hw/arm/meson: Move Xen files to arm_common_ss[] Philippe Mathieu-Daudé @ 2025-10-29 21:39 ` Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 21/23] hw/xen: Replace target_ulong by agnostic target_long_bits() Philippe Mathieu-Daudé ` (3 subsequent siblings) 23 siblings, 0 replies; 26+ messages in thread From: Philippe Mathieu-Daudé @ 2025-10-29 21:39 UTC (permalink / raw) To: qemu-devel; +Cc: qemu-arm Replace magic 8 by BITS_PER_BYTE, use MAKE_64BIT_MASK() instead of open coding it. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Message-Id: <20251022140114.72372-2-philmd@linaro.org> --- hw/xen/xen-hvm-common.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/hw/xen/xen-hvm-common.c b/hw/xen/xen-hvm-common.c index 52e2cce397a..258014370e1 100644 --- a/hw/xen/xen-hvm-common.c +++ b/hw/xen/xen-hvm-common.c @@ -1,5 +1,6 @@ #include "qemu/osdep.h" #include "qemu/units.h" +#include "qemu/bitops.h" #include "qemu/error-report.h" #include "qapi/error.h" #include "exec/target_long.h" @@ -448,12 +449,14 @@ static void cpu_ioreq_config(XenIOState *state, ioreq_t *req) static void handle_ioreq(XenIOState *state, ioreq_t *req) { + size_t req_size_bits = req->size * BITS_PER_BYTE; + trace_handle_ioreq(req, req->type, req->dir, req->df, req->data_is_ptr, req->addr, req->data, req->count, req->size); if (!req->data_is_ptr && (req->dir == IOREQ_WRITE) && (req->size < sizeof (target_ulong))) { - req->data &= ((target_ulong) 1 << (8 * req->size)) - 1; + req->data &= MAKE_64BIT_MASK(0, req_size_bits); } if (req->dir == IOREQ_WRITE) -- 2.51.0 ^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PULL 21/23] hw/xen: Replace target_ulong by agnostic target_long_bits() 2025-10-29 21:39 [PULL 00/23] Misc single binary patches for 2025-10-29 Philippe Mathieu-Daudé ` (19 preceding siblings ...) 2025-10-29 21:39 ` [PULL 20/23] hw/xen: Use BITS_PER_BYTE & MAKE_64BIT_MASK() in req_size_bits() Philippe Mathieu-Daudé @ 2025-10-29 21:39 ` Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 22/23] hw/xen: Build only once Philippe Mathieu-Daudé ` (2 subsequent siblings) 23 siblings, 0 replies; 26+ messages in thread From: Philippe Mathieu-Daudé @ 2025-10-29 21:39 UTC (permalink / raw) To: qemu-devel; +Cc: qemu-arm Both are equivalent: target_long_bits() sizeof(target_u?long) * BITS_PER_BYTE Prefer the former which is target-agnostic. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Message-Id: <20251022140114.72372-3-philmd@linaro.org> --- hw/xen/xen-hvm-common.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/xen/xen-hvm-common.c b/hw/xen/xen-hvm-common.c index 258014370e1..b40ae0b3af0 100644 --- a/hw/xen/xen-hvm-common.c +++ b/hw/xen/xen-hvm-common.c @@ -2,8 +2,8 @@ #include "qemu/units.h" #include "qemu/bitops.h" #include "qemu/error-report.h" +#include "qemu/target-info.h" #include "qapi/error.h" -#include "exec/target_long.h" #include "exec/target_page.h" #include "trace.h" @@ -455,7 +455,7 @@ static void handle_ioreq(XenIOState *state, ioreq_t *req) req->addr, req->data, req->count, req->size); if (!req->data_is_ptr && (req->dir == IOREQ_WRITE) && - (req->size < sizeof (target_ulong))) { + (req_size_bits < target_long_bits())) { req->data &= MAKE_64BIT_MASK(0, req_size_bits); } -- 2.51.0 ^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PULL 22/23] hw/xen: Build only once 2025-10-29 21:39 [PULL 00/23] Misc single binary patches for 2025-10-29 Philippe Mathieu-Daudé ` (20 preceding siblings ...) 2025-10-29 21:39 ` [PULL 21/23] hw/xen: Replace target_ulong by agnostic target_long_bits() Philippe Mathieu-Daudé @ 2025-10-29 21:39 ` Philippe Mathieu-Daudé 2025-10-29 21:40 ` [PULL 23/23] hw/riscv: Replace target_ulong uses Philippe Mathieu-Daudé 2025-10-30 10:04 ` [PULL 00/23] Misc single binary patches for 2025-10-29 Philippe Mathieu-Daudé 23 siblings, 0 replies; 26+ messages in thread From: Philippe Mathieu-Daudé @ 2025-10-29 21:39 UTC (permalink / raw) To: qemu-devel; +Cc: qemu-arm Now than hw/xen/ files don't use any target-specific code, we can build all file units once, removing the need for the xen_specific_ss[] source set. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Message-Id: <20251022140114.72372-4-philmd@linaro.org> --- hw/xen/meson.build | 22 +++++++++------------- 1 file changed, 9 insertions(+), 13 deletions(-) diff --git a/hw/xen/meson.build b/hw/xen/meson.build index a1850e76988..dcd2b7e1df3 100644 --- a/hw/xen/meson.build +++ b/hw/xen/meson.build @@ -7,21 +7,16 @@ system_ss.add(when: ['CONFIG_XEN_BUS'], if_true: files( 'xen_pvdev.c', )) -system_ss.add(when: ['CONFIG_XEN', xen], if_true: files( - 'xen-operations.c', -), -if_false: files( - 'xen_stubs.c', -)) - -xen_specific_ss = ss.source_set() -xen_specific_ss.add(files( - 'xen-mapcache.c', +xen_common_ss = ss.source_set() +xen_common_ss.add(files( 'xen-hvm-common.c', + 'xen-mapcache.c', + 'xen-operations.c', 'xen-pvh-common.c', )) + if have_xen_pci_passthrough - xen_specific_ss.add(files( + xen_common_ss.add(files( 'xen-host-pci-device.c', 'xen_pt.c', 'xen_pt_config_init.c', @@ -30,7 +25,8 @@ if have_xen_pci_passthrough 'xen_pt_msi.c', )) else - xen_specific_ss.add(files('xen_pt_stub.c')) + xen_common_ss.add(files('xen_pt_stub.c')) endif -specific_ss.add_all(when: ['CONFIG_XEN', xen], if_true: xen_specific_ss) +system_ss.add_all(when: ['CONFIG_XEN', xen], if_true: xen_common_ss) +system_ss.add(when: ['CONFIG_XEN', xen], if_false: files('xen_stubs.c')) -- 2.51.0 ^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PULL 23/23] hw/riscv: Replace target_ulong uses 2025-10-29 21:39 [PULL 00/23] Misc single binary patches for 2025-10-29 Philippe Mathieu-Daudé ` (21 preceding siblings ...) 2025-10-29 21:39 ` [PULL 22/23] hw/xen: Build only once Philippe Mathieu-Daudé @ 2025-10-29 21:40 ` Philippe Mathieu-Daudé 2025-10-30 10:04 ` [PULL 00/23] Misc single binary patches for 2025-10-29 Philippe Mathieu-Daudé 23 siblings, 0 replies; 26+ messages in thread From: Philippe Mathieu-Daudé @ 2025-10-29 21:40 UTC (permalink / raw) To: qemu-devel; +Cc: qemu-arm From: Anton Johansson <anjo@rev.ng> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Anton Johansson <anjo@rev.ng> Message-ID: <20251027-feature-single-binary-hw-v1-v2-2-44478d589ae9@rev.ng> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> --- hw/riscv/riscv-iommu.c | 6 ++++-- hw/riscv/riscv_hart.c | 2 +- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/hw/riscv/riscv-iommu.c b/hw/riscv/riscv-iommu.c index b33c7fe3259..f8656ec04b1 100644 --- a/hw/riscv/riscv-iommu.c +++ b/hw/riscv/riscv-iommu.c @@ -26,6 +26,8 @@ #include "migration/vmstate.h" #include "qapi/error.h" #include "qemu/timer.h" +#include "qemu/target-info.h" +#include "qemu/bitops.h" #include "cpu_bits.h" #include "riscv-iommu.h" @@ -391,9 +393,9 @@ static int riscv_iommu_spa_fetch(RISCVIOMMUState *s, RISCVIOMMUContext *ctx, const uint64_t va_mask = (1ULL << va_len) - 1; if (pass == S_STAGE && va_len > 32) { - target_ulong mask, masked_msbs; + uint64_t mask, masked_msbs; - mask = (1L << (TARGET_LONG_BITS - (va_len - 1))) - 1; + mask = MAKE_64BIT_MASK(0, target_long_bits() - va_len + 1); masked_msbs = (addr >> (va_len - 1)) & mask; if (masked_msbs != 0 && masked_msbs != mask) { diff --git a/hw/riscv/riscv_hart.c b/hw/riscv/riscv_hart.c index 4d51a93dd52..33cbc9873e6 100644 --- a/hw/riscv/riscv_hart.c +++ b/hw/riscv/riscv_hart.c @@ -94,7 +94,7 @@ static bool csr_qtest_callback(CharFrontend *chr, gchar **words) g_assert(rc == 0); csr_call(words[1], cpu, csr, &val); - qtest_sendf(chr, "OK 0 "TARGET_FMT_lx"\n", (target_ulong)val); + qtest_sendf(chr, "OK 0 %"PRIx64"\n", val); return true; } -- 2.51.0 ^ permalink raw reply related [flat|nested] 26+ messages in thread
* Re: [PULL 00/23] Misc single binary patches for 2025-10-29 2025-10-29 21:39 [PULL 00/23] Misc single binary patches for 2025-10-29 Philippe Mathieu-Daudé ` (22 preceding siblings ...) 2025-10-29 21:40 ` [PULL 23/23] hw/riscv: Replace target_ulong uses Philippe Mathieu-Daudé @ 2025-10-30 10:04 ` Philippe Mathieu-Daudé 2025-10-30 13:44 ` Philippe Mathieu-Daudé 23 siblings, 1 reply; 26+ messages in thread From: Philippe Mathieu-Daudé @ 2025-10-30 10:04 UTC (permalink / raw) To: qemu-devel; +Cc: qemu-arm On 29/10/25 22:39, Philippe Mathieu-Daudé wrote: > The following changes since commit e090e0312dc9030d94e38e3d98a88718d3561e4e: > > Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into staging (2025-10-29 10:44:15 +0100) > > are available in the Git repository at: > > https://github.com/philmd/qemu.git tags/single-binary-20251029 > > for you to fetch changes up to e5c542fa16b0a7d47070692481db301736a0ac7b: > > hw/riscv: Replace target_ulong uses (2025-10-29 19:16:24 +0100) > > ---------------------------------------------------------------- > Various patches related to single binary work: > > - Make hw/arm/ common by adding a QOM type to machines to > tag in which binary (32 or 64-bit) they can be used. > Convert the Virt and SBSA-Ref machines. > - Build Xen files once > > ---------------------------------------------------------------- I'm seeing a failure on mainstream pipeline: https://gitlab.com/qemu-project/qemu/-/jobs/11906335084 ▶ 5/68 test_bpim2u.BananaPiMachine.test_arm_bpim2u FAIL ▶ 5/68 test_bpim2u.BananaPiMachine.test_arm_bpim2u_gmac FAIL ▶ 5/68 test_bpim2u.BananaPiMachine.test_arm_bpim2u_initrd FAIL which I failed to notice locally in part because Darwin LLVM 'ar' doesn't not work like the GNU equivalent: $ pyvenv/bin/meson test --print-errorlogs --setup thorough func-arm-bpim2u ninja: Entering directory `/build' [1301/1301] Generating qemu-system-arm with a custom command ▶ 1/1 test_bpim2u.BananaPiMachine.test_arm_bpim2u FAIL ▶ 1/1 test_bpim2u.BananaPiMachine.test_arm_bpim2u_gmac FAIL ▶ 1/1 test_bpim2u.BananaPiMachine.test_arm_bpim2u_initrd FAIL 1/1 qemu:func-thorough+func-arm-thorough+thorough / func-arm-bpim2u ERROR 1.24s exit status 1 ―――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――― ✀ ―――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――― stderr: Traceback (most recent call last): File "/src/qemu/tests/functional/arm/test_bpim2u.py", line 41, in test_arm_bpim2u kernel_path = self.archive_extract( self.ASSET_DEB, member='boot/vmlinuz-6.6.16-current-sunxi') File "/src/qemu/tests/functional/qemu_test/testcase.py", line 83, in archive_extract archive_extract(archive, self.scratch_file(), format, member) ~~~~~~~~~~~~~~~^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ File "/src/qemu/tests/functional/qemu_test/archive.py", line 92, in archive_extract deb_extract(archive, dest_dir, "./" + member) ~~~~~~~~~~~^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ File "/src/qemu/tests/functional/qemu_test/archive.py", line 57, in deb_extract check_call(['ar', 'x', archive, file_path], ~~~~~~~~~~^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ stdout=DEVNULL, stderr=DEVNULL) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ File "/opt/homebrew/Cellar/python@3.13/3.13.7/Frameworks/Python.framework/Versions/3.13/lib/python3.13/subprocess.py", line 419, in check_call raise CalledProcessError(retcode, cmd) subprocess.CalledProcessError: Command '['ar', 'x', '~/.cache/qemu/download/3d968c15b121ede871dce49d13ee7644d6f74b6b121b84c9a40f51b0c80d6d22', 'data.tar.xz/']' returned non-zero exit status 1. Traceback (most recent call last): File "/src/qemu/tests/functional/arm/test_bpim2u.py", line 98, in test_arm_bpim2u_gmac kernel_path = self.archive_extract( self.ASSET_DEB, member='boot/vmlinuz-6.6.16-current-sunxi') File "/src/qemu/tests/functional/qemu_test/testcase.py", line 83, in archive_extract archive_extract(archive, self.scratch_file(), format, member) ~~~~~~~~~~~~~~~^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ File "/src/qemu/tests/functional/qemu_test/archive.py", line 92, in archive_extract deb_extract(archive, dest_dir, "./" + member) ~~~~~~~~~~~^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ File "/src/qemu/tests/functional/qemu_test/archive.py", line 57, in deb_extract check_call(['ar', 'x', archive, file_path], ~~~~~~~~~~^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ stdout=DEVNULL, stderr=DEVNULL) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ File "/opt/homebrew/Cellar/python@3.13/3.13.7/Frameworks/Python.framework/Versions/3.13/lib/python3.13/subprocess.py", line 419, in check_call raise CalledProcessError(retcode, cmd) subprocess.CalledProcessError: Command '['ar', 'x', '~/.cache/qemu/download/3d968c15b121ede871dce49d13ee7644d6f74b6b121b84c9a40f51b0c80d6d22', 'data.tar.xz/']' returned non-zero exit status 1. Traceback (most recent call last): File "/src/qemu/tests/functional/arm/test_bpim2u.py", line 62, in test_arm_bpim2u_initrd kernel_path = self.archive_extract( self.ASSET_DEB, member='boot/vmlinuz-6.6.16-current-sunxi') File "/src/qemu/tests/functional/qemu_test/testcase.py", line 83, in archive_extract archive_extract(archive, self.scratch_file(), format, member) ~~~~~~~~~~~~~~~^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ File "/src/qemu/tests/functional/qemu_test/archive.py", line 92, in archive_extract deb_extract(archive, dest_dir, "./" + member) ~~~~~~~~~~~^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ File "/src/qemu/tests/functional/qemu_test/archive.py", line 57, in deb_extract check_call(['ar', 'x', archive, file_path], ~~~~~~~~~~^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ stdout=DEVNULL, stderr=DEVNULL) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ File "/opt/homebrew/Cellar/python@3.13/3.13.7/Frameworks/Python.framework/Versions/3.13/lib/python3.13/subprocess.py", line 419, in check_call raise CalledProcessError(retcode, cmd) subprocess.CalledProcessError: Command '['ar', 'x', '~/.cache/qemu/download/3d968c15b121ede871dce49d13ee7644d6f74b6b121b84c9a40f51b0c80d6d22', 'data.tar.xz/']' returned non-zero exit status 1. ^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PULL 00/23] Misc single binary patches for 2025-10-29 2025-10-30 10:04 ` [PULL 00/23] Misc single binary patches for 2025-10-29 Philippe Mathieu-Daudé @ 2025-10-30 13:44 ` Philippe Mathieu-Daudé 0 siblings, 0 replies; 26+ messages in thread From: Philippe Mathieu-Daudé @ 2025-10-30 13:44 UTC (permalink / raw) To: qemu-devel; +Cc: qemu-arm On 30/10/25 11:04, Philippe Mathieu-Daudé wrote: > On 29/10/25 22:39, Philippe Mathieu-Daudé wrote: >> The following changes since commit >> e090e0312dc9030d94e38e3d98a88718d3561e4e: >> >> Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu >> into staging (2025-10-29 10:44:15 +0100) >> >> are available in the Git repository at: >> >> https://github.com/philmd/qemu.git tags/single-binary-20251029 >> >> for you to fetch changes up to e5c542fa16b0a7d47070692481db301736a0ac7b: >> >> hw/riscv: Replace target_ulong uses (2025-10-29 19:16:24 +0100) >> >> ---------------------------------------------------------------- >> Various patches related to single binary work: >> >> - Make hw/arm/ common by adding a QOM type to machines to >> tag in which binary (32 or 64-bit) they can be used. >> Convert the Virt and SBSA-Ref machines. >> - Build Xen files once >> >> ---------------------------------------------------------------- > > I'm seeing a failure on mainstream pipeline: > > https://gitlab.com/qemu-project/qemu/-/jobs/11906335084 > ▶ 5/68 test_bpim2u.BananaPiMachine.test_arm_bpim2u FAIL > ▶ 5/68 test_bpim2u.BananaPiMachine.test_arm_bpim2u_gmac > FAIL > ▶ 5/68 test_bpim2u.BananaPiMachine.test_arm_bpim2u_initrd > FAIL Thanksfully the fix is very easy, since this is likely due to a typo: --- diff --git a/hw/arm/bananapi_m2u.c b/hw/arm/bananapi_m2u.c index b5070b46666..0f6d98684b9 100644 --- a/hw/arm/bananapi_m2u.c +++ b/hw/arm/bananapi_m2u.c @@ -148 +148 @@ static void bpim2u_machine_init(MachineClass *mc) -DEFINE_MACHINE_ARM("bpim2u-pdk", bpim2u_machine_init) +DEFINE_MACHINE_ARM("bpim2u", bpim2u_machine_init) --- ^ permalink raw reply related [flat|nested] 26+ messages in thread
end of thread, other threads:[~2025-10-30 13:45 UTC | newest] Thread overview: 26+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2025-10-29 21:39 [PULL 00/23] Misc single binary patches for 2025-10-29 Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 01/23] hw/arm: Register TYPE_TARGET_ARM/AARCH64_MACHINE QOM interfaces Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 02/23] hw/core: Allow ARM/Aarch64 binaries to use the 'none' machine Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 03/23] hw/arm: Add DEFINE_MACHINE_ARM() / DEFINE_MACHINE_AARCH64() macros Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 04/23] hw/arm: Filter machine types for qemu-system-arm/aarch64 binaries Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 05/23] meson: Prepare to accept per-binary TargetInfo structure implementation Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 06/23] config/target: Implement per-binary TargetInfo structure (ARM, AARCH64) Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 07/23] hw/arm/virt: Register valid CPU types dynamically Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 08/23] hw/arm/virt: Check accelerator availability at runtime Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 09/23] qemu/target_info: Add target_arm() helper Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 10/23] qemu/target_info: Add target_aarch64() helper Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 11/23] qemu/target_info: Add target_base_arm() helper Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 12/23] hw/arm/virt: Replace TARGET_AARCH64 -> target_aarch64() Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 13/23] hw/arm/virt: Get default CPU type at runtime Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 14/23] hw/arm/sbsa-ref: Include missing 'cpu.h' header Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 15/23] hw/arm/sbsa-ref: Build only once Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 16/23] hw/arm/virt-acpi-build: Include missing 'cpu.h' header Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 17/23] hw/arm/virt-acpi-build: Build only once Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 18/23] hw/arm/virt: " Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 19/23] hw/arm/meson: Move Xen files to arm_common_ss[] Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 20/23] hw/xen: Use BITS_PER_BYTE & MAKE_64BIT_MASK() in req_size_bits() Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 21/23] hw/xen: Replace target_ulong by agnostic target_long_bits() Philippe Mathieu-Daudé 2025-10-29 21:39 ` [PULL 22/23] hw/xen: Build only once Philippe Mathieu-Daudé 2025-10-29 21:40 ` [PULL 23/23] hw/riscv: Replace target_ulong uses Philippe Mathieu-Daudé 2025-10-30 10:04 ` [PULL 00/23] Misc single binary patches for 2025-10-29 Philippe Mathieu-Daudé 2025-10-30 13:44 ` Philippe Mathieu-Daudé
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