From: Richard Henderson <richard.henderson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org
Subject: Re: [PATCH v5 20/20] target/arm: Add cpu properties for enabling FEAT_RME
Date: Tue, 20 Jun 2023 16:03:24 +0200 [thread overview]
Message-ID: <d97d14f9-692f-8701-5637-d4566ea0075f@linaro.org> (raw)
In-Reply-To: <CAFEAcA-MpN2kM3c4F=ihSEgetSQJVd0T9-BTUakTu=CAc+4HTQ@mail.gmail.com>
On 6/20/23 15:52, Peter Maydell wrote:
> On Tue, 20 Jun 2023 at 13:46, Richard Henderson
> <richard.henderson@linaro.org> wrote:
>>
>> Add an x-rme cpu property to enable FEAT_RME.
>> Add an x-l0gptsz property to set GPCCR_EL3.L0GPTSZ,
>> for testing various possible configurations.
>
> Looks OK to me, but I think we should document these
> (including that they're experimental and future syntax for
> enabling RME will change) in the "TCG VCPU Features"
> section of docs/system/arm/cpu-features.rst.
>
> We could mention in the commit message here why we're
> making them experimental x- properties too.
Yes, of course.
r~
next prev parent reply other threads:[~2023-06-20 14:04 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-20 12:43 [PATCH v5 00/20] target/arm: Implement FEAT_RME Richard Henderson
2023-06-20 12:43 ` [PATCH v5 01/20] target/arm: Add isar_feature_aa64_rme Richard Henderson
2023-06-20 12:44 ` [PATCH v5 02/20] target/arm: Update SCR and HCR for RME Richard Henderson
2023-06-20 12:44 ` [PATCH v5 03/20] target/arm: SCR_EL3.NS may be RES1 Richard Henderson
2023-06-20 12:44 ` [PATCH v5 04/20] target/arm: Add RME cpregs Richard Henderson
2023-06-20 12:44 ` [PATCH v5 05/20] target/arm: Introduce ARMSecuritySpace Richard Henderson
2023-06-20 12:44 ` [PATCH v5 06/20] include/exec/memattrs: Add two bits of space to MemTxAttrs Richard Henderson
2023-06-20 12:44 ` [PATCH v5 07/20] target/arm: Adjust the order of Phys and Stage2 ARMMMUIdx Richard Henderson
2023-06-20 12:44 ` [PATCH v5 08/20] target/arm: Introduce ARMMMUIdx_Phys_{Realm,Root} Richard Henderson
2023-06-20 12:44 ` [PATCH v5 09/20] target/arm: Remove __attribute__((nonnull)) from ptw.c Richard Henderson
2023-06-20 12:44 ` [PATCH v5 10/20] target/arm: Pipe ARMSecuritySpace through ptw.c Richard Henderson
2023-06-20 12:44 ` [PATCH v5 11/20] target/arm: NSTable is RES0 for the RME EL3 regime Richard Henderson
2023-06-20 12:44 ` [PATCH v5 12/20] target/arm: Handle Block and Page bits for security space Richard Henderson
2023-06-20 12:44 ` [PATCH v5 13/20] target/arm: Handle no-execute for Realm and Root regimes Richard Henderson
2023-06-20 12:44 ` [PATCH v5 14/20] target/arm: Use get_phys_addr_with_struct in S1_ptw_translate Richard Henderson
2023-06-20 12:44 ` [PATCH v5 15/20] target/arm: Move s1_is_el0 into S1Translate Richard Henderson
2023-06-20 12:44 ` [PATCH v5 16/20] target/arm: Use get_phys_addr_with_struct for stage2 Richard Henderson
2023-06-20 12:44 ` [PATCH v5 17/20] target/arm: Add GPC syndrome Richard Henderson
2023-06-20 12:44 ` [PATCH v5 18/20] target/arm: Implement GPC exceptions Richard Henderson
2023-06-20 12:44 ` [PATCH v5 19/20] target/arm: Implement the granule protection check Richard Henderson
2023-06-20 12:44 ` [PATCH v5 20/20] target/arm: Add cpu properties for enabling FEAT_RME Richard Henderson
2023-06-20 13:52 ` Peter Maydell
2023-06-20 14:03 ` Richard Henderson [this message]
2023-06-20 15:57 ` [PATCH v5 00/20] target/arm: Implement FEAT_RME Peter Maydell
2023-06-20 16:28 ` Richard Henderson
2023-06-20 16:41 ` Peter Maydell
2023-06-22 12:45 ` Peter Maydell
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