From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58420) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ejtDQ-000255-U5 for qemu-devel@nongnu.org; Thu, 08 Feb 2018 15:54:45 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ejtDM-0000PH-9S for qemu-devel@nongnu.org; Thu, 08 Feb 2018 15:54:45 -0500 Received: from mail-it0-x244.google.com ([2607:f8b0:4001:c0b::244]:39742) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1ejtDM-0000P3-4W for qemu-devel@nongnu.org; Thu, 08 Feb 2018 15:54:40 -0500 Received: by mail-it0-x244.google.com with SMTP id c80so8041541itb.4 for ; Thu, 08 Feb 2018 12:54:39 -0800 (PST) References: <20180208173157.24705-1-alex.bennee@linaro.org> <20180208173157.24705-12-alex.bennee@linaro.org> From: Richard Henderson Message-ID: Date: Thu, 8 Feb 2018 12:54:36 -0800 MIME-Version: 1.0 In-Reply-To: <20180208173157.24705-12-alex.bennee@linaro.org> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PATCH v2 11/32] arm/translate-a64: add FP16 F[A]C[EQ/GE/GT] to simd_three_reg_same_fp16 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?UTF-8?Q?Alex_Benn=c3=a9e?= , qemu-arm@nongnu.org Cc: Peter Maydell , qemu-devel@nongnu.org On 02/08/2018 09:31 AM, Alex Bennée wrote: > Signed-off-by: Alex Bennée > --- > target/arm/helper-a64.c | 49 ++++++++++++++++++++++++++++++++++++++++++++++ > target/arm/helper-a64.h | 5 +++++ > target/arm/translate-a64.c | 15 ++++++++++++++ > 3 files changed, 69 insertions(+) > > diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c > index 25e45121af..78eeda31d1 100644 > --- a/target/arm/helper-a64.c > +++ b/target/arm/helper-a64.c > @@ -599,3 +599,52 @@ ADVSIMD_HALFOP(min) > ADVSIMD_HALFOP(max) > ADVSIMD_HALFOP(minnum) > ADVSIMD_HALFOP(maxnum) > + > +/* > + * Floating point comparisons produce an integer result. Softfloat > + * routines return float_relation types which we convert to the 0/-1 > + * Neon requires. > + */ > + > +#define ADVSIMD_CMPRES(test) (test) ? 0xffff : 0 > + > +uint32_t HELPER(advsimd_ceq_f16)(float16 a, float16 b, void *fpstp) > +{ > + float_status *fpst = fpstp; > + int compare = float16_compare_quiet(a, b, fpst); > + return ADVSIMD_CMPRES(compare == float_relation_equal); Not using float16_eq etc? > +} > + > +uint32_t HELPER(advsimd_cge_f16)(float16 a, float16 b, void *fpstp) > +{ > + float_status *fpst = fpstp; > + int compare = float16_compare(a, b, fpst); > + return ADVSIMD_CMPRES(compare == float_relation_greater || > + compare == float_relation_equal); Especially float16_le(b, a, fpst). Otherwise, Reviewed-by: Richard Henderson r~