From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.33) id 1CjcPj-0007Bg-U7 for qemu-devel@nongnu.org; Wed, 29 Dec 2004 06:54:52 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.33) id 1CjcPj-0007BA-8u for qemu-devel@nongnu.org; Wed, 29 Dec 2004 06:54:51 -0500 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.33) id 1CjcPj-0007Ap-6S for qemu-devel@nongnu.org; Wed, 29 Dec 2004 06:54:51 -0500 Received: from [64.233.184.195] (helo=wproxy.gmail.com) by monty-python.gnu.org with esmtp (Exim 4.34) id 1CjcEb-0001Jw-2a for qemu-devel@nongnu.org; Wed, 29 Dec 2004 06:43:21 -0500 Received: by wproxy.gmail.com with SMTP id 71so628203wra for ; Wed, 29 Dec 2004 03:43:20 -0800 (PST) Message-ID: Date: Wed, 29 Dec 2004 12:43:20 +0100 From: Piotras Subject: Re: [Qemu-devel] [PATCH] CONFIG_MMU_MAP powerpc host support In-Reply-To: <4439AAC8-58C2-11D9-9E31-000A2796D230@free.fr> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit References: <9D2757F0-5608-11D9-B8FF-00039307264A@stanfordalumni.org> <200412251348.iBPDmcF8014321@sakura.ninth-nine.com> <48E4DAC2-5821-11D9-B8FF-00039307264A@cs.stanford.edu> <139B2CD6-5850-11D9-96FA-000A2796D230@free.fr> <1364B7A7-58B1-11D9-B7BC-000A958E35DC@axiros.com> <8A6CC513-58B6-11D9-9E31-000A2796D230@free.fr> <4439AAC8-58C2-11D9-9E31-000A2796D230@free.fr> Reply-To: Piotras , qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Pierre d'Herbemont Cc: qemu-devel@nongnu.org Hi! The problem can be avoided by replacing some of asm with C. The gcc seems to generate equally-efficient code in this case. I don't have a ppc machine to test it, but something like this may work: RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(void *ptr) { target_ulong addr; register target_phys_addr_t add asm ("r3"); RES_TYPE val; addr = (target_ulong)ptr; add = env->mmu_map[CPU_MEM_INDEX].add_read[addr >> TARGET_PAGE_BITS]; asm volatile ( #if (DATA_SIZE == 1) "lbzx %0, %1, %2\n" #elif (DATA_SIZE == 2) && defined(BSWAP_NEEDED) "lhbrx %0, %1, %2\n" #elif (DATA_SIZE == 2) "lhzx %0, %1, %2\n" #elif (DATA_SIZE == 4) && defined(BSWAP_NEEDED) "lwbrx %0, %1, %2\n" #elif (DATA_SIZE == 4) "lwzx %0, %1, %2\n" #else #error unsupported size #endif : "=r" (val) : "r" (addr), "r" (add) : "memory"); return val; } You will have to modify lds and st as well (make sure to replace "add_read" with "add_write" for st). It is critical to use a specific register as %2 (Magnus decided to use r3). Regards, Piotrek On Tue, 28 Dec 2004 12:18:57 +0100, Pierre d'Herbemont wrote: > > [...] > > > Actually I'm a bit unsure about the displacement syntax but > > I know that register names are accepted by GNU binutils and > > cctools because I've written quite a lot of AltiVec code > > which works on both Linux and MacOSX without any tricks. > > Hum, seems to be a good trick... Google search returns the "-mregnames" > option. But it seems that it doesn't deal with ha16() or lo16(), so > we'll have to deal with it. However I think it is still better than > duplicating the PowerPC code. > > Pierre.