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([2a01:e0a:f0e:9070:527b:9dff:feef:3874]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-475dd48942dsm190938325e9.4.2025.10.28.03.31.32 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 28 Oct 2025 03:31:34 -0700 (PDT) Message-ID: Date: Tue, 28 Oct 2025 11:31:32 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 27/27] hw.arm/smmuv3: Add support for PASID enable Content-Language: en-US To: Shameer Kolothum , "qemu-arm@nongnu.org" , "qemu-devel@nongnu.org" Cc: "peter.maydell@linaro.org" , Jason Gunthorpe , Nicolin Chen , "ddutile@redhat.com" , "berrange@redhat.com" , Nathan Chen , Matt Ochs , "smostafa@google.com" , "wangzhou1@hisilicon.com" , "jiangkunkun@huawei.com" , "jonathan.cameron@huawei.com" , "zhangfei.gao@linaro.org" , "zhenzhong.duan@intel.com" , "yi.l.liu@intel.com" , "shameerkolothum@gmail.com" References: <20250929133643.38961-1-skolothumtho@nvidia.com> <20250929133643.38961-28-skolothumtho@nvidia.com> From: Eric Auger In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.133.124; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: eric.auger@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi Shameer, On 10/27/25 7:40 PM, Shameer Kolothum wrote: > Hi Eric, > >> -----Original Message----- >> From: Eric Auger >> Sent: 27 October 2025 18:15 >> To: Shameer Kolothum ; qemu- >> arm@nongnu.org; qemu-devel@nongnu.org >> Cc: peter.maydell@linaro.org; Jason Gunthorpe ; Nicolin >> Chen ; ddutile@redhat.com; berrange@redhat.com; >> Nathan Chen ; Matt Ochs ; >> smostafa@google.com; wangzhou1@hisilicon.com; >> jiangkunkun@huawei.com; jonathan.cameron@huawei.com; >> zhangfei.gao@linaro.org; zhenzhong.duan@intel.com; yi.l.liu@intel.com; >> shameerkolothum@gmail.com >> Subject: Re: [PATCH v4 27/27] hw.arm/smmuv3: Add support for PASID >> enable >> >> External email: Use caution opening links or attachments >> >> >> Hi Shameer, > [..] > >>> - if (STE_S1CDMAX(ste) != 0) { >>> + /* If pasid enabled, we report SSIDSIZE = 16 */ >> why do we chose 16 and not a bigger value to avoid incompatibility? >> worth a comment > I am not sure what a good value here to support most hardware out there. > If we select a bigger value, anything less can't be supported. ah yes you're right, that's the opposite. this is aligned with sid size anyway so let's keep it as is. > >>> + if (!FIELD_EX32(s->idr[1], IDR1, SSIDSIZE) && STE_S1CDMAX(ste) != >>> + 0) { >>> qemu_log_mask(LOG_UNIMP, >>> "SMMUv3 does not support multiple context descriptors >> yet\n"); >>> goto bad_ste; >>> @@ -1962,6 +1963,10 @@ static bool >> smmu_validate_property(SMMUv3State *s, Error **errp) >>> error_setg(errp, "oas can only be set to 44 bits if accel=off"); >>> return false; >>> } >>> + if (s->pasid) { >>> + error_setg(errp, "pasid can only be enabled if accel=on"); >>> + return false; >>> + } >>> return true; >>> } >> Just skimming though the SMMU spec, I don't see any handling for STE.S1DSS >> anywhere Also I would expect some C_BAD_SUBSTREAMID likely to be >> emitted? > S1DSS is passed down to host kernel during S1 translate HWPT install. And if > anything is mis configured w.r.t CD by Guest, the host SMMUv3 will generate > the events. OK > > Do we need to check S1DSS in here? about C_BAD_SUBSTREAMID it is likely to be returned through events by the host. I see it handled in smmuv3_record_event() so maybe that's enough with accel. Eric > > Thanks, > Shameer >