From: Richard Henderson <richard.henderson@linaro.org>
To: Max Chou <max.chou@sifive.com>,
qemu-devel@nongnu.org, qemu-riscv@nongnu.org
Cc: dbarboza@ventanamicro.com, Riku Voipio <riku.voipio@iki.fi>,
Paolo Bonzini <pbonzini@redhat.com>
Subject: Re: [RFC PATCH 5/6] accel/tcg: Inline do_ld1_mmu function
Date: Thu, 15 Feb 2024 10:12:04 -1000 [thread overview]
Message-ID: <dab5685c-8051-44b6-92c6-a52df9c57eb8@linaro.org> (raw)
In-Reply-To: <20240215192823.729209-6-max.chou@sifive.com>
On 2/15/24 09:28, Max Chou wrote:
> Signed-off-by: Max Chou <max.chou@sifive.com>
> ---
> accel/tcg/user-exec.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
> index c5453810eee..803c271df11 100644
> --- a/accel/tcg/user-exec.c
> +++ b/accel/tcg/user-exec.c
> @@ -963,8 +963,9 @@ static inline QEMU_ALWAYS_INLINE void *cpu_mmu_lookup(CPUState *cpu,
>
> #include "ldst_atomicity.c.inc"
>
> -static uint8_t do_ld1_mmu(CPUState *cpu, vaddr addr, MemOpIdx oi,
> - uintptr_t ra, MMUAccessType access_type)
> +static inline QEMU_ALWAYS_INLINE uint8_t do_ld1_mmu(CPUState *cpu, vaddr addr,
> + MemOpIdx oi, uintptr_t ra,
> + MMUAccessType access_type)
> {
> void *haddr;
> uint8_t ret;
I expect the small functions that use this to tail-call into this common function. I do
not believe that inlining helps. Same with do_st1_mmu.
r~
next prev parent reply other threads:[~2024-02-15 20:12 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-15 19:28 [RFC PATCH 0/6] Improve the performance of RISC-V vector unit-stride ld/st instructions Max Chou
2024-02-15 19:28 ` [RFC PATCH 1/6] target/riscv: Seperate vector segment " Max Chou
2024-02-15 19:28 ` [RFC PATCH 2/6] accel/tcg: Avoid uncessary call overhead from qemu_plugin_vcpu_mem_cb Max Chou
2024-02-15 20:03 ` Richard Henderson
2024-02-17 9:08 ` Max Chou
2024-02-15 20:21 ` Daniel Henrique Barboza
2024-02-17 9:45 ` Max Chou
2024-02-15 19:28 ` [RFC PATCH 3/6] target/riscv: Inline vext_ldst_us and coressponding function for performance Max Chou
2024-02-15 20:09 ` Richard Henderson
2024-02-15 21:11 ` Daniel Henrique Barboza
2024-02-17 10:10 ` Max Chou
2024-02-15 19:28 ` [RFC PATCH 4/6] accel/tcg: Inline cpu_mmu_lookup function Max Chou
2024-02-15 20:10 ` Richard Henderson
2024-02-17 17:27 ` Max Chou
2024-02-15 19:28 ` [RFC PATCH 5/6] accel/tcg: Inline do_ld1_mmu function Max Chou
2024-02-15 20:12 ` Richard Henderson [this message]
2024-02-15 19:28 ` [RFC PATCH 6/6] accel/tcg: Inline do_st1_mmu function Max Chou
2024-02-15 20:24 ` [RFC PATCH 0/6] Improve the performance of RISC-V vector unit-stride ld/st instructions Richard Henderson
2024-02-17 9:52 ` Max Chou
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