qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Richard Henderson <richard.henderson@linaro.org>
To: Daniel Henrique Barboza <dbarboza@ventanamicro.com>,
	Max Chou <max.chou@sifive.com>,
	qemu-devel@nongnu.org, qemu-riscv@nongnu.org
Subject: Re: [PATCH v4 08/17] tcg: Fix temporary variable in tcg_gen_gvec_andcs
Date: Fri, 23 Jun 2023 08:51:18 +0200	[thread overview]
Message-ID: <dace2217-77a3-09c4-4541-e19b0bee9fc7@linaro.org> (raw)
In-Reply-To: <684ca7f1-c4f4-70f8-b92d-34b0d3336646@ventanamicro.com>

On 6/22/23 19:30, Daniel Henrique Barboza wrote:
> 
> 
> On 6/22/23 13:16, Max Chou wrote:
>> The 5th parameter of tcg_gen_gvec_2s should be replaces by the temporary
> 
> s/replaces/replaced
> 
> 
>> tmp variable in the tcg_gen_gvec_andcs function.
>>
>> Signed-off-by: Max Chou <max.chou@sifive.com>
>> ---
> 
> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>

Queued to tcg-next with the typo fixed.


r~

> 
>>   tcg/tcg-op-gvec.c | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/tcg/tcg-op-gvec.c b/tcg/tcg-op-gvec.c
>> index 95a588d6d2..a062239804 100644
>> --- a/tcg/tcg-op-gvec.c
>> +++ b/tcg/tcg-op-gvec.c
>> @@ -2774,7 +2774,7 @@ void tcg_gen_gvec_andcs(unsigned vece, uint32_t dofs, uint32_t aofs,
>>       TCGv_i64 tmp = tcg_temp_ebb_new_i64();
>>       tcg_gen_dup_i64(vece, tmp, c);
>> -    tcg_gen_gvec_2s(dofs, aofs, oprsz, maxsz, c, &g);
>> +    tcg_gen_gvec_2s(dofs, aofs, oprsz, maxsz, tmp, &g);
>>       tcg_temp_free_i64(tmp);
>>   }



  reply	other threads:[~2023-06-23  6:52 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-22 16:16 [PATCH v4 00/17] Add RISC-V vector cryptographic instruction set support Max Chou
2023-06-22 16:16 ` [PATCH v4 01/17] target/riscv: Refactor some of the generic vector functionality Max Chou
2023-06-22 16:16 ` [PATCH v4 02/17] target/riscv: Refactor vector-vector translation macro Max Chou
2023-06-22 16:16 ` [PATCH v4 03/17] target/riscv: Remove redundant "cpu_vl == 0" checks Max Chou
2023-06-22 16:16 ` [PATCH v4 04/17] target/riscv: Add Zvbc ISA extension support Max Chou
2023-06-22 16:16 ` [PATCH v4 05/17] target/riscv: Move vector translation checks Max Chou
2023-06-22 16:16 ` [PATCH v4 06/17] target/riscv: Refactor translation of vector-widening instruction Max Chou
2023-06-22 16:16 ` [PATCH v4 07/17] target/riscv: Refactor some of the generic vector functionality Max Chou
2023-06-22 16:16 ` [PATCH v4 08/17] tcg: Fix temporary variable in tcg_gen_gvec_andcs Max Chou
2023-06-22 17:30   ` Daniel Henrique Barboza
2023-06-23  6:51     ` Richard Henderson [this message]
2023-06-22 16:16 ` [PATCH v4 09/17] target/riscv: Add Zvbb ISA extension support Max Chou
2023-06-22 17:48   ` Daniel Henrique Barboza
2023-06-22 16:16 ` [PATCH v4 10/17] target/riscv: Add Zvkned " Max Chou
2023-06-22 18:03   ` Daniel Henrique Barboza
2023-06-23  7:33   ` Richard Henderson
2023-06-26  8:02     ` Max Chou
2023-06-22 16:16 ` [PATCH v4 11/17] target/riscv: Add Zvknh " Max Chou
2023-06-22 18:06   ` Daniel Henrique Barboza
2023-06-22 16:16 ` [PATCH v4 12/17] target/riscv: Add Zvksh " Max Chou
2023-06-22 18:09   ` Daniel Henrique Barboza
2023-06-22 16:16 ` [PATCH v4 13/17] target/riscv: Add Zvkg " Max Chou
2023-06-22 18:10   ` Daniel Henrique Barboza
2023-06-22 16:16 ` [PATCH v4 14/17] crypto: Create sm4_subword Max Chou
2023-06-22 16:16 ` [PATCH v4 15/17] crypto: Add SM4 constant parameter CK Max Chou
2023-06-22 16:16 ` [PATCH v4 16/17] target/riscv: Add Zvksed ISA extension support Max Chou
2023-06-22 16:16 ` [PATCH v4 17/17] target/riscv: Expose Zvk* and Zvb[b, c] cpu properties Max Chou via
2023-06-22 17:41   ` [PATCH v4 17/17] target/riscv: Expose Zvk* and Zvb[b,c] " Daniel Henrique Barboza
2023-06-26  8:08     ` Max Chou

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=dace2217-77a3-09c4-4541-e19b0bee9fc7@linaro.org \
    --to=richard.henderson@linaro.org \
    --cc=dbarboza@ventanamicro.com \
    --cc=max.chou@sifive.com \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-riscv@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).