From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34317) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZaH4Z-0008BN-JH for qemu-devel@nongnu.org; Fri, 11 Sep 2015 01:40:32 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZaH4V-0005dL-VY for qemu-devel@nongnu.org; Fri, 11 Sep 2015 01:40:31 -0400 Received: from mail-pa0-x236.google.com ([2607:f8b0:400e:c03::236]:33625) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZaH4V-0005dE-LG for qemu-devel@nongnu.org; Fri, 11 Sep 2015 01:40:27 -0400 Received: by pacex6 with SMTP id ex6so64983697pac.0 for ; Thu, 10 Sep 2015 22:40:27 -0700 (PDT) From: Peter Crosthwaite Date: Thu, 10 Sep 2015 22:39:41 -0700 Message-Id: In-Reply-To: References: Subject: [Qemu-devel] [PATCH v1 11/15] cputlb: move CPU_LOOP() for tlb_reset() to exec.c List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, pbonzini@redhat.com, rth@twiddle.net To prepare for multi-arch, cputlb.c should only have awareness of one single architecture. This means it should not have access to the full CPU lists which may be heterogeneous. Instead, push the CPU_LOOP() up to the one and only caller in exec.c. Signed-off-by: Peter Crosthwaite --- Easier reading with git diff -w Changed since RFCv2: split off to new patch (previously part of core virtualisation patch) cputlb.c | 27 ++++++++++++--------------- exec.c | 5 ++++- include/exec/cputlb.h | 2 +- 3 files changed, 17 insertions(+), 17 deletions(-) diff --git a/cputlb.c b/cputlb.c index 4bc6c24..5ccd545 100644 --- a/cputlb.c +++ b/cputlb.c @@ -262,27 +262,24 @@ static inline ram_addr_t qemu_ram_addr_from_host_nofail(void *ptr) return ram_addr; } -void cpu_tlb_reset_dirty_all(ram_addr_t start1, ram_addr_t length) +void tlb_reset_dirty(CPUState *cpu, ram_addr_t start1, ram_addr_t length) { - CPUState *cpu; CPUArchState *env; - CPU_FOREACH(cpu) { - int mmu_idx; + int mmu_idx; - env = cpu->env_ptr; - for (mmu_idx = 0; mmu_idx < NB_MMU_MODES; mmu_idx++) { - unsigned int i; + env = cpu->env_ptr; + for (mmu_idx = 0; mmu_idx < NB_MMU_MODES; mmu_idx++) { + unsigned int i; - for (i = 0; i < CPU_TLB_SIZE; i++) { - tlb_reset_dirty_range(&env->tlb_table[mmu_idx][i], - start1, length); - } + for (i = 0; i < CPU_TLB_SIZE; i++) { + tlb_reset_dirty_range(&env->tlb_table[mmu_idx][i], + start1, length); + } - for (i = 0; i < CPU_VTLB_SIZE; i++) { - tlb_reset_dirty_range(&env->tlb_v_table[mmu_idx][i], - start1, length); - } + for (i = 0; i < CPU_VTLB_SIZE; i++) { + tlb_reset_dirty_range(&env->tlb_v_table[mmu_idx][i], + start1, length); } } } diff --git a/exec.c b/exec.c index c120730..e3568c3 100644 --- a/exec.c +++ b/exec.c @@ -894,6 +894,7 @@ found: static void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t length) { + CPUState *cpu; ram_addr_t start1; RAMBlock *block; ram_addr_t end; @@ -905,7 +906,9 @@ static void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t length) block = qemu_get_ram_block(start); assert(block == qemu_get_ram_block(end - 1)); start1 = (uintptr_t)ramblock_ptr(block, start - block->offset); - cpu_tlb_reset_dirty_all(start1, length); + CPU_FOREACH(cpu) { + tlb_reset_dirty(cpu, start1, length); + } rcu_read_unlock(); } diff --git a/include/exec/cputlb.h b/include/exec/cputlb.h index 360815e..c3aaa30 100644 --- a/include/exec/cputlb.h +++ b/include/exec/cputlb.h @@ -25,7 +25,7 @@ void tlb_protect_code(ram_addr_t ram_addr); void tlb_unprotect_code(ram_addr_t ram_addr); void tlb_reset_dirty_range(CPUTLBEntry *tlb_entry, uintptr_t start, uintptr_t length); -void cpu_tlb_reset_dirty_all(ram_addr_t start1, ram_addr_t length); +void tlb_reset_dirty(CPUState *cpu, ram_addr_t start1, ram_addr_t length); void tlb_set_dirty(CPUArchState *env, target_ulong vaddr); extern int tlb_flush_count; -- 1.9.1