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From: "Jiaxun Yang" <jiaxun.yang@flygoat.com>
To: "Bibo Mao" <maobibo@loongson.cn>,
	"Song Gao" <gaosong@loongson.cn>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>
Cc: "QEMU devel" <qemu-devel@nongnu.org>
Subject: Re: [RFC v3 1/2] target/loongarch: Add loongson binary translation feature
Date: Mon, 01 Jul 2024 07:57:31 +0100	[thread overview]
Message-ID: <db19ed93-027c-4e29-aac5-e3a1edcd760b@app.fastmail.com> (raw)
In-Reply-To: <20240530064941.1289573-2-maobibo@loongson.cn>



在2024年5月30日五月 上午7:49,Bibo Mao写道:
> Loongson Binary Translation (LBT) is used to accelerate binary
> translation, which contains 4 scratch registers (scr0 to scr3), x86/ARM
> eflags (eflags) and x87 fpu stack pointer (ftop).
>
> Now LBT feature is added in kvm mode, not supported in TCG mode since
> it is not emulated. Feature variable lbt is added with OnOffAuto type,
> If lbt feature is not supported with KVM host, it reports error if there
> is lbt=on command line.
>
> If there is no any command line about lbt parameter, it checks whether
> KVM host supports lbt feature and set the corresponding value in cpucfg.
>
> Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Hi Bibo,

I was going across recent LoongArch changes and this comes into my attention: 

> ---
>  target/loongarch/cpu.c                | 53 +++++++++++++++++++++++++++
>  target/loongarch/cpu.h                |  6 +++
>  target/loongarch/kvm/kvm.c            | 26 +++++++++++++
>  target/loongarch/kvm/kvm_loongarch.h  | 16 ++++++++
>  target/loongarch/loongarch-qmp-cmds.c |  2 +-
>  5 files changed, 102 insertions(+), 1 deletion(-)
>
> diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
> index b5c1ec94af..14265b6667 100644
> --- a/target/loongarch/cpu.c
> +++ b/target/loongarch/cpu.c
> @@ -571,6 +571,30 @@ static void loongarch_cpu_disas_set_info(CPUState 
> *s, disassemble_info *info)
>      info->print_insn = print_insn_loongarch;
>  }
> 
> +static void loongarch_cpu_check_lbt(CPUState *cs, Error **errp)
> +{
> +    CPULoongArchState *env = cpu_env(cs);
> +    LoongArchCPU *cpu = LOONGARCH_CPU(cs);
> +    bool kvm_supported;
> +
> +    kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_LBT);

IMHO if there is no global states that should be saved/restored VM wise,
this should be handled at per CPU level, preferably with CPUCFG flags hint.

We should minimize non-privilege KVM feature bits to prevent hindering
asymmetry ISA system.

Thanks
- Jiaxun

-- 
- Jiaxun


  reply	other threads:[~2024-07-01  6:58 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-30  6:49 [RFC v3 0/2] target/loongarch: Add loongson binary translation feature Bibo Mao
2024-05-30  6:49 ` [RFC v3 1/2] " Bibo Mao
2024-07-01  6:57   ` Jiaxun Yang [this message]
2024-07-01  7:32     ` maobibo
2024-07-01  8:42       ` Jiaxun Yang
2024-07-01  9:23         ` maobibo
2024-07-03  7:50     ` Jiaxun Yang
2024-07-03  9:43       ` Huacai Chen
2024-07-03 10:10         ` maobibo
2024-07-03 10:19           ` Jiaxun Yang
2024-05-30  6:49 ` [RFC v3 2/2] target/loongarch: Implement lbt registers save/restore function Bibo Mao

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