* [PATCH v3 0/6] Hexagon: add lldb support
@ 2023-05-04 15:37 Matheus Tavares Bernardino
2023-05-04 15:37 ` [PATCH v3 1/6] gdbstub: only send stop-reply packets when allowed to Matheus Tavares Bernardino
` (5 more replies)
0 siblings, 6 replies; 10+ messages in thread
From: Matheus Tavares Bernardino @ 2023-05-04 15:37 UTC (permalink / raw)
To: qemu-devel
Cc: alex.bennee, bcain, f4bug, peter.maydell, tsimpson, philmd,
richard.henderson
This series allows hexagon programs to be debugged under qemu user-mode
through LLDB and qemu's gdbstub. LLDB implements the GDB remote serial
protocol, so most of the necessary changes are in the Hexagon part itself.
However, one fix is needed at the arch-independent side too.
Changes in v3:
- Patches 1 & 2: added Alex ack.
- Patch 1: added missing allow_stop_reply guard to
gdbstub/user.c:gdb_exit().
- Patches 3 & 5: replaced qRegisterInfo with gdb-xml.
- Patch 6: Used force_sig_fault().
v2: https://lore.kernel.org/qemu-devel/cover.1681993775.git.quic_mathbern@quicinc.com/
v1: https://lore.kernel.org/qemu-devel/cover.1680808943.git.quic_mathbern@quicinc.com/
Brian Cain (1):
Hexagon (gdbstub): fix p3:0 read and write via stub
Matheus Tavares Bernardino (4):
gdbstub: only send stop-reply packets when allowed to
gdbstub: add test for untimely stop-reply packets
Hexagon: add core gdbstub xml data for LLDB
Hexagon (linux-user/hexagon): handle breakpoints
Taylor Simpson (1):
Hexagon (gdbstub): add HVX support
MAINTAINERS | 1 +
configs/targets/hexagon-linux-user.mak | 1 +
gdbstub/internals.h | 5 +
target/hexagon/internal.h | 2 +
gdbstub/gdbstub.c | 37 +++++--
gdbstub/softmmu.c | 13 ++-
gdbstub/user.c | 24 +++--
linux-user/hexagon/cpu_loop.c | 3 +
target/hexagon/cpu.c | 9 +-
target/hexagon/gdbstub.c | 84 ++++++++++++++++
gdb-xml/hexagon-core.xml | 84 ++++++++++++++++
gdb-xml/hexagon-hvx.xml | 96 +++++++++++++++++++
tests/guest-debug/run-test.py | 16 +++-
.../multiarch/system/Makefile.softmmu-target | 16 +++-
14 files changed, 366 insertions(+), 25 deletions(-)
create mode 100644 gdb-xml/hexagon-core.xml
create mode 100644 gdb-xml/hexagon-hvx.xml
Range-diff against v2:
1: b4ec188e67 ! 1: a49c0897fc gdbstub: only send stop-reply packets when allowed to
@@ gdbstub/softmmu.c: void gdb_exit(int code)
}
## gdbstub/user.c ##
+@@ gdbstub/user.c: void gdb_exit(int code)
+
+ trace_gdbstub_op_exiting((uint8_t)code);
+
+- snprintf(buf, sizeof(buf), "W%02x", (uint8_t)code);
+- gdb_put_packet(buf);
++ if (gdbserver_state.allow_stop_reply) {
++ snprintf(buf, sizeof(buf), "W%02x", (uint8_t)code);
++ gdb_put_packet(buf);
++ gdbserver_state.allow_stop_reply = false;
++ }
+ }
+
+ int gdb_handlesig(CPUState *cpu, int sig)
@@ gdbstub/user.c: int gdb_handlesig(CPUState *cpu, int sig)
if (sig != 0) {
2: a91ec99036 = 2: a30d93b9a8 gdbstub: add test for untimely stop-reply packets
3: 40aa60ee50 < -: ---------- gdbstub: add support for the qRegisterInfo query
4: 090707eea1 < -: ---------- Hexagon: support qRegisterInfo at gdbstub
-: ---------- > 3: d25a3a7933 Hexagon: add core gdbstub xml data for LLDB
5: 06ed954dab ! 4: 32e7de567c Hexagon (gdbstub): fix p3:0 read and write via stub
@@ Metadata
## Commit message ##
Hexagon (gdbstub): fix p3:0 read and write via stub
+ Signed-off-by: Brian Cain <bcain@quicinc.com>
Co-authored-by: Sid Manning <sidneym@quicinc.com>
Signed-off-by: Sid Manning <sidneym@quicinc.com>
- Signed-off-by: Brian Cain <bcain@quicinc.com>
Co-authored-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
Signed-off-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
6: 880c86bf2b ! 5: 17cb32f34d Hexagon (gdbstub): add HVX support
@@ Metadata
## Commit message ##
Hexagon (gdbstub): add HVX support
+ Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Co-authored-by: Brian Cain <bcain@quicinc.com>
Signed-off-by: Brian Cain <bcain@quicinc.com>
- Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Co-authored-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
Signed-off-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
- ## target/hexagon/gdbstub.c ##
+ ## configs/targets/hexagon-linux-user.mak ##
+@@
+ TARGET_ARCH=hexagon
+-TARGET_XML_FILES=gdb-xml/hexagon-core.xml
++TARGET_XML_FILES=gdb-xml/hexagon-core.xml gdb-xml/hexagon-hvx.xml
+
+ ## target/hexagon/internal.h ##
@@
- #include "cpu.h"
- #include "internal.h"
+ int hexagon_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
+ int hexagon_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
++int hexagon_hvx_gdb_read_register(CPUHexagonState *env, GByteArray *mem_buf, int n);
++int hexagon_hvx_gdb_write_register(CPUHexagonState *env, uint8_t *mem_buf, int n);
+
+ void hexagon_debug_vreg(CPUHexagonState *env, int regnum);
+ void hexagon_debug_qreg(CPUHexagonState *env, int regnum);
+
+ ## target/hexagon/cpu.c ##
+@@
+ #include "hw/qdev-properties.h"
+ #include "fpu/softfloat-helpers.h"
+ #include "tcg/tcg.h"
++#include "exec/gdbstub.h"
+
+ static void hexagon_v67_cpu_init(Object *obj)
+ {
+@@ target/hexagon/cpu.c: static void hexagon_cpu_realize(DeviceState *dev, Error **errp)
+ return;
+ }
+
++ gdb_register_coprocessor(cs, hexagon_hvx_gdb_read_register,
++ hexagon_hvx_gdb_write_register,
++ NUM_VREGS + NUM_QREGS,
++ "hexagon-hvx.xml", 0);
++
+ qemu_init_vcpu(cs);
+ cpu_reset(cs);
+
+
+ ## target/hexagon/gdbstub.c ##
+@@ target/hexagon/gdbstub.c: int hexagon_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
+
+ g_assert_not_reached();
+ }
++
+static int gdb_get_vreg(CPUHexagonState *env, GByteArray *mem_buf, int n)
+{
+ int total = 0;
@@ target/hexagon/gdbstub.c
+ return total;
+}
+
- int hexagon_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
- {
- HexagonCPU *cpu = HEXAGON_CPU(cs);
-@@ target/hexagon/gdbstub.c: int hexagon_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
- if (n < TOTAL_PER_THREAD_REGS) {
- return gdb_get_regl(mem_buf, env->gpr[n]);
- }
-+ n -= TOTAL_PER_THREAD_REGS;
-+
++int hexagon_hvx_gdb_read_register(CPUHexagonState *env, GByteArray *mem_buf, int n)
++{
+ if (n < NUM_VREGS) {
+ return gdb_get_vreg(env, mem_buf, n);
+ }
@@ target/hexagon/gdbstub.c: int hexagon_gdb_read_register(CPUState *cs, GByteArray
+ if (n < NUM_QREGS) {
+ return gdb_get_qreg(env, mem_buf, n);
+ }
-
- g_assert_not_reached();
- }
-
++
++ g_assert_not_reached();
++}
++
+static int gdb_put_vreg(CPUHexagonState *env, uint8_t *mem_buf, int n)
+{
+ int i;
@@ target/hexagon/gdbstub.c: int hexagon_gdb_read_register(CPUState *cs, GByteArray
+ return MAX_VEC_SIZE_BYTES / 8;
+}
+
- int hexagon_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
- {
- HexagonCPU *cpu = HEXAGON_CPU(cs);
-@@ target/hexagon/gdbstub.c: int hexagon_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
- env->gpr[n] = ldtul_p(mem_buf);
- return sizeof(target_ulong);
- }
-+ n -= TOTAL_PER_THREAD_REGS;
-+
-+ if (n < NUM_VREGS) {
++int hexagon_hvx_gdb_write_register(CPUHexagonState *env, uint8_t *mem_buf, int n)
++{
++ if (n < NUM_VREGS) {
+ return gdb_put_vreg(env, mem_buf, n);
+ }
+ n -= NUM_VREGS;
@@ target/hexagon/gdbstub.c: int hexagon_gdb_write_register(CPUState *cs, uint8_t *
+ if (n < NUM_QREGS) {
+ return gdb_put_qreg(env, mem_buf, n);
+ }
-
- g_assert_not_reached();
- }
++
++ g_assert_not_reached();
++}
+
+ ## gdb-xml/hexagon-hvx.xml (new) ##
+@@
++<?xml version="1.0"?>
++<!--
++ Copyright(c) 2023 Qualcomm Innovation Center, Inc. All Rights Reserved.
++
++ This work is licensed under the terms of the GNU GPL, version 2 or
++ (at your option) any later version. See the COPYING file in the
++ top-level directory.
++
++ Note: this file is intended to be use with LLDB, so it contains fields
++ that may be unknown to GDB. For more information on such fields, please
++ see:
++ https://github.com/llvm/llvm-project/blob/287aa6c4536408413b860e61fca0318a27214cf3/lldb/docs/lldb-gdb-remote.txt#L738-L860
++ https://github.com/llvm/llvm-project/blob/287aa6c4536408413b860e61fca0318a27214cf3/lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp#L4275-L4335
++-->
++
++<!DOCTYPE feature SYSTEM "gdb-target.dtd">
++<feature name="org.gnu.gdb.hexagon.hvx">
++
++ <vector id="vud" type="uint64" count="16"/>
++ <vector id="vd" type="int64" count="16"/>
++ <vector id="vuw" type="uint32" count="32"/>
++ <vector id="vw" type="int32" count="32"/>
++ <vector id="vuh" type="uint16" count="64"/>
++ <vector id="vh" type="int16" count="64"/>
++ <vector id="vub" type="uint8" count="128"/>
++ <vector id="vb" type="int8" count="128"/>
++ <union id="hex_vec">
++ <field name="ud" type="vud"/>
++ <field name="d" type="vd"/>
++ <field name="uw" type="vuw"/>
++ <field name="w" type="vw"/>
++ <field name="uh" type="vuh"/>
++ <field name="h" type="vh"/>
++ <field name="ub" type="vub"/>
++ <field name="b" type="vb"/>
++ </union>
++
++ <flags id="ui2" size="1">
++ <field name="0" start="0" end="0"/>
++ <field name="1" start="1" end="1"/>
++ </flags>
++ <flags id="ui4" size="1">
++ <field name="0" start="0" end="0"/>
++ <field name="1" start="1" end="1"/>
++ <field name="2" start="2" end="2"/>
++ <field name="3" start="3" end="3"/>
++ </flags>
++ <vector id="vpd" type="uint8" count="16"/>
++ <vector id="vpw" type="ui4" count="32"/>
++ <vector id="vph" type="ui2" count="64"/>
++ <vector id="vpb" type="bool" count="128"/>
++ <union id="hex_vec_pred">
++ <field name="d" type="vpd"/>
++ <field name="w" type="vpw"/>
++ <field name="h" type="vph"/>
++ <field name="b" type="vpb"/>
++ </union>
++
++ <reg name="v0" bitsize="1024" offset="256" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="88"/>
++ <reg name="v1" bitsize="1024" offset="384" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="89"/>
++ <reg name="v2" bitsize="1024" offset="512" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="90"/>
++ <reg name="v3" bitsize="1024" offset="640" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="91"/>
++ <reg name="v4" bitsize="1024" offset="768" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="92"/>
++ <reg name="v5" bitsize="1024" offset="896" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="93"/>
++ <reg name="v6" bitsize="1024" offset="1024" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="94"/>
++ <reg name="v7" bitsize="1024" offset="1152" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="95"/>
++ <reg name="v8" bitsize="1024" offset="1280" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="96"/>
++ <reg name="v9" bitsize="1024" offset="1408" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="97"/>
++ <reg name="v10" bitsize="1024" offset="1536" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="98"/>
++ <reg name="v11" bitsize="1024" offset="1664" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="99"/>
++ <reg name="v12" bitsize="1024" offset="1792" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="100"/>
++ <reg name="v13" bitsize="1024" offset="1920" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="101"/>
++ <reg name="v14" bitsize="1024" offset="2048" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="102"/>
++ <reg name="v15" bitsize="1024" offset="2176" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="103"/>
++ <reg name="v16" bitsize="1024" offset="2304" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="104"/>
++ <reg name="v17" bitsize="1024" offset="2432" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="105"/>
++ <reg name="v18" bitsize="1024" offset="2560" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="106"/>
++ <reg name="v19" bitsize="1024" offset="2688" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="107"/>
++ <reg name="v20" bitsize="1024" offset="2816" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="108"/>
++ <reg name="v21" bitsize="1024" offset="2944" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="109"/>
++ <reg name="v22" bitsize="1024" offset="3072" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="110"/>
++ <reg name="v23" bitsize="1024" offset="3200" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="111"/>
++ <reg name="v24" bitsize="1024" offset="3328" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="112"/>
++ <reg name="v25" bitsize="1024" offset="3456" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="113"/>
++ <reg name="v26" bitsize="1024" offset="3584" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="114"/>
++ <reg name="v27" bitsize="1024" offset="3712" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="115"/>
++ <reg name="v28" bitsize="1024" offset="3840" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="116"/>
++ <reg name="v29" bitsize="1024" offset="3968" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="117"/>
++ <reg name="v30" bitsize="1024" offset="4096" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="118"/>
++ <reg name="v31" bitsize="1024" offset="4224" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="119"/>
++ <reg name="q0" bitsize="128" offset="4352" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="120"/>
++ <reg name="q1" bitsize="128" offset="4368" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="121"/>
++ <reg name="q2" bitsize="128" offset="4384" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="122"/>
++ <reg name="q3" bitsize="128" offset="4400" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="123"/>
++
++</feature>
7: 3ff83e45a5 ! 6: c287a129dc Hexagon (linux-user/hexagon): handle breakpoints
@@
## Metadata ##
-Author: Taylor Simpson <tsimpson@quicinc.com>
+Author: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
## Commit message ##
Hexagon (linux-user/hexagon): handle breakpoints
@@ Commit message
This enables LLDB to work with hexagon linux-user mode through the GDB
remote protocol.
- Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
+ Helped-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
## linux-user/hexagon/cpu_loop.c ##
-@@ linux-user/hexagon/cpu_loop.c: void cpu_loop(CPUHexagonState *env)
- target_ulong ret;
-
- for (;;) {
-+ target_siginfo_t info;
- cpu_exec_start(cs);
- trapnr = cpu_exec(cs);
- cpu_exec_end(cs);
@@ linux-user/hexagon/cpu_loop.c: void cpu_loop(CPUHexagonState *env)
case EXCP_ATOMIC:
cpu_exec_step_atomic(cs);
break;
+ case EXCP_DEBUG:
-+ info = (target_siginfo_t) {
-+ .si_signo = TARGET_SIGTRAP,
-+ .si_errno = 0,
-+ .si_code = TARGET_TRAP_BRKPT,
-+ ._sifields._sigfault._addr = 0
-+ };
-+ queue_signal(env, info.si_signo, QEMU_SI_KILL, &info);
++ force_sig_fault(TARGET_SIGTRAP, TARGET_TRAP_BRKPT, 0);
+ break;
default:
EXCP_DUMP(env, "\nqemu: unhandled CPU exception %#x - aborting\n",
--
2.37.2
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v3 1/6] gdbstub: only send stop-reply packets when allowed to
2023-05-04 15:37 [PATCH v3 0/6] Hexagon: add lldb support Matheus Tavares Bernardino
@ 2023-05-04 15:37 ` Matheus Tavares Bernardino
2023-05-04 15:37 ` [PATCH v3 2/6] gdbstub: add test for untimely stop-reply packets Matheus Tavares Bernardino
` (4 subsequent siblings)
5 siblings, 0 replies; 10+ messages in thread
From: Matheus Tavares Bernardino @ 2023-05-04 15:37 UTC (permalink / raw)
To: qemu-devel
Cc: alex.bennee, bcain, f4bug, peter.maydell, tsimpson, philmd,
richard.henderson
GDB's remote serial protocol allows stop-reply messages to be sent by
the stub either as a notification packet or as a reply to a GDB command
(provided that the cmd accepts such a response). QEMU currently does not
implement notification packets, so it should only send stop-replies
synchronously and when requested. Nevertheless, it still issues
unsolicited stop messages through gdb_vm_state_change().
Although this behavior doesn't seem to cause problems with GDB itself
(the messages are just ignored), it can impact other debuggers that
implement the GDB remote serial protocol, like hexagon-lldb. Let's
change the gdbstub to send stop messages only as a response to a
previous GDB command that accepts such a reply.
Signed-off-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
Acked-by: Alex Bennée <alex.bennee@linaro.org>
---
gdbstub/internals.h | 5 +++++
gdbstub/gdbstub.c | 37 ++++++++++++++++++++++++++++---------
gdbstub/softmmu.c | 13 +++++++++++--
gdbstub/user.c | 24 ++++++++++++++++--------
4 files changed, 60 insertions(+), 19 deletions(-)
diff --git a/gdbstub/internals.h b/gdbstub/internals.h
index 94ddff4495..33d21d6488 100644
--- a/gdbstub/internals.h
+++ b/gdbstub/internals.h
@@ -65,6 +65,11 @@ typedef struct GDBState {
GByteArray *mem_buf;
int sstep_flags;
int supported_sstep_flags;
+ /*
+ * Whether we are allowed to send a stop reply packet at this moment.
+ * Must be set off after sending the stop reply itself.
+ */
+ bool allow_stop_reply;
} GDBState;
/* lives in main gdbstub.c */
diff --git a/gdbstub/gdbstub.c b/gdbstub/gdbstub.c
index 0760d78685..be18568d0a 100644
--- a/gdbstub/gdbstub.c
+++ b/gdbstub/gdbstub.c
@@ -777,6 +777,10 @@ typedef void (*GdbCmdHandler)(GArray *params, void *user_ctx);
/*
* cmd_startswith -> cmd is compared using startswith
*
+ * allow_stop_reply -> true iff the gdbstub can respond to this command with a
+ * "stop reply" packet. The list of commands that accept such response is
+ * defined at the GDB Remote Serial Protocol documentation. see:
+ * https://sourceware.org/gdb/onlinedocs/gdb/Stop-Reply-Packets.html#Stop-Reply-Packets.
*
* schema definitions:
* Each schema parameter entry consists of 2 chars,
@@ -802,6 +806,7 @@ typedef struct GdbCmdParseEntry {
const char *cmd;
bool cmd_startswith;
const char *schema;
+ bool allow_stop_reply;
} GdbCmdParseEntry;
static inline int startswith(const char *string, const char *pattern)
@@ -835,6 +840,7 @@ static int process_string_cmd(void *user_ctx, const char *data,
}
}
+ gdbserver_state.allow_stop_reply = cmd->allow_stop_reply;
cmd->handler(params, user_ctx);
return 0;
}
@@ -1283,11 +1289,14 @@ static void handle_v_attach(GArray *params, void *user_ctx)
gdbserver_state.g_cpu = cpu;
gdbserver_state.c_cpu = cpu;
- g_string_printf(gdbserver_state.str_buf, "T%02xthread:", GDB_SIGNAL_TRAP);
- gdb_append_thread_id(cpu, gdbserver_state.str_buf);
- g_string_append_c(gdbserver_state.str_buf, ';');
+ if (gdbserver_state.allow_stop_reply) {
+ g_string_printf(gdbserver_state.str_buf, "T%02xthread:", GDB_SIGNAL_TRAP);
+ gdb_append_thread_id(cpu, gdbserver_state.str_buf);
+ g_string_append_c(gdbserver_state.str_buf, ';');
+ gdbserver_state.allow_stop_reply = false;
cleanup:
- gdb_put_strbuf();
+ gdb_put_strbuf();
+ }
}
static void handle_v_kill(GArray *params, void *user_ctx)
@@ -1310,12 +1319,14 @@ static const GdbCmdParseEntry gdb_v_commands_table[] = {
.handler = handle_v_cont,
.cmd = "Cont",
.cmd_startswith = 1,
+ .allow_stop_reply = true,
.schema = "s0"
},
{
.handler = handle_v_attach,
.cmd = "Attach;",
.cmd_startswith = 1,
+ .allow_stop_reply = true,
.schema = "l0"
},
{
@@ -1698,10 +1709,13 @@ static void handle_gen_set(GArray *params, void *user_ctx)
static void handle_target_halt(GArray *params, void *user_ctx)
{
- g_string_printf(gdbserver_state.str_buf, "T%02xthread:", GDB_SIGNAL_TRAP);
- gdb_append_thread_id(gdbserver_state.c_cpu, gdbserver_state.str_buf);
- g_string_append_c(gdbserver_state.str_buf, ';');
- gdb_put_strbuf();
+ if (gdbserver_state.allow_stop_reply) {
+ g_string_printf(gdbserver_state.str_buf, "T%02xthread:", GDB_SIGNAL_TRAP);
+ gdb_append_thread_id(gdbserver_state.c_cpu, gdbserver_state.str_buf);
+ g_string_append_c(gdbserver_state.str_buf, ';');
+ gdb_put_strbuf();
+ gdbserver_state.allow_stop_reply = false;
+ }
/*
* Remove all the breakpoints when this query is issued,
* because gdb is doing an initial connect and the state
@@ -1725,7 +1739,8 @@ static int gdb_handle_packet(const char *line_buf)
static const GdbCmdParseEntry target_halted_cmd_desc = {
.handler = handle_target_halt,
.cmd = "?",
- .cmd_startswith = 1
+ .cmd_startswith = 1,
+ .allow_stop_reply = true,
};
cmd_parser = &target_halted_cmd_desc;
}
@@ -1736,6 +1751,7 @@ static int gdb_handle_packet(const char *line_buf)
.handler = handle_continue,
.cmd = "c",
.cmd_startswith = 1,
+ .allow_stop_reply = true,
.schema = "L0"
};
cmd_parser = &continue_cmd_desc;
@@ -1747,6 +1763,7 @@ static int gdb_handle_packet(const char *line_buf)
.handler = handle_cont_with_sig,
.cmd = "C",
.cmd_startswith = 1,
+ .allow_stop_reply = true,
.schema = "l0"
};
cmd_parser = &cont_with_sig_cmd_desc;
@@ -1785,6 +1802,7 @@ static int gdb_handle_packet(const char *line_buf)
.handler = handle_step,
.cmd = "s",
.cmd_startswith = 1,
+ .allow_stop_reply = true,
.schema = "L0"
};
cmd_parser = &step_cmd_desc;
@@ -1976,6 +1994,7 @@ void gdb_read_byte(uint8_t ch)
{
uint8_t reply;
+ gdbserver_state.allow_stop_reply = false;
#ifndef CONFIG_USER_ONLY
if (gdbserver_state.last_packet->len) {
/* Waiting for a response to the last packet. If we see the start
diff --git a/gdbstub/softmmu.c b/gdbstub/softmmu.c
index 22ecd09d04..99d994e6bf 100644
--- a/gdbstub/softmmu.c
+++ b/gdbstub/softmmu.c
@@ -43,6 +43,7 @@ static void reset_gdbserver_state(void)
g_free(gdbserver_state.processes);
gdbserver_state.processes = NULL;
gdbserver_state.process_num = 0;
+ gdbserver_state.allow_stop_reply = false;
}
/*
@@ -139,6 +140,10 @@ static void gdb_vm_state_change(void *opaque, bool running, RunState state)
return;
}
+ if (!gdbserver_state.allow_stop_reply) {
+ return;
+ }
+
gdb_append_thread_id(cpu, tid);
switch (state) {
@@ -205,6 +210,7 @@ static void gdb_vm_state_change(void *opaque, bool running, RunState state)
send_packet:
gdb_put_packet(buf->str);
+ gdbserver_state.allow_stop_reply = false;
/* disable single step if it was enabled */
cpu_single_step(cpu, 0);
@@ -422,8 +428,11 @@ void gdb_exit(int code)
trace_gdbstub_op_exiting((uint8_t)code);
- snprintf(buf, sizeof(buf), "W%02x", (uint8_t)code);
- gdb_put_packet(buf);
+ if (gdbserver_state.allow_stop_reply) {
+ snprintf(buf, sizeof(buf), "W%02x", (uint8_t)code);
+ gdb_put_packet(buf);
+ gdbserver_state.allow_stop_reply = false;
+ }
qemu_chr_fe_deinit(&gdbserver_system_state.chr, true);
}
diff --git a/gdbstub/user.c b/gdbstub/user.c
index 80488b6bb9..5b375be1d9 100644
--- a/gdbstub/user.c
+++ b/gdbstub/user.c
@@ -108,8 +108,11 @@ void gdb_exit(int code)
trace_gdbstub_op_exiting((uint8_t)code);
- snprintf(buf, sizeof(buf), "W%02x", (uint8_t)code);
- gdb_put_packet(buf);
+ if (gdbserver_state.allow_stop_reply) {
+ snprintf(buf, sizeof(buf), "W%02x", (uint8_t)code);
+ gdb_put_packet(buf);
+ gdbserver_state.allow_stop_reply = false;
+ }
}
int gdb_handlesig(CPUState *cpu, int sig)
@@ -127,11 +130,14 @@ int gdb_handlesig(CPUState *cpu, int sig)
if (sig != 0) {
gdb_set_stop_cpu(cpu);
- g_string_printf(gdbserver_state.str_buf,
- "T%02xthread:", gdb_target_signal_to_gdb(sig));
- gdb_append_thread_id(cpu, gdbserver_state.str_buf);
- g_string_append_c(gdbserver_state.str_buf, ';');
- gdb_put_strbuf();
+ if (gdbserver_state.allow_stop_reply) {
+ g_string_printf(gdbserver_state.str_buf,
+ "T%02xthread:", gdb_target_signal_to_gdb(sig));
+ gdb_append_thread_id(cpu, gdbserver_state.str_buf);
+ g_string_append_c(gdbserver_state.str_buf, ';');
+ gdb_put_strbuf();
+ gdbserver_state.allow_stop_reply = false;
+ }
}
/*
* gdb_put_packet() might have detected that the peer terminated the
@@ -174,12 +180,14 @@ void gdb_signalled(CPUArchState *env, int sig)
{
char buf[4];
- if (!gdbserver_state.init || gdbserver_user_state.fd < 0) {
+ if (!gdbserver_state.init || gdbserver_user_state.fd < 0 ||
+ !gdbserver_state.allow_stop_reply) {
return;
}
snprintf(buf, sizeof(buf), "X%02x", gdb_target_signal_to_gdb(sig));
gdb_put_packet(buf);
+ gdbserver_state.allow_stop_reply = false;
}
static void gdb_accept_init(int fd)
--
2.37.2
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v3 2/6] gdbstub: add test for untimely stop-reply packets
2023-05-04 15:37 [PATCH v3 0/6] Hexagon: add lldb support Matheus Tavares Bernardino
2023-05-04 15:37 ` [PATCH v3 1/6] gdbstub: only send stop-reply packets when allowed to Matheus Tavares Bernardino
@ 2023-05-04 15:37 ` Matheus Tavares Bernardino
2023-05-04 15:37 ` [PATCH v3 3/6] Hexagon: add core gdbstub xml data for LLDB Matheus Tavares Bernardino
` (3 subsequent siblings)
5 siblings, 0 replies; 10+ messages in thread
From: Matheus Tavares Bernardino @ 2023-05-04 15:37 UTC (permalink / raw)
To: qemu-devel
Cc: alex.bennee, bcain, f4bug, peter.maydell, tsimpson, philmd,
richard.henderson
In the previous commit, we modified gdbstub.c to only send stop-reply
packets as a response to GDB commands that accept it. Now, let's add a
test for this intended behavior. Running this test before the fix from
the previous commit fails as QEMU sends a stop-reply packet
asynchronously, when GDB was in fact waiting an ACK.
Signed-off-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
Acked-by: Alex Bennée <alex.bennee@linaro.org>
---
tests/guest-debug/run-test.py | 16 ++++++++++++----
.../tcg/multiarch/system/Makefile.softmmu-target | 16 +++++++++++++++-
2 files changed, 27 insertions(+), 5 deletions(-)
diff --git a/tests/guest-debug/run-test.py b/tests/guest-debug/run-test.py
index d865e46ecd..de6106a5e5 100755
--- a/tests/guest-debug/run-test.py
+++ b/tests/guest-debug/run-test.py
@@ -26,11 +26,12 @@ def get_args():
parser.add_argument("--qargs", help="Qemu arguments for test")
parser.add_argument("--binary", help="Binary to debug",
required=True)
- parser.add_argument("--test", help="GDB test script",
- required=True)
+ parser.add_argument("--test", help="GDB test script")
parser.add_argument("--gdb", help="The gdb binary to use",
default=None)
+ parser.add_argument("--gdb-args", help="Additional gdb arguments")
parser.add_argument("--output", help="A file to redirect output to")
+ parser.add_argument("--stderr", help="A file to redirect stderr to")
return parser.parse_args()
@@ -58,6 +59,10 @@ def log(output, msg):
output = open(args.output, "w")
else:
output = None
+ if args.stderr:
+ stderr = open(args.stderr, "w")
+ else:
+ stderr = None
socket_dir = TemporaryDirectory("qemu-gdbstub")
socket_name = os.path.join(socket_dir.name, "gdbstub.socket")
@@ -77,6 +82,8 @@ def log(output, msg):
# Now launch gdb with our test and collect the result
gdb_cmd = "%s %s" % (args.gdb, args.binary)
+ if args.gdb_args:
+ gdb_cmd += " %s" % (args.gdb_args)
# run quietly and ignore .gdbinit
gdb_cmd += " -q -n -batch"
# disable prompts in case of crash
@@ -84,13 +91,14 @@ def log(output, msg):
# connect to remote
gdb_cmd += " -ex 'target remote %s'" % (socket_name)
# finally the test script itself
- gdb_cmd += " -x %s" % (args.test)
+ if args.test:
+ gdb_cmd += " -x %s" % (args.test)
sleep(1)
log(output, "GDB CMD: %s" % (gdb_cmd))
- result = subprocess.call(gdb_cmd, shell=True, stdout=output)
+ result = subprocess.call(gdb_cmd, shell=True, stdout=output, stderr=stderr)
# A result of greater than 128 indicates a fatal signal (likely a
# crash due to gdb internal failure). That's a problem for GDB and
diff --git a/tests/tcg/multiarch/system/Makefile.softmmu-target b/tests/tcg/multiarch/system/Makefile.softmmu-target
index 5f432c95f3..fe40195d39 100644
--- a/tests/tcg/multiarch/system/Makefile.softmmu-target
+++ b/tests/tcg/multiarch/system/Makefile.softmmu-target
@@ -27,6 +27,20 @@ run-gdbstub-memory: memory
"-monitor none -display none -chardev file$(COMMA)path=$<.out$(COMMA)id=output $(QEMU_OPTS)" \
--bin $< --test $(MULTIARCH_SRC)/gdbstub/memory.py, \
softmmu gdbstub support)
+
+run-gdbstub-untimely-packet: hello
+ $(call run-test, $@, $(GDB_SCRIPT) \
+ --gdb $(HAVE_GDB_BIN) \
+ --gdb-args "-ex 'set debug remote 1'" \
+ --output untimely-packet.gdb.out \
+ --stderr untimely-packet.gdb.err \
+ --qemu $(QEMU) \
+ --bin $< --qargs \
+ "-monitor none -display none -chardev file$(COMMA)path=untimely-packet.out$(COMMA)id=output $(QEMU_OPTS)", \
+ "softmmu gdbstub untimely packets")
+ $(call quiet-command, \
+ (! grep -Fq 'Packet instead of Ack, ignoring it' untimely-packet.gdb.err), \
+ "GREP", "file untimely-packet.gdb.err")
else
run-gdbstub-%:
$(call skip-test, "gdbstub test $*", "no guest arch support")
@@ -36,4 +50,4 @@ run-gdbstub-%:
$(call skip-test, "gdbstub test $*", "need working gdb")
endif
-MULTIARCH_RUNS += run-gdbstub-memory
+MULTIARCH_RUNS += run-gdbstub-memory run-gdbstub-untimely-packet
--
2.37.2
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v3 3/6] Hexagon: add core gdbstub xml data for LLDB
2023-05-04 15:37 [PATCH v3 0/6] Hexagon: add lldb support Matheus Tavares Bernardino
2023-05-04 15:37 ` [PATCH v3 1/6] gdbstub: only send stop-reply packets when allowed to Matheus Tavares Bernardino
2023-05-04 15:37 ` [PATCH v3 2/6] gdbstub: add test for untimely stop-reply packets Matheus Tavares Bernardino
@ 2023-05-04 15:37 ` Matheus Tavares Bernardino
2023-05-09 19:12 ` Taylor Simpson
2023-05-04 15:37 ` [PATCH v3 4/6] Hexagon (gdbstub): fix p3:0 read and write via stub Matheus Tavares Bernardino
` (2 subsequent siblings)
5 siblings, 1 reply; 10+ messages in thread
From: Matheus Tavares Bernardino @ 2023-05-04 15:37 UTC (permalink / raw)
To: qemu-devel
Cc: alex.bennee, bcain, f4bug, peter.maydell, tsimpson, philmd,
richard.henderson, Laurent Vivier
Signed-off-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
---
MAINTAINERS | 1 +
configs/targets/hexagon-linux-user.mak | 1 +
target/hexagon/cpu.c | 3 +-
gdb-xml/hexagon-core.xml | 84 ++++++++++++++++++++++++++
4 files changed, 88 insertions(+), 1 deletion(-)
create mode 100644 gdb-xml/hexagon-core.xml
diff --git a/MAINTAINERS b/MAINTAINERS
index b22b85bc3a..95037d9f34 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -225,6 +225,7 @@ F: tests/tcg/hexagon/
F: disas/hexagon.c
F: configs/targets/hexagon-linux-user/default.mak
F: docker/dockerfiles/debian-hexagon-cross.docker
+F: gdb-xml/hexagon*.xml
Hexagon idef-parser
M: Alessandro Di Federico <ale@rev.ng>
diff --git a/configs/targets/hexagon-linux-user.mak b/configs/targets/hexagon-linux-user.mak
index 003ed0a408..fd5e222d4f 100644
--- a/configs/targets/hexagon-linux-user.mak
+++ b/configs/targets/hexagon-linux-user.mak
@@ -1 +1,2 @@
TARGET_ARCH=hexagon
+TARGET_XML_FILES=gdb-xml/hexagon-core.xml
diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c
index ab40cfc283..a59d964574 100644
--- a/target/hexagon/cpu.c
+++ b/target/hexagon/cpu.c
@@ -358,8 +358,9 @@ static void hexagon_cpu_class_init(ObjectClass *c, void *data)
cc->get_pc = hexagon_cpu_get_pc;
cc->gdb_read_register = hexagon_gdb_read_register;
cc->gdb_write_register = hexagon_gdb_write_register;
- cc->gdb_num_core_regs = TOTAL_PER_THREAD_REGS + NUM_VREGS + NUM_QREGS;
+ cc->gdb_num_core_regs = TOTAL_PER_THREAD_REGS;
cc->gdb_stop_before_watchpoint = true;
+ cc->gdb_core_xml_file = "hexagon-core.xml";
cc->disas_set_info = hexagon_cpu_disas_set_info;
cc->tcg_ops = &hexagon_tcg_ops;
}
diff --git a/gdb-xml/hexagon-core.xml b/gdb-xml/hexagon-core.xml
new file mode 100644
index 0000000000..e181163cff
--- /dev/null
+++ b/gdb-xml/hexagon-core.xml
@@ -0,0 +1,84 @@
+<?xml version="1.0"?>
+<!--
+ Copyright(c) 2023 Qualcomm Innovation Center, Inc. All Rights Reserved.
+
+ This work is licensed under the terms of the GNU GPL, version 2 or
+ (at your option) any later version. See the COPYING file in the
+ top-level directory.
+
+ Note: this file is intended to be use with LLDB, so it contains fields
+ that may be unknown to GDB. For more information on such fields, please
+ see:
+ https://github.com/llvm/llvm-project/blob/287aa6c4536408413b860e61fca0318a27214cf3/lldb/docs/lldb-gdb-remote.txt#L738-L860
+ https://github.com/llvm/llvm-project/blob/287aa6c4536408413b860e61fca0318a27214cf3/lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp#L4275-L4335
+-->
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.hexagon.core">
+
+ <reg name="r00" altname="r0" bitsize="32" offset="0" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="0" generic="r00"/>
+ <reg name="r01" altname="r1" bitsize="32" offset="4" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="1" generic="r01"/>
+ <reg name="r02" altname="r2" bitsize="32" offset="8" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="2" generic="r02"/>
+ <reg name="r03" altname="r3" bitsize="32" offset="12" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="3" generic="r03"/>
+ <reg name="r04" altname="r4" bitsize="32" offset="16" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="4" generic="r04"/>
+ <reg name="r05" altname="r5" bitsize="32" offset="20" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="5" generic="r05"/>
+ <reg name="r06" altname="r6" bitsize="32" offset="24" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="6" generic="r06"/>
+ <reg name="r07" altname="r7" bitsize="32" offset="28" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="7" generic="r07"/>
+ <reg name="r08" altname="r8" bitsize="32" offset="32" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="8" generic="r08"/>
+ <reg name="r09" altname="r9" bitsize="32" offset="36" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="9" generic="r09"/>
+ <reg name="r10" bitsize="32" offset="40" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="10"/>
+ <reg name="r11" bitsize="32" offset="44" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="11"/>
+ <reg name="r12" bitsize="32" offset="48" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="12"/>
+ <reg name="r13" bitsize="32" offset="52" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="13"/>
+ <reg name="r14" bitsize="32" offset="56" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="14"/>
+ <reg name="r15" bitsize="32" offset="60" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="15"/>
+ <reg name="r16" bitsize="32" offset="64" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="16"/>
+ <reg name="r17" bitsize="32" offset="68" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="17"/>
+ <reg name="r18" bitsize="32" offset="72" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="18"/>
+ <reg name="r19" bitsize="32" offset="76" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="19"/>
+ <reg name="r20" bitsize="32" offset="80" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="20"/>
+ <reg name="r21" bitsize="32" offset="84" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="21"/>
+ <reg name="r22" bitsize="32" offset="88" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="22"/>
+ <reg name="r23" bitsize="32" offset="92" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="23"/>
+ <reg name="r24" bitsize="32" offset="96" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="24"/>
+ <reg name="r25" bitsize="32" offset="100" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="25"/>
+ <reg name="r26" bitsize="32" offset="104" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="26"/>
+ <reg name="r27" bitsize="32" offset="108" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="27"/>
+ <reg name="r28" bitsize="32" offset="112" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="28"/>
+ <reg name="r29" altname="sp" bitsize="32" offset="116" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="29" generic="sp"/>
+ <reg name="r30" altname="fp" bitsize="32" offset="120" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="30" generic="fp"/>
+ <reg name="r31" altname="ra" bitsize="32" offset="124" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="31" generic="ra"/>
+ <reg name="sa0" bitsize="32" offset="128" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="32"/>
+ <reg name="lc0" bitsize="32" offset="132" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="33"/>
+ <reg name="sa1" bitsize="32" offset="136" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="34"/>
+ <reg name="lc1" bitsize="32" offset="140" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="35"/>
+ <reg name="p3_0" bitsize="32" offset="144" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="36"/>
+ <reg name="c5" bitsize="32" offset="148" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="37"/>
+ <reg name="m0" bitsize="32" offset="152" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="38"/>
+ <reg name="m1" bitsize="32" offset="156" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="39"/>
+ <reg name="usr" bitsize="32" offset="160" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="40"/>
+ <reg name="pc" bitsize="32" offset="164" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="41" generic="pc"/>
+ <reg name="ugp" bitsize="32" offset="168" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="42"/>
+ <reg name="gp" bitsize="32" offset="172" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="43"/>
+ <reg name="cs0" bitsize="32" offset="176" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="44"/>
+ <reg name="cs1" bitsize="32" offset="180" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="45"/>
+ <reg name="upcyclelo" bitsize="32" offset="184" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="46"/>
+ <reg name="upcyclehi" bitsize="32" offset="188" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="47"/>
+ <reg name="framelimit" bitsize="32" offset="192" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="48"/>
+ <reg name="framekey" bitsize="32" offset="196" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="49"/>
+ <reg name="pktcountlo" bitsize="32" offset="200" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="50"/>
+ <reg name="pktcounthi" bitsize="32" offset="204" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="51"/>
+ <reg name="pkt_cnt" bitsize="32" offset="208" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="52"/>
+ <reg name="insn_cnt" bitsize="32" offset="212" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="53"/>
+ <reg name="hvx_cnt" bitsize="32" offset="216" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="54"/>
+ <reg name="c23" bitsize="32" offset="220" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="55"/>
+ <reg name="c24" bitsize="32" offset="224" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="56"/>
+ <reg name="c25" bitsize="32" offset="228" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="57"/>
+ <reg name="c26" bitsize="32" offset="232" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="58"/>
+ <reg name="c27" bitsize="32" offset="236" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="59"/>
+ <reg name="c28" bitsize="32" offset="240" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="60"/>
+ <reg name="c29" bitsize="32" offset="244" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="61"/>
+ <reg name="utimerlo" bitsize="32" offset="248" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="62"/>
+ <reg name="utimerhi" bitsize="32" offset="252" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="63"/>
+
+</feature>
--
2.37.2
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v3 4/6] Hexagon (gdbstub): fix p3:0 read and write via stub
2023-05-04 15:37 [PATCH v3 0/6] Hexagon: add lldb support Matheus Tavares Bernardino
` (2 preceding siblings ...)
2023-05-04 15:37 ` [PATCH v3 3/6] Hexagon: add core gdbstub xml data for LLDB Matheus Tavares Bernardino
@ 2023-05-04 15:37 ` Matheus Tavares Bernardino
2023-05-04 15:37 ` [PATCH v3 5/6] Hexagon (gdbstub): add HVX support Matheus Tavares Bernardino
2023-05-04 15:37 ` [PATCH v3 6/6] Hexagon (linux-user/hexagon): handle breakpoints Matheus Tavares Bernardino
5 siblings, 0 replies; 10+ messages in thread
From: Matheus Tavares Bernardino @ 2023-05-04 15:37 UTC (permalink / raw)
To: qemu-devel
Cc: alex.bennee, bcain, f4bug, peter.maydell, tsimpson, philmd,
richard.henderson, Sid Manning
From: Brian Cain <bcain@quicinc.com>
Signed-off-by: Brian Cain <bcain@quicinc.com>
Co-authored-by: Sid Manning <sidneym@quicinc.com>
Signed-off-by: Sid Manning <sidneym@quicinc.com>
Co-authored-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
Signed-off-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
---
target/hexagon/gdbstub.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/target/hexagon/gdbstub.c b/target/hexagon/gdbstub.c
index 46083da620..a06fed9f18 100644
--- a/target/hexagon/gdbstub.c
+++ b/target/hexagon/gdbstub.c
@@ -25,6 +25,14 @@ int hexagon_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
HexagonCPU *cpu = HEXAGON_CPU(cs);
CPUHexagonState *env = &cpu->env;
+ if (n == HEX_REG_P3_0_ALIASED) {
+ uint32_t p3_0 = 0;
+ for (int i = 0; i < NUM_PREGS; i++) {
+ p3_0 = deposit32(p3_0, i * 8, 8, env->pred[i]);
+ }
+ return gdb_get_regl(mem_buf, p3_0);
+ }
+
if (n < TOTAL_PER_THREAD_REGS) {
return gdb_get_regl(mem_buf, env->gpr[n]);
}
@@ -37,6 +45,14 @@ int hexagon_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
HexagonCPU *cpu = HEXAGON_CPU(cs);
CPUHexagonState *env = &cpu->env;
+ if (n == HEX_REG_P3_0_ALIASED) {
+ uint32_t p3_0 = ldtul_p(mem_buf);
+ for (int i = 0; i < NUM_PREGS; i++) {
+ env->pred[i] = extract32(p3_0, i * 8, 8);
+ }
+ return sizeof(target_ulong);
+ }
+
if (n < TOTAL_PER_THREAD_REGS) {
env->gpr[n] = ldtul_p(mem_buf);
return sizeof(target_ulong);
--
2.37.2
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v3 5/6] Hexagon (gdbstub): add HVX support
2023-05-04 15:37 [PATCH v3 0/6] Hexagon: add lldb support Matheus Tavares Bernardino
` (3 preceding siblings ...)
2023-05-04 15:37 ` [PATCH v3 4/6] Hexagon (gdbstub): fix p3:0 read and write via stub Matheus Tavares Bernardino
@ 2023-05-04 15:37 ` Matheus Tavares Bernardino
2023-05-12 21:34 ` Brian Cain
2023-05-04 15:37 ` [PATCH v3 6/6] Hexagon (linux-user/hexagon): handle breakpoints Matheus Tavares Bernardino
5 siblings, 1 reply; 10+ messages in thread
From: Matheus Tavares Bernardino @ 2023-05-04 15:37 UTC (permalink / raw)
To: qemu-devel
Cc: alex.bennee, bcain, f4bug, peter.maydell, tsimpson, philmd,
richard.henderson, Laurent Vivier
From: Taylor Simpson <tsimpson@quicinc.com>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Co-authored-by: Brian Cain <bcain@quicinc.com>
Signed-off-by: Brian Cain <bcain@quicinc.com>
Co-authored-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
Signed-off-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
---
configs/targets/hexagon-linux-user.mak | 2 +-
target/hexagon/internal.h | 2 +
target/hexagon/cpu.c | 6 ++
target/hexagon/gdbstub.c | 68 ++++++++++++++++++
gdb-xml/hexagon-hvx.xml | 96 ++++++++++++++++++++++++++
5 files changed, 173 insertions(+), 1 deletion(-)
create mode 100644 gdb-xml/hexagon-hvx.xml
diff --git a/configs/targets/hexagon-linux-user.mak b/configs/targets/hexagon-linux-user.mak
index fd5e222d4f..2765a4c563 100644
--- a/configs/targets/hexagon-linux-user.mak
+++ b/configs/targets/hexagon-linux-user.mak
@@ -1,2 +1,2 @@
TARGET_ARCH=hexagon
-TARGET_XML_FILES=gdb-xml/hexagon-core.xml
+TARGET_XML_FILES=gdb-xml/hexagon-core.xml gdb-xml/hexagon-hvx.xml
diff --git a/target/hexagon/internal.h b/target/hexagon/internal.h
index b1bfadc3f5..d732b6bb3c 100644
--- a/target/hexagon/internal.h
+++ b/target/hexagon/internal.h
@@ -33,6 +33,8 @@
int hexagon_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int hexagon_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
+int hexagon_hvx_gdb_read_register(CPUHexagonState *env, GByteArray *mem_buf, int n);
+int hexagon_hvx_gdb_write_register(CPUHexagonState *env, uint8_t *mem_buf, int n);
void hexagon_debug_vreg(CPUHexagonState *env, int regnum);
void hexagon_debug_qreg(CPUHexagonState *env, int regnum);
diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c
index a59d964574..2e36903d9d 100644
--- a/target/hexagon/cpu.c
+++ b/target/hexagon/cpu.c
@@ -24,6 +24,7 @@
#include "hw/qdev-properties.h"
#include "fpu/softfloat-helpers.h"
#include "tcg/tcg.h"
+#include "exec/gdbstub.h"
static void hexagon_v67_cpu_init(Object *obj)
{
@@ -315,6 +316,11 @@ static void hexagon_cpu_realize(DeviceState *dev, Error **errp)
return;
}
+ gdb_register_coprocessor(cs, hexagon_hvx_gdb_read_register,
+ hexagon_hvx_gdb_write_register,
+ NUM_VREGS + NUM_QREGS,
+ "hexagon-hvx.xml", 0);
+
qemu_init_vcpu(cs);
cpu_reset(cs);
diff --git a/target/hexagon/gdbstub.c b/target/hexagon/gdbstub.c
index a06fed9f18..54d37e006e 100644
--- a/target/hexagon/gdbstub.c
+++ b/target/hexagon/gdbstub.c
@@ -60,3 +60,71 @@ int hexagon_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
g_assert_not_reached();
}
+
+static int gdb_get_vreg(CPUHexagonState *env, GByteArray *mem_buf, int n)
+{
+ int total = 0;
+ int i;
+ for (i = 0; i < ARRAY_SIZE(env->VRegs[n].uw); i++) {
+ total += gdb_get_regl(mem_buf, env->VRegs[n].uw[i]);
+ }
+ return total;
+}
+
+static int gdb_get_qreg(CPUHexagonState *env, GByteArray *mem_buf, int n)
+{
+ int total = 0;
+ int i;
+ for (i = 0; i < ARRAY_SIZE(env->QRegs[n].uw); i++) {
+ total += gdb_get_regl(mem_buf, env->QRegs[n].uw[i]);
+ }
+ return total;
+}
+
+int hexagon_hvx_gdb_read_register(CPUHexagonState *env, GByteArray *mem_buf, int n)
+{
+ if (n < NUM_VREGS) {
+ return gdb_get_vreg(env, mem_buf, n);
+ }
+ n -= NUM_VREGS;
+
+ if (n < NUM_QREGS) {
+ return gdb_get_qreg(env, mem_buf, n);
+ }
+
+ g_assert_not_reached();
+}
+
+static int gdb_put_vreg(CPUHexagonState *env, uint8_t *mem_buf, int n)
+{
+ int i;
+ for (i = 0; i < ARRAY_SIZE(env->VRegs[n].uw); i++) {
+ env->VRegs[n].uw[i] = ldtul_p(mem_buf);
+ mem_buf += 4;
+ }
+ return MAX_VEC_SIZE_BYTES;
+}
+
+static int gdb_put_qreg(CPUHexagonState *env, uint8_t *mem_buf, int n)
+{
+ int i;
+ for (i = 0; i < ARRAY_SIZE(env->QRegs[n].uw); i++) {
+ env->QRegs[n].uw[i] = ldtul_p(mem_buf);
+ mem_buf += 4;
+ }
+ return MAX_VEC_SIZE_BYTES / 8;
+}
+
+int hexagon_hvx_gdb_write_register(CPUHexagonState *env, uint8_t *mem_buf, int n)
+{
+ if (n < NUM_VREGS) {
+ return gdb_put_vreg(env, mem_buf, n);
+ }
+ n -= NUM_VREGS;
+
+ if (n < NUM_QREGS) {
+ return gdb_put_qreg(env, mem_buf, n);
+ }
+
+ g_assert_not_reached();
+}
diff --git a/gdb-xml/hexagon-hvx.xml b/gdb-xml/hexagon-hvx.xml
new file mode 100644
index 0000000000..5f2e220733
--- /dev/null
+++ b/gdb-xml/hexagon-hvx.xml
@@ -0,0 +1,96 @@
+<?xml version="1.0"?>
+<!--
+ Copyright(c) 2023 Qualcomm Innovation Center, Inc. All Rights Reserved.
+
+ This work is licensed under the terms of the GNU GPL, version 2 or
+ (at your option) any later version. See the COPYING file in the
+ top-level directory.
+
+ Note: this file is intended to be use with LLDB, so it contains fields
+ that may be unknown to GDB. For more information on such fields, please
+ see:
+ https://github.com/llvm/llvm-project/blob/287aa6c4536408413b860e61fca0318a27214cf3/lldb/docs/lldb-gdb-remote.txt#L738-L860
+ https://github.com/llvm/llvm-project/blob/287aa6c4536408413b860e61fca0318a27214cf3/lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp#L4275-L4335
+-->
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.hexagon.hvx">
+
+ <vector id="vud" type="uint64" count="16"/>
+ <vector id="vd" type="int64" count="16"/>
+ <vector id="vuw" type="uint32" count="32"/>
+ <vector id="vw" type="int32" count="32"/>
+ <vector id="vuh" type="uint16" count="64"/>
+ <vector id="vh" type="int16" count="64"/>
+ <vector id="vub" type="uint8" count="128"/>
+ <vector id="vb" type="int8" count="128"/>
+ <union id="hex_vec">
+ <field name="ud" type="vud"/>
+ <field name="d" type="vd"/>
+ <field name="uw" type="vuw"/>
+ <field name="w" type="vw"/>
+ <field name="uh" type="vuh"/>
+ <field name="h" type="vh"/>
+ <field name="ub" type="vub"/>
+ <field name="b" type="vb"/>
+ </union>
+
+ <flags id="ui2" size="1">
+ <field name="0" start="0" end="0"/>
+ <field name="1" start="1" end="1"/>
+ </flags>
+ <flags id="ui4" size="1">
+ <field name="0" start="0" end="0"/>
+ <field name="1" start="1" end="1"/>
+ <field name="2" start="2" end="2"/>
+ <field name="3" start="3" end="3"/>
+ </flags>
+ <vector id="vpd" type="uint8" count="16"/>
+ <vector id="vpw" type="ui4" count="32"/>
+ <vector id="vph" type="ui2" count="64"/>
+ <vector id="vpb" type="bool" count="128"/>
+ <union id="hex_vec_pred">
+ <field name="d" type="vpd"/>
+ <field name="w" type="vpw"/>
+ <field name="h" type="vph"/>
+ <field name="b" type="vpb"/>
+ </union>
+
+ <reg name="v0" bitsize="1024" offset="256" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="88"/>
+ <reg name="v1" bitsize="1024" offset="384" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="89"/>
+ <reg name="v2" bitsize="1024" offset="512" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="90"/>
+ <reg name="v3" bitsize="1024" offset="640" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="91"/>
+ <reg name="v4" bitsize="1024" offset="768" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="92"/>
+ <reg name="v5" bitsize="1024" offset="896" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="93"/>
+ <reg name="v6" bitsize="1024" offset="1024" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="94"/>
+ <reg name="v7" bitsize="1024" offset="1152" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="95"/>
+ <reg name="v8" bitsize="1024" offset="1280" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="96"/>
+ <reg name="v9" bitsize="1024" offset="1408" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="97"/>
+ <reg name="v10" bitsize="1024" offset="1536" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="98"/>
+ <reg name="v11" bitsize="1024" offset="1664" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="99"/>
+ <reg name="v12" bitsize="1024" offset="1792" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="100"/>
+ <reg name="v13" bitsize="1024" offset="1920" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="101"/>
+ <reg name="v14" bitsize="1024" offset="2048" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="102"/>
+ <reg name="v15" bitsize="1024" offset="2176" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="103"/>
+ <reg name="v16" bitsize="1024" offset="2304" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="104"/>
+ <reg name="v17" bitsize="1024" offset="2432" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="105"/>
+ <reg name="v18" bitsize="1024" offset="2560" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="106"/>
+ <reg name="v19" bitsize="1024" offset="2688" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="107"/>
+ <reg name="v20" bitsize="1024" offset="2816" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="108"/>
+ <reg name="v21" bitsize="1024" offset="2944" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="109"/>
+ <reg name="v22" bitsize="1024" offset="3072" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="110"/>
+ <reg name="v23" bitsize="1024" offset="3200" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="111"/>
+ <reg name="v24" bitsize="1024" offset="3328" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="112"/>
+ <reg name="v25" bitsize="1024" offset="3456" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="113"/>
+ <reg name="v26" bitsize="1024" offset="3584" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="114"/>
+ <reg name="v27" bitsize="1024" offset="3712" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="115"/>
+ <reg name="v28" bitsize="1024" offset="3840" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="116"/>
+ <reg name="v29" bitsize="1024" offset="3968" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="117"/>
+ <reg name="v30" bitsize="1024" offset="4096" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="118"/>
+ <reg name="v31" bitsize="1024" offset="4224" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="119"/>
+ <reg name="q0" bitsize="128" offset="4352" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="120"/>
+ <reg name="q1" bitsize="128" offset="4368" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="121"/>
+ <reg name="q2" bitsize="128" offset="4384" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="122"/>
+ <reg name="q3" bitsize="128" offset="4400" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="123"/>
+
+</feature>
--
2.37.2
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v3 6/6] Hexagon (linux-user/hexagon): handle breakpoints
2023-05-04 15:37 [PATCH v3 0/6] Hexagon: add lldb support Matheus Tavares Bernardino
` (4 preceding siblings ...)
2023-05-04 15:37 ` [PATCH v3 5/6] Hexagon (gdbstub): add HVX support Matheus Tavares Bernardino
@ 2023-05-04 15:37 ` Matheus Tavares Bernardino
2023-05-07 6:27 ` Richard Henderson
5 siblings, 1 reply; 10+ messages in thread
From: Matheus Tavares Bernardino @ 2023-05-04 15:37 UTC (permalink / raw)
To: qemu-devel
Cc: alex.bennee, bcain, f4bug, peter.maydell, tsimpson, philmd,
richard.henderson, Laurent Vivier
This enables LLDB to work with hexagon linux-user mode through the GDB
remote protocol.
Helped-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
---
linux-user/hexagon/cpu_loop.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/linux-user/hexagon/cpu_loop.c b/linux-user/hexagon/cpu_loop.c
index b84e25bf71..7f1499ed28 100644
--- a/linux-user/hexagon/cpu_loop.c
+++ b/linux-user/hexagon/cpu_loop.c
@@ -63,6 +63,9 @@ void cpu_loop(CPUHexagonState *env)
case EXCP_ATOMIC:
cpu_exec_step_atomic(cs);
break;
+ case EXCP_DEBUG:
+ force_sig_fault(TARGET_SIGTRAP, TARGET_TRAP_BRKPT, 0);
+ break;
default:
EXCP_DUMP(env, "\nqemu: unhandled CPU exception %#x - aborting\n",
trapnr);
--
2.37.2
^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH v3 6/6] Hexagon (linux-user/hexagon): handle breakpoints
2023-05-04 15:37 ` [PATCH v3 6/6] Hexagon (linux-user/hexagon): handle breakpoints Matheus Tavares Bernardino
@ 2023-05-07 6:27 ` Richard Henderson
0 siblings, 0 replies; 10+ messages in thread
From: Richard Henderson @ 2023-05-07 6:27 UTC (permalink / raw)
To: Matheus Tavares Bernardino, qemu-devel
Cc: alex.bennee, bcain, f4bug, peter.maydell, tsimpson, philmd,
Laurent Vivier
On 5/4/23 16:37, Matheus Tavares Bernardino wrote:
> This enables LLDB to work with hexagon linux-user mode through the GDB
> remote protocol.
>
> Helped-by: Richard Henderson<richard.henderson@linaro.org>
> Signed-off-by: Matheus Tavares Bernardino<quic_mathbern@quicinc.com>
> ---
> linux-user/hexagon/cpu_loop.c | 3 +++
> 1 file changed, 3 insertions(+)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 10+ messages in thread
* RE: [PATCH v3 3/6] Hexagon: add core gdbstub xml data for LLDB
2023-05-04 15:37 ` [PATCH v3 3/6] Hexagon: add core gdbstub xml data for LLDB Matheus Tavares Bernardino
@ 2023-05-09 19:12 ` Taylor Simpson
0 siblings, 0 replies; 10+ messages in thread
From: Taylor Simpson @ 2023-05-09 19:12 UTC (permalink / raw)
To: Matheus Bernardino (QUIC), qemu-devel@nongnu.org
Cc: alex.bennee@linaro.org, Brian Cain, f4bug@amsat.org,
peter.maydell@linaro.org, philmd@linaro.org,
richard.henderson@linaro.org, Laurent Vivier
> -----Original Message-----
> From: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
> Sent: Thursday, May 4, 2023 10:38 AM
> To: qemu-devel@nongnu.org
> Cc: alex.bennee@linaro.org; Brian Cain <bcain@quicinc.com>;
> f4bug@amsat.org; peter.maydell@linaro.org; Taylor Simpson
> <tsimpson@quicinc.com>; philmd@linaro.org;
> richard.henderson@linaro.org; Laurent Vivier <laurent@vivier.eu>
> Subject: [PATCH v3 3/6] Hexagon: add core gdbstub xml data for LLDB
>
> Signed-off-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
> ---
> MAINTAINERS | 1 +
> configs/targets/hexagon-linux-user.mak | 1 +
> target/hexagon/cpu.c | 3 +-
> gdb-xml/hexagon-core.xml | 84 ++++++++++++++++++++++++++
> 4 files changed, 88 insertions(+), 1 deletion(-) create mode 100644 gdb-
> xml/hexagon-core.xml
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
^ permalink raw reply [flat|nested] 10+ messages in thread
* RE: [PATCH v3 5/6] Hexagon (gdbstub): add HVX support
2023-05-04 15:37 ` [PATCH v3 5/6] Hexagon (gdbstub): add HVX support Matheus Tavares Bernardino
@ 2023-05-12 21:34 ` Brian Cain
0 siblings, 0 replies; 10+ messages in thread
From: Brian Cain @ 2023-05-12 21:34 UTC (permalink / raw)
To: Matheus Bernardino (QUIC), qemu-devel@nongnu.org
Cc: alex.bennee@linaro.org, f4bug@amsat.org, peter.maydell@linaro.org,
Taylor Simpson, philmd@linaro.org, richard.henderson@linaro.org,
Laurent Vivier
> -----Original Message-----
> From: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
> Sent: Thursday, May 4, 2023 10:38 AM
> To: qemu-devel@nongnu.org
> Cc: alex.bennee@linaro.org; Brian Cain <bcain@quicinc.com>;
> f4bug@amsat.org; peter.maydell@linaro.org; Taylor Simpson
> <tsimpson@quicinc.com>; philmd@linaro.org; richard.henderson@linaro.org;
> Laurent Vivier <laurent@vivier.eu>
> Subject: [PATCH v3 5/6] Hexagon (gdbstub): add HVX support
>
> From: Taylor Simpson <tsimpson@quicinc.com>
>
> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
> Co-authored-by: Brian Cain <bcain@quicinc.com>
> Signed-off-by: Brian Cain <bcain@quicinc.com>
> Co-authored-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
> Signed-off-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
> ---
> configs/targets/hexagon-linux-user.mak | 2 +-
> target/hexagon/internal.h | 2 +
> target/hexagon/cpu.c | 6 ++
> target/hexagon/gdbstub.c | 68 ++++++++++++++++++
> gdb-xml/hexagon-hvx.xml | 96 ++++++++++++++++++++++++++
> 5 files changed, 173 insertions(+), 1 deletion(-)
> create mode 100644 gdb-xml/hexagon-hvx.xml
>
> diff --git a/configs/targets/hexagon-linux-user.mak b/configs/targets/hexagon-
> linux-user.mak
> index fd5e222d4f..2765a4c563 100644
> --- a/configs/targets/hexagon-linux-user.mak
> +++ b/configs/targets/hexagon-linux-user.mak
> @@ -1,2 +1,2 @@
> TARGET_ARCH=hexagon
> -TARGET_XML_FILES=gdb-xml/hexagon-core.xml
> +TARGET_XML_FILES=gdb-xml/hexagon-core.xml gdb-xml/hexagon-hvx.xml
> diff --git a/target/hexagon/internal.h b/target/hexagon/internal.h
> index b1bfadc3f5..d732b6bb3c 100644
> --- a/target/hexagon/internal.h
> +++ b/target/hexagon/internal.h
> @@ -33,6 +33,8 @@
>
> int hexagon_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
> int hexagon_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
> +int hexagon_hvx_gdb_read_register(CPUHexagonState *env, GByteArray
> *mem_buf, int n);
> +int hexagon_hvx_gdb_write_register(CPUHexagonState *env, uint8_t
> *mem_buf, int n);
>
> void hexagon_debug_vreg(CPUHexagonState *env, int regnum);
> void hexagon_debug_qreg(CPUHexagonState *env, int regnum);
> diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c
> index a59d964574..2e36903d9d 100644
> --- a/target/hexagon/cpu.c
> +++ b/target/hexagon/cpu.c
> @@ -24,6 +24,7 @@
> #include "hw/qdev-properties.h"
> #include "fpu/softfloat-helpers.h"
> #include "tcg/tcg.h"
> +#include "exec/gdbstub.h"
>
> static void hexagon_v67_cpu_init(Object *obj)
> {
> @@ -315,6 +316,11 @@ static void hexagon_cpu_realize(DeviceState *dev,
> Error **errp)
> return;
> }
>
> + gdb_register_coprocessor(cs, hexagon_hvx_gdb_read_register,
> + hexagon_hvx_gdb_write_register,
> + NUM_VREGS + NUM_QREGS,
> + "hexagon-hvx.xml", 0);
> +
> qemu_init_vcpu(cs);
> cpu_reset(cs);
>
> diff --git a/target/hexagon/gdbstub.c b/target/hexagon/gdbstub.c
> index a06fed9f18..54d37e006e 100644
> --- a/target/hexagon/gdbstub.c
> +++ b/target/hexagon/gdbstub.c
> @@ -60,3 +60,71 @@ int hexagon_gdb_write_register(CPUState *cs, uint8_t
> *mem_buf, int n)
>
> g_assert_not_reached();
> }
> +
> +static int gdb_get_vreg(CPUHexagonState *env, GByteArray *mem_buf, int n)
> +{
> + int total = 0;
> + int i;
> + for (i = 0; i < ARRAY_SIZE(env->VRegs[n].uw); i++) {
> + total += gdb_get_regl(mem_buf, env->VRegs[n].uw[i]);
> + }
> + return total;
> +}
> +
> +static int gdb_get_qreg(CPUHexagonState *env, GByteArray *mem_buf, int n)
> +{
> + int total = 0;
> + int i;
> + for (i = 0; i < ARRAY_SIZE(env->QRegs[n].uw); i++) {
> + total += gdb_get_regl(mem_buf, env->QRegs[n].uw[i]);
> + }
> + return total;
> +}
> +
> +int hexagon_hvx_gdb_read_register(CPUHexagonState *env, GByteArray
> *mem_buf, int n)
> +{
> + if (n < NUM_VREGS) {
> + return gdb_get_vreg(env, mem_buf, n);
> + }
> + n -= NUM_VREGS;
> +
> + if (n < NUM_QREGS) {
> + return gdb_get_qreg(env, mem_buf, n);
> + }
> +
> + g_assert_not_reached();
> +}
> +
> +static int gdb_put_vreg(CPUHexagonState *env, uint8_t *mem_buf, int n)
> +{
> + int i;
> + for (i = 0; i < ARRAY_SIZE(env->VRegs[n].uw); i++) {
> + env->VRegs[n].uw[i] = ldtul_p(mem_buf);
> + mem_buf += 4;
> + }
> + return MAX_VEC_SIZE_BYTES;
> +}
> +
> +static int gdb_put_qreg(CPUHexagonState *env, uint8_t *mem_buf, int n)
> +{
> + int i;
> + for (i = 0; i < ARRAY_SIZE(env->QRegs[n].uw); i++) {
> + env->QRegs[n].uw[i] = ldtul_p(mem_buf);
> + mem_buf += 4;
> + }
> + return MAX_VEC_SIZE_BYTES / 8;
> +}
> +
> +int hexagon_hvx_gdb_write_register(CPUHexagonState *env, uint8_t
> *mem_buf, int n)
> +{
> + if (n < NUM_VREGS) {
> + return gdb_put_vreg(env, mem_buf, n);
> + }
> + n -= NUM_VREGS;
> +
> + if (n < NUM_QREGS) {
> + return gdb_put_qreg(env, mem_buf, n);
> + }
> +
> + g_assert_not_reached();
> +}
> diff --git a/gdb-xml/hexagon-hvx.xml b/gdb-xml/hexagon-hvx.xml
> new file mode 100644
> index 0000000000..5f2e220733
> --- /dev/null
> +++ b/gdb-xml/hexagon-hvx.xml
> @@ -0,0 +1,96 @@
> +<?xml version="1.0"?>
> +<!--
> + Copyright(c) 2023 Qualcomm Innovation Center, Inc. All Rights Reserved.
> +
> + This work is licensed under the terms of the GNU GPL, version 2 or
> + (at your option) any later version. See the COPYING file in the
> + top-level directory.
> +
> + Note: this file is intended to be use with LLDB, so it contains fields
> + that may be unknown to GDB. For more information on such fields, please
> + see:
> + https://github.com/llvm/llvm-
> project/blob/287aa6c4536408413b860e61fca0318a27214cf3/lldb/docs/lldb-
> gdb-remote.txt#L738-L860
> + https://github.com/llvm/llvm-
> project/blob/287aa6c4536408413b860e61fca0318a27214cf3/lldb/source/Plug
> ins/Process/gdb-remote/ProcessGDBRemote.cpp#L4275-L4335
> +-->
> +
> +<!DOCTYPE feature SYSTEM "gdb-target.dtd">
> +<feature name="org.gnu.gdb.hexagon.hvx">
> +
> + <vector id="vud" type="uint64" count="16"/>
> + <vector id="vd" type="int64" count="16"/>
> + <vector id="vuw" type="uint32" count="32"/>
> + <vector id="vw" type="int32" count="32"/>
> + <vector id="vuh" type="uint16" count="64"/>
> + <vector id="vh" type="int16" count="64"/>
> + <vector id="vub" type="uint8" count="128"/>
> + <vector id="vb" type="int8" count="128"/>
> + <union id="hex_vec">
> + <field name="ud" type="vud"/>
> + <field name="d" type="vd"/>
> + <field name="uw" type="vuw"/>
> + <field name="w" type="vw"/>
> + <field name="uh" type="vuh"/>
> + <field name="h" type="vh"/>
> + <field name="ub" type="vub"/>
> + <field name="b" type="vb"/>
> + </union>
> +
> + <flags id="ui2" size="1">
> + <field name="0" start="0" end="0"/>
> + <field name="1" start="1" end="1"/>
> + </flags>
> + <flags id="ui4" size="1">
> + <field name="0" start="0" end="0"/>
> + <field name="1" start="1" end="1"/>
> + <field name="2" start="2" end="2"/>
> + <field name="3" start="3" end="3"/>
> + </flags>
> + <vector id="vpd" type="uint8" count="16"/>
> + <vector id="vpw" type="ui4" count="32"/>
> + <vector id="vph" type="ui2" count="64"/>
> + <vector id="vpb" type="bool" count="128"/>
> + <union id="hex_vec_pred">
> + <field name="d" type="vpd"/>
> + <field name="w" type="vpw"/>
> + <field name="h" type="vph"/>
> + <field name="b" type="vpb"/>
> + </union>
> +
> + <reg name="v0" bitsize="1024" offset="256" encoding="vector"
> format="hex" group="HVX Vector Registers" dwarf_regnum="88"/>
> + <reg name="v1" bitsize="1024" offset="384" encoding="vector"
> format="hex" group="HVX Vector Registers" dwarf_regnum="89"/>
> + <reg name="v2" bitsize="1024" offset="512" encoding="vector"
> format="hex" group="HVX Vector Registers" dwarf_regnum="90"/>
> + <reg name="v3" bitsize="1024" offset="640" encoding="vector"
> format="hex" group="HVX Vector Registers" dwarf_regnum="91"/>
> + <reg name="v4" bitsize="1024" offset="768" encoding="vector"
> format="hex" group="HVX Vector Registers" dwarf_regnum="92"/>
> + <reg name="v5" bitsize="1024" offset="896" encoding="vector"
> format="hex" group="HVX Vector Registers" dwarf_regnum="93"/>
> + <reg name="v6" bitsize="1024" offset="1024" encoding="vector"
> format="hex" group="HVX Vector Registers" dwarf_regnum="94"/>
> + <reg name="v7" bitsize="1024" offset="1152" encoding="vector"
> format="hex" group="HVX Vector Registers" dwarf_regnum="95"/>
> + <reg name="v8" bitsize="1024" offset="1280" encoding="vector"
> format="hex" group="HVX Vector Registers" dwarf_regnum="96"/>
> + <reg name="v9" bitsize="1024" offset="1408" encoding="vector"
> format="hex" group="HVX Vector Registers" dwarf_regnum="97"/>
> + <reg name="v10" bitsize="1024" offset="1536" encoding="vector"
> format="hex" group="HVX Vector Registers" dwarf_regnum="98"/>
> + <reg name="v11" bitsize="1024" offset="1664" encoding="vector"
> format="hex" group="HVX Vector Registers" dwarf_regnum="99"/>
> + <reg name="v12" bitsize="1024" offset="1792" encoding="vector"
> format="hex" group="HVX Vector Registers" dwarf_regnum="100"/>
> + <reg name="v13" bitsize="1024" offset="1920" encoding="vector"
> format="hex" group="HVX Vector Registers" dwarf_regnum="101"/>
> + <reg name="v14" bitsize="1024" offset="2048" encoding="vector"
> format="hex" group="HVX Vector Registers" dwarf_regnum="102"/>
> + <reg name="v15" bitsize="1024" offset="2176" encoding="vector"
> format="hex" group="HVX Vector Registers" dwarf_regnum="103"/>
> + <reg name="v16" bitsize="1024" offset="2304" encoding="vector"
> format="hex" group="HVX Vector Registers" dwarf_regnum="104"/>
> + <reg name="v17" bitsize="1024" offset="2432" encoding="vector"
> format="hex" group="HVX Vector Registers" dwarf_regnum="105"/>
> + <reg name="v18" bitsize="1024" offset="2560" encoding="vector"
> format="hex" group="HVX Vector Registers" dwarf_regnum="106"/>
> + <reg name="v19" bitsize="1024" offset="2688" encoding="vector"
> format="hex" group="HVX Vector Registers" dwarf_regnum="107"/>
> + <reg name="v20" bitsize="1024" offset="2816" encoding="vector"
> format="hex" group="HVX Vector Registers" dwarf_regnum="108"/>
> + <reg name="v21" bitsize="1024" offset="2944" encoding="vector"
> format="hex" group="HVX Vector Registers" dwarf_regnum="109"/>
> + <reg name="v22" bitsize="1024" offset="3072" encoding="vector"
> format="hex" group="HVX Vector Registers" dwarf_regnum="110"/>
> + <reg name="v23" bitsize="1024" offset="3200" encoding="vector"
> format="hex" group="HVX Vector Registers" dwarf_regnum="111"/>
> + <reg name="v24" bitsize="1024" offset="3328" encoding="vector"
> format="hex" group="HVX Vector Registers" dwarf_regnum="112"/>
> + <reg name="v25" bitsize="1024" offset="3456" encoding="vector"
> format="hex" group="HVX Vector Registers" dwarf_regnum="113"/>
> + <reg name="v26" bitsize="1024" offset="3584" encoding="vector"
> format="hex" group="HVX Vector Registers" dwarf_regnum="114"/>
> + <reg name="v27" bitsize="1024" offset="3712" encoding="vector"
> format="hex" group="HVX Vector Registers" dwarf_regnum="115"/>
> + <reg name="v28" bitsize="1024" offset="3840" encoding="vector"
> format="hex" group="HVX Vector Registers" dwarf_regnum="116"/>
> + <reg name="v29" bitsize="1024" offset="3968" encoding="vector"
> format="hex" group="HVX Vector Registers" dwarf_regnum="117"/>
> + <reg name="v30" bitsize="1024" offset="4096" encoding="vector"
> format="hex" group="HVX Vector Registers" dwarf_regnum="118"/>
> + <reg name="v31" bitsize="1024" offset="4224" encoding="vector"
> format="hex" group="HVX Vector Registers" dwarf_regnum="119"/>
> + <reg name="q0" bitsize="128" offset="4352" encoding="vector"
> format="hex" group="HVX Vector Registers" dwarf_regnum="120"/>
> + <reg name="q1" bitsize="128" offset="4368" encoding="vector"
> format="hex" group="HVX Vector Registers" dwarf_regnum="121"/>
> + <reg name="q2" bitsize="128" offset="4384" encoding="vector"
> format="hex" group="HVX Vector Registers" dwarf_regnum="122"/>
> + <reg name="q3" bitsize="128" offset="4400" encoding="vector"
> format="hex" group="HVX Vector Registers" dwarf_regnum="123"/>
> +
> +</feature>
> --
> 2.37.2
Reviewed-by: Brian Cain <bcain@quicinc.com>
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2023-05-12 21:35 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-05-04 15:37 [PATCH v3 0/6] Hexagon: add lldb support Matheus Tavares Bernardino
2023-05-04 15:37 ` [PATCH v3 1/6] gdbstub: only send stop-reply packets when allowed to Matheus Tavares Bernardino
2023-05-04 15:37 ` [PATCH v3 2/6] gdbstub: add test for untimely stop-reply packets Matheus Tavares Bernardino
2023-05-04 15:37 ` [PATCH v3 3/6] Hexagon: add core gdbstub xml data for LLDB Matheus Tavares Bernardino
2023-05-09 19:12 ` Taylor Simpson
2023-05-04 15:37 ` [PATCH v3 4/6] Hexagon (gdbstub): fix p3:0 read and write via stub Matheus Tavares Bernardino
2023-05-04 15:37 ` [PATCH v3 5/6] Hexagon (gdbstub): add HVX support Matheus Tavares Bernardino
2023-05-12 21:34 ` Brian Cain
2023-05-04 15:37 ` [PATCH v3 6/6] Hexagon (linux-user/hexagon): handle breakpoints Matheus Tavares Bernardino
2023-05-07 6:27 ` Richard Henderson
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).