From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Jiaxun Yang <jiaxun.yang@flygoat.com>, qemu-devel@nongnu.org
Cc: Song Gao <gaosong@loongson.cn>, Bibo Mao <maobibo@loongson.cn>,
Eric Blake <eblake@redhat.com>,
Markus Armbruster <armbru@redhat.com>,
Eduardo Habkost <eduardo@habkost.net>,
Marcel Apfelbaum <marcel.apfelbaum@gmail.com>,
Yanan Wang <wangyanan55@huawei.com>,
Zhao Liu <zhao1.liu@intel.com>,
Paolo Bonzini <pbonzini@redhat.com>
Subject: Re: [PATCH v2 05/23] target/loongarch: Use target_ulong for iocsrrd helper results
Date: Thu, 26 Dec 2024 23:45:45 +0100 [thread overview]
Message-ID: <db7a97c1-f917-4c06-8298-7c21918a7cf4@linaro.org> (raw)
In-Reply-To: <20241226-la32-fixes1-v2-5-0414594f8cb5@flygoat.com>
On 26/12/24 22:19, Jiaxun Yang wrote:
> Those results are all targeting TCGv values, which means they should
> be in target_ulong type.
>
> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> ---
> target/loongarch/helper.h | 8 ++++----
> target/loongarch/tcg/iocsr_helper.c | 8 ++++----
> 2 files changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/target/loongarch/helper.h b/target/loongarch/helper.h
> index b3b64a021536255a3f9decfc10ff61fe8380e2ae..409d93a5b0808f0e32b8c0e2e17cebac9feaf8ed 100644
> --- a/target/loongarch/helper.h
> +++ b/target/loongarch/helper.h
> @@ -104,10 +104,10 @@ DEF_HELPER_2(csrwr_estat, i64, env, tl)
> DEF_HELPER_2(csrwr_asid, i64, env, tl)
> DEF_HELPER_2(csrwr_tcfg, i64, env, tl)
> DEF_HELPER_2(csrwr_ticlr, i64, env, tl)
> -DEF_HELPER_2(iocsrrd_b, i64, env, tl)
> -DEF_HELPER_2(iocsrrd_h, i64, env, tl)
> -DEF_HELPER_2(iocsrrd_w, i64, env, tl)
> -DEF_HELPER_2(iocsrrd_d, i64, env, tl)
> +DEF_HELPER_2(iocsrrd_b, tl, env, tl)
> +DEF_HELPER_2(iocsrrd_h, tl, env, tl)
> +DEF_HELPER_2(iocsrrd_w, tl, env, tl)
> +DEF_HELPER_2(iocsrrd_d, tl, env, tl)
> DEF_HELPER_3(iocsrwr_b, void, env, tl, tl)
> DEF_HELPER_3(iocsrwr_h, void, env, tl, tl)
> DEF_HELPER_3(iocsrwr_w, void, env, tl, tl)
> diff --git a/target/loongarch/tcg/iocsr_helper.c b/target/loongarch/tcg/iocsr_helper.c
> index db30de2523fff01bcc8923eb12c7fca7bedca7bf..23d819de0ef9790eb82741f1e8a0e20dc139bf4b 100644
> --- a/target/loongarch/tcg/iocsr_helper.c
> +++ b/target/loongarch/tcg/iocsr_helper.c
> @@ -15,25 +15,25 @@
> #define GET_MEMTXATTRS(cas) \
> ((MemTxAttrs){.requester_id = env_cpu(cas)->cpu_index})
>
> -uint64_t helper_iocsrrd_b(CPULoongArchState *env, target_ulong r_addr)
> +target_ulong helper_iocsrrd_b(CPULoongArchState *env, target_ulong r_addr)
> {
> return (int8_t)address_space_ldub(env->address_space_iocsr, r_addr,
> GET_MEMTXATTRS(env), NULL);
> }
>
> -uint64_t helper_iocsrrd_h(CPULoongArchState *env, target_ulong r_addr)
> +target_ulong helper_iocsrrd_h(CPULoongArchState *env, target_ulong r_addr)
> {
> return (int16_t)address_space_lduw(env->address_space_iocsr, r_addr,
> GET_MEMTXATTRS(env), NULL);
> }
>
> -uint64_t helper_iocsrrd_w(CPULoongArchState *env, target_ulong r_addr)
> +target_ulong helper_iocsrrd_w(CPULoongArchState *env, target_ulong r_addr)
> {
> return (int32_t)address_space_ldl(env->address_space_iocsr, r_addr,
> GET_MEMTXATTRS(env), NULL);
> }
>
> -uint64_t helper_iocsrrd_d(CPULoongArchState *env, target_ulong r_addr)
> +target_ulong helper_iocsrrd_d(CPULoongArchState *env, target_ulong r_addr)
> {
> return address_space_ldq(env->address_space_iocsr, r_addr,
> GET_MEMTXATTRS(env), NULL);
>
We could reduce code duplication adding address_space_ldn().
Anyhow, for this patch:
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
next prev parent reply other threads:[~2024-12-26 22:46 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-26 21:19 [PATCH v2 00/23] target/loongarch: LoongArch32 fixes 1 Jiaxun Yang
2024-12-26 21:19 ` [PATCH v2 01/23] target/loongarch: Enable rotr.w/rotri.w for LoongArch32 Jiaxun Yang
2024-12-26 21:24 ` Richard Henderson
2024-12-26 21:19 ` [PATCH v2 02/23] target/loongarch: Fix address generation for gen_sc Jiaxun Yang
2024-12-26 21:25 ` Richard Henderson
2024-12-26 21:19 ` [PATCH v2 03/23] target/loongarch: Fix PGD CSR for LoongArch32 Jiaxun Yang
2024-12-26 21:19 ` [PATCH v2 04/23] target/loongarch: Perform sign extension for IOCSR reads Jiaxun Yang
2024-12-26 21:19 ` [PATCH v2 05/23] target/loongarch: Use target_ulong for iocsrrd helper results Jiaxun Yang
2024-12-26 21:27 ` Richard Henderson
2024-12-26 22:45 ` Philippe Mathieu-Daudé [this message]
2024-12-26 21:19 ` [PATCH v2 06/23] target/loongarch: Store some uint64_t values as target_ulong Jiaxun Yang
2024-12-26 22:48 ` Philippe Mathieu-Daudé
2024-12-26 22:58 ` Jiaxun Yang
2024-12-26 23:02 ` Philippe Mathieu-Daudé
2024-12-26 21:19 ` [PATCH v2 07/23] target/loongarch: Cast address to 64bit before DMW_64_VSEG shift Jiaxun Yang
2024-12-26 21:28 ` Richard Henderson
2024-12-26 21:19 ` [PATCH v2 08/23] target/loongarch: Fix some modifiers for log formatting Jiaxun Yang
2024-12-26 21:29 ` Richard Henderson
2024-12-26 22:49 ` Philippe Mathieu-Daudé
2024-12-26 21:19 ` [PATCH v2 09/23] target/loongarch: Use target_ulong for CSR helpers Jiaxun Yang
2024-12-26 21:31 ` Richard Henderson
2024-12-26 21:39 ` Jiaxun Yang
2024-12-26 21:19 ` [PATCH v2 10/23] target/loongarch: Scrutinise TCG float translation for 32 bit build Jiaxun Yang
2024-12-26 22:11 ` Richard Henderson
2024-12-26 21:19 ` [PATCH v2 11/23] target/loongarch: Scrutinise TCG vector " Jiaxun Yang
2024-12-26 22:25 ` Richard Henderson
2024-12-26 21:19 ` [PATCH v2 12/23] target/loongarch: Scrutinise TCG bitops " Jiaxun Yang
2024-12-26 21:55 ` Richard Henderson
2024-12-26 22:08 ` Jiaxun Yang
2024-12-26 22:10 ` Richard Henderson
2024-12-26 21:19 ` [PATCH v2 13/23] target/loongarch: Fix rdtimer on 32bit build Jiaxun Yang
2024-12-26 22:16 ` Richard Henderson
2024-12-26 21:19 ` [PATCH v2 14/23] target/loongarch: Scrutinise TCG arithmetic translation for 32 bit build Jiaxun Yang
2024-12-26 22:05 ` Richard Henderson
2024-12-26 21:19 ` [PATCH v2 15/23] target/loongarch: Fix load type for gen_ll Jiaxun Yang
2024-12-26 22:05 ` Richard Henderson
2024-12-26 21:19 ` [PATCH v2 16/23] target/loongarch: Define address space information for LoongArch32 Jiaxun Yang
2024-12-26 21:19 ` [PATCH v2 17/23] target/loongarch: Refactoring is_la64/is_va32 " Jiaxun Yang
2024-12-26 21:19 ` [PATCH v2 18/23] target/loongarch: ifdef out 64 bit CPUs on 32 bit builds Jiaxun Yang
2024-12-26 21:19 ` [PATCH v2 19/23] target/loongarch: Introduce max32 CPU type Jiaxun Yang
2024-12-26 22:55 ` Philippe Mathieu-Daudé
2024-12-26 23:00 ` Jiaxun Yang
2024-12-26 21:19 ` [PATCH v2 20/23] hw/loongarch/virt: Default to max32 CPU for LoongArch 32 build Jiaxun Yang
2024-12-26 22:56 ` Philippe Mathieu-Daudé
2024-12-26 23:03 ` Jiaxun Yang
2024-12-26 23:20 ` Philippe Mathieu-Daudé
2024-12-26 21:19 ` [PATCH v2 21/23] qapi/machine: Replace TARGET_LOONGARCH64 with TARGET_LOONGARCH Jiaxun Yang
2025-01-07 11:06 ` Markus Armbruster
2024-12-26 21:19 ` [PATCH v2 22/23] target/loongarch: Wire up LoongArch32 Kconfigs Jiaxun Yang
2024-12-26 21:19 ` [PATCH v2 23/23] config: Add loongarch32-softmmu target Jiaxun Yang
2024-12-26 22:58 ` Philippe Mathieu-Daudé
2024-12-27 5:20 ` Richard Henderson
2024-12-27 10:48 ` Jiaxun Yang
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